arch/arm/mach-omap2/omap-cache.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  *
   4  * Common functions for OMAP4/5 based boards
   5  *
   6  * (C) Copyright 2010
   7  * Texas Instruments, <www.ti.com>
   8  *
   9  * Author :
  10  *      Aneesh V        <aneesh@ti.com>
  11  *      Steve Sakoman   <steve@sakoman.com>
  12  */
  13
  14 #include <common.h>
  15 #include <cpu_func.h>
  16 #include <log.h>
  17 #include <asm/cache.h>
  18
  19 DECLARE_GLOBAL_DATA_PTR;
  20
  21 /*
  22  * Without LPAE short descriptors are used
  23  * Set C - Cache Bit3
  24  * Set B - Buffer Bit2
  25  * The last 2 bits set to 0b10
  26  * Do Not set XN bit4
  27  * So value is 0xe
  28  *
  29  * With LPAE cache configuration happens via MAIR0 register
  30  * AttrIndx value is 0x3 for picking byte3 for MAIR0 which has 0xFF.
  31  * 0xFF maps to Cache writeback with Read and Write Allocate set
  32  * The bits[1:0] should have the value 0b01 for the first level
  33  * descriptor.
  34  * So the value is 0xd
  35  */
  36
  37 #ifdef CONFIG_ARMV7_LPAE
  38 #define ARMV7_DCACHE_POLICY     DCACHE_WRITEALLOC
  39 #else
  40 #define ARMV7_DCACHE_POLICY     DCACHE_WRITEBACK & ~TTB_SECT_XN_MASK
  41 #endif
  42
  43 #define ARMV7_DOMAIN_CLIENT     1
  44 #define ARMV7_DOMAIN_MASK       (0x3 << 0)
  45
  46 void enable_caches(void)
  47 {
  48
  49         /* Enable I cache if not enabled */
  50         if (!icache_status())
  51                 icache_enable();
  52
  53         dcache_enable();
  54 }
  55
  56 void dram_bank_mmu_setup(int bank)
  57 {
  58         struct bd_info *bd = gd->bd;
  59         int     i;
  60
  61         u32 start = bd->bi_dram[bank].start >> MMU_SECTION_SHIFT;
  62         u32 size = bd->bi_dram[bank].size >> MMU_SECTION_SHIFT;
  63         u32 end = start + size;
  64
  65         debug("%s: bank: %d\n", __func__, bank);
  66         for (i = start; i < end; i++)
  67                 set_section_dcache(i, ARMV7_DCACHE_POLICY);
  68 }
  69
  70 void arm_init_domains(void)
  71 {
  72         u32 reg;
  73
  74         reg = get_dacr();
  75         /*
  76         * Set DOMAIN to client access so that all permissions
  77         * set in pagetables are validated by the mmu.
  78         */
  79         reg &= ~ARMV7_DOMAIN_MASK;
  80         reg |= ARMV7_DOMAIN_CLIENT;
  81         set_dacr(reg);
  82 }