arch/arm/mach-omap2/omap3/sys_info.c

   1 /*
   2  * (C) Copyright 2008
   3  * Texas Instruments, <www.ti.com>
   4  *
   5  * Author :
   6  *      Manikandan Pillai <mani.pillai@ti.com>
   7  *
   8  * Derived from Beagle Board and 3430 SDP code by
   9  *      Richard Woodruff <r-woodruff2@ti.com>
  10  *      Syed Mohammed Khasim <khasim@ti.com>
  11  *
  12  * SPDX-License-Identifier:     GPL-2.0+
  13  */
  14
  15 #include <common.h>
  16 #include <asm/io.h>
  17 #include <asm/arch/mem.h>       /* get mem tables */
  18 #include <asm/arch/sys_proto.h>
  19 #include <asm/bootm.h>
  20 #include <asm/omap_common.h>
  21
  22 #include <i2c.h>
  23 #include <linux/compiler.h>
  24
  25 extern omap3_sysinfo sysinfo;
  26 static struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
  27
  28 #ifdef CONFIG_DISPLAY_CPUINFO
  29 static char *rev_s[CPU_3XX_MAX_REV] = {
  30                                 "1.0",
  31                                 "2.0",
  32                                 "2.1",
  33                                 "3.0",
  34                                 "3.1",
  35                                 "UNKNOWN",
  36                                 "UNKNOWN",
  37                                 "3.1.2"};
  38
  39 /* this is the revision table for 37xx CPUs */
  40 static char *rev_s_37xx[CPU_37XX_MAX_REV] = {
  41                                 "1.0",
  42                                 "1.1",
  43                                 "1.2"};
  44 #endif /* CONFIG_DISPLAY_CPUINFO */
  45
  46 void omap_die_id(unsigned int *die_id)
  47 {
  48         struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE;
  49
  50         die_id[0] = readl(&id_base->die_id_0);
  51         die_id[1] = readl(&id_base->die_id_1);
  52         die_id[2] = readl(&id_base->die_id_2);
  53         die_id[3] = readl(&id_base->die_id_3);
  54 }
  55
  56 /******************************************
  57  * get_cpu_type(void) - extract cpu info
  58  ******************************************/
  59 u32 get_cpu_type(void)
  60 {
  61         return readl(&ctrl_base->ctrl_omap_stat);
  62 }
  63
  64 /******************************************
  65  * get_cpu_id(void) - extract cpu id
  66  * returns 0 for ES1.0, cpuid otherwise
  67  ******************************************/
  68 u32 get_cpu_id(void)
  69 {
  70         struct ctrl_id *id_base;
  71         u32 cpuid = 0;
  72
  73         /*
  74          * On ES1.0 the IDCODE register is not exposed on L4
  75          * so using CPU ID to differentiate between ES1.0 and > ES1.0.
  76          */
  77         __asm__ __volatile__("mrc p15, 0, %0, c0, c0, 0":"=r"(cpuid));
  78         if ((cpuid & 0xf) == 0x0) {
  79                 return 0;
  80         } else {
  81                 /* Decode the IDs on > ES1.0 */
  82                 id_base = (struct ctrl_id *) OMAP34XX_ID_L4_IO_BASE;
  83
  84                 cpuid = readl(&id_base->idcode);
  85         }
  86
  87         return cpuid;
  88 }
  89
  90 /******************************************
  91  * get_cpu_family(void) - extract cpu info
  92  ******************************************/
  93 u32 get_cpu_family(void)
  94 {
  95         u16 hawkeye;
  96         u32 cpu_family;
  97         u32 cpuid = get_cpu_id();
  98
  99         if (cpuid == 0)
 100                 return CPU_OMAP34XX;
 101
 102         hawkeye = (cpuid >> HAWKEYE_SHIFT) & 0xffff;
 103         switch (hawkeye) {
 104         case HAWKEYE_OMAP34XX:
 105                 cpu_family = CPU_OMAP34XX;
 106                 break;
 107         case HAWKEYE_AM35XX:
 108                 cpu_family = CPU_AM35XX;
 109                 break;
 110         case HAWKEYE_OMAP36XX:
 111                 cpu_family = CPU_OMAP36XX;
 112                 break;
 113         default:
 114                 cpu_family = CPU_OMAP34XX;
 115         }
 116
 117         return cpu_family;
 118 }
 119
 120 /******************************************
 121  * get_cpu_rev(void) - extract version info
 122  ******************************************/
 123 u32 get_cpu_rev(void)
 124 {
 125         u32 cpuid = get_cpu_id();
 126
 127         if (cpuid == 0)
 128                 return CPU_3XX_ES10;
 129         else
 130                 return (cpuid >> CPU_3XX_ID_SHIFT) & 0xf;
 131 }
 132
 133 /*****************************************************************
 134  * get_sku_id(void) - read sku_id to get info on max clock rate
 135  *****************************************************************/
 136 u32 get_sku_id(void)
 137 {
 138         struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE;
 139         return readl(&id_base->sku_id) & SKUID_CLK_MASK;
 140 }
 141
 142 /***************************************************************************
 143  *  get_gpmc0_base() - Return current address hardware will be
 144  *     fetching from. The below effectively gives what is correct, its a bit
 145  *   mis-leading compared to the TRM.  For the most general case the mask
 146  *   needs to be also taken into account this does work in practice.
 147  *   - for u-boot we currently map:
 148  *       -- 0 to nothing,
 149  *       -- 4 to flash
 150  *       -- 8 to enent
 151  *       -- c to wifi
 152  ****************************************************************************/
 153 u32 get_gpmc0_base(void)
 154 {
 155         u32 b;
 156
 157         b = readl(&gpmc_cfg->cs[0].config7);
 158         b &= 0x1F;              /* keep base [5:0] */
 159         b = b << 24;            /* ret 0x0b000000 */
 160         return b;
 161 }
 162
 163 /*******************************************************************
 164  * get_gpmc0_width() - See if bus is in x8 or x16 (mainly for nand)
 165  *******************************************************************/
 166 u32 get_gpmc0_width(void)
 167 {
 168         return WIDTH_16BIT;
 169 }
 170
 171 /*************************************************************************
 172  * get_board_rev() - setup to pass kernel board revision information
 173  * returns:(bit[0-3] sub version, higher bit[7-4] is higher version)
 174  *************************************************************************/
 175 #ifdef CONFIG_REVISION_TAG
 176 u32 __weak get_board_rev(void)
 177 {
 178         return 0x20;
 179 }
 180 #endif
 181
 182 /********************************************************
 183  *  get_base(); get upper addr of current execution
 184  *******************************************************/
 185 static u32 get_base(void)
 186 {
 187         u32 val;
 188
 189         __asm__ __volatile__("mov %0, pc \n":"=r"(val)::"memory");
 190         val &= 0xF0000000;
 191         val >>= 28;
 192         return val;
 193 }
 194
 195 /********************************************************
 196  *  is_running_in_flash() - tell if currently running in
 197  *  FLASH.
 198  *******************************************************/
 199 u32 is_running_in_flash(void)
 200 {
 201         if (get_base() < 4)
 202                 return 1;       /* in FLASH */
 203
 204         return 0;               /* running in SRAM or SDRAM */
 205 }
 206
 207 /********************************************************
 208  *  is_running_in_sram() - tell if currently running in
 209  *  SRAM.
 210  *******************************************************/
 211 u32 is_running_in_sram(void)
 212 {
 213         if (get_base() == 4)
 214                 return 1;       /* in SRAM */
 215
 216         return 0;               /* running in FLASH or SDRAM */
 217 }
 218
 219 /********************************************************
 220  *  is_running_in_sdram() - tell if currently running in
 221  *  SDRAM.
 222  *******************************************************/
 223 u32 is_running_in_sdram(void)
 224 {
 225         if (get_base() > 4)
 226                 return 1;       /* in SDRAM */
 227
 228         return 0;               /* running in SRAM or FLASH */
 229 }
 230
 231 /***************************************************************
 232  *  get_boot_type() - Is this an XIP type device or a stream one
 233  *  bits 4-0 specify type. Bit 5 says mem/perif
 234  ***************************************************************/
 235 u32 get_boot_type(void)
 236 {
 237         return (readl(&ctrl_base->status) & SYSBOOT_MASK);
 238 }
 239
 240 #ifdef CONFIG_DISPLAY_CPUINFO
 241 /**
 242  * Print CPU information
 243  */
 244 int print_cpuinfo (void)
 245 {
 246         char *cpu_family_s, *cpu_s, *sec_s, *max_clk;
 247
 248         switch (get_cpu_family()) {
 249         case CPU_OMAP34XX:
 250                 cpu_family_s = "OMAP";
 251                 switch (get_cpu_type()) {
 252                 case OMAP3503:
 253                         cpu_s = "3503";
 254                         break;
 255                 case OMAP3515:
 256                         cpu_s = "3515";
 257                         break;
 258                 case OMAP3525:
 259                         cpu_s = "3525";
 260                         break;
 261                 case OMAP3530:
 262                         cpu_s = "3530";
 263                         break;
 264                 default:
 265                         cpu_s = "35XX";
 266                         break;
 267                 }
 268                 if ((get_cpu_rev() >= CPU_3XX_ES31) &&
 269                     (get_sku_id() == SKUID_CLK_720MHZ))
 270                         max_clk = "720 MHz";
 271                 else
 272                         max_clk = "600 MHz";
 273
 274                 break;
 275         case CPU_AM35XX:
 276                 cpu_family_s = "AM";
 277                 switch (get_cpu_type()) {
 278                 case AM3505:
 279                         cpu_s = "3505";
 280                         break;
 281                 case AM3517:
 282                         cpu_s = "3517";
 283                         break;
 284                 default:
 285                         cpu_s = "35XX";
 286                         break;
 287                 }
 288                 max_clk = "600 MHz";
 289                 break;
 290         case CPU_OMAP36XX:
 291                 switch (get_cpu_type()) {
 292                 case AM3703:
 293                         cpu_family_s = "AM";
 294                         cpu_s = "3703";
 295                         max_clk = "800 MHz";
 296                         break;
 297                 case AM3703_1GHZ:
 298                         cpu_family_s = "AM";
 299                         cpu_s = "3703";
 300                         max_clk = "1 GHz";
 301                         break;
 302                 case AM3715:
 303                         cpu_family_s = "AM";
 304                         cpu_s = "3715";
 305                         max_clk = "800 MHz";
 306                         break;
 307                 case AM3715_1GHZ:
 308                         cpu_family_s = "AM";
 309                         cpu_s = "3715";
 310                         max_clk = "1 GHz";
 311                         break;
 312                 case OMAP3725:
 313                         cpu_family_s = "OMAP";
 314                         cpu_s = "3625/3725";
 315                         max_clk = "800 MHz";
 316                         break;
 317                 case OMAP3725_1GHZ:
 318                         cpu_family_s = "OMAP";
 319                         cpu_s = "3625/3725";
 320                         max_clk = "1 GHz";
 321                         break;
 322                 case OMAP3730:
 323                         cpu_family_s = "OMAP";
 324                         cpu_s = "3630/3730";
 325                         max_clk = "800 MHz";
 326                         break;
 327                 case OMAP3730_1GHZ:
 328                         cpu_family_s = "OMAP";
 329                         cpu_s = "3630/3730";
 330                         max_clk = "1 GHz";
 331                         break;
 332                 default:
 333                         cpu_family_s = "OMAP/AM";
 334                         cpu_s = "36XX/37XX";
 335                         max_clk = "1 GHz";
 336                         break;
 337                 }
 338
 339                 break;
 340         default:
 341                 cpu_family_s = "OMAP";
 342                 cpu_s = "35XX";
 343                 max_clk = "600 MHz";
 344         }
 345
 346         switch (get_device_type()) {
 347         case TST_DEVICE:
 348                 sec_s = "TST";
 349                 break;
 350         case EMU_DEVICE:
 351                 sec_s = "EMU";
 352                 break;
 353         case HS_DEVICE:
 354                 sec_s = "HS";
 355                 break;
 356         case GP_DEVICE:
 357                 sec_s = "GP";
 358                 break;
 359         default:
 360                 sec_s = "?";
 361         }
 362
 363         if (CPU_OMAP36XX == get_cpu_family())
 364                 printf("%s%s-%s ES%s, CPU-OPP2, L3-200MHz, Max CPU Clock %s\n",
 365                        cpu_family_s, cpu_s, sec_s,
 366                        rev_s_37xx[get_cpu_rev()], max_clk);
 367         else
 368                 printf("%s%s-%s ES%s, CPU-OPP2, L3-165MHz, Max CPU Clock %s\n",
 369                         cpu_family_s, cpu_s, sec_s,
 370                         rev_s[get_cpu_rev()], max_clk);
 371
 372         return 0;
 373 }
 374 #endif  /* CONFIG_DISPLAY_CPUINFO */