arch/arm/mach-pxa/generic.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  *  linux/arch/arm/mach-pxa/generic.c
   4  *
   5  *  Author:     Nicolas Pitre
   6  *  Created:    Jun 15, 2001
   7  *  Copyright:  MontaVista Software Inc.
   8  *
   9  * Code common to all PXA machines.
  10  *
  11  * Since this file should be linked before any other machine specific file,
  12  * the __initcall() here will be executed first.  This serves as default
  13  * initialization stuff for PXA machines which can be overridden later if
  14  * need be.
  15  */
  16 #include <linux/gpio.h>
  17 #include <linux/module.h>
  18 #include <linux/kernel.h>
  19 #include <linux/init.h>
  20 #include <linux/soc/pxa/cpu.h>
  21
  22 #include <asm/mach/map.h>
  23 #include <asm/mach-types.h>
  24
  25 #include "addr-map.h"
  26 #include <mach/irqs.h>
  27 #include <mach/reset.h>
  28 #include <mach/smemc.h>
  29 #include <mach/pxa3xx-regs.h>
  30
  31 #include "generic.h"
  32 #include <clocksource/pxa.h>
  33
  34 void clear_reset_status(unsigned int mask)
  35 {
  36         if (cpu_is_pxa2xx())
  37                 pxa2xx_clear_reset_status(mask);
  38         else {
  39                 /* RESET_STATUS_* has a 1:1 mapping with ARSR */
  40                 ARSR = mask;
  41         }
  42 }
  43
  44 /*
  45  * For non device-tree builds, keep legacy timer init
  46  */
  47 void __init pxa_timer_init(void)
  48 {
  49         if (cpu_is_pxa25x())
  50                 pxa25x_clocks_init();
  51         if (cpu_is_pxa27x())
  52                 pxa27x_clocks_init();
  53         if (cpu_is_pxa3xx())
  54                 pxa3xx_clocks_init();
  55         pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x40a00000));
  56 }
  57
  58 /*
  59  * Get the clock frequency as reflected by CCCR and the turbo flag.
  60  * We assume these values have been applied via a fcs.
  61  * If info is not 0 we also display the current settings.
  62  */
  63 unsigned int get_clk_frequency_khz(int info)
  64 {
  65         if (cpu_is_pxa25x())
  66                 return pxa25x_get_clk_frequency_khz(info);
  67         else if (cpu_is_pxa27x())
  68                 return pxa27x_get_clk_frequency_khz(info);
  69         return 0;
  70 }
  71 EXPORT_SYMBOL(get_clk_frequency_khz);
  72
  73 void pxa_smemc_set_pcmcia_timing(int sock, u32 mcmem, u32 mcatt, u32 mcio)
  74 {
  75         __raw_writel(mcmem, MCMEM(sock));
  76         __raw_writel(mcatt, MCATT(sock));
  77         __raw_writel(mcio, MCIO(sock));
  78 }
  79 EXPORT_SYMBOL_GPL(pxa_smemc_set_pcmcia_timing);
  80
  81 void pxa_smemc_set_pcmcia_socket(int nr)
  82 {
  83         switch (nr) {
  84         case 0:
  85                 __raw_writel(0, MECR);
  86                 break;
  87         case 1:
  88                 /*
  89                  * We have at least one socket, so set MECR:CIT
  90                  * (Card Is There)
  91                  */
  92                 __raw_writel(MECR_CIT, MECR);
  93                 break;
  94         case 2:
  95                 /* Set CIT and MECR:NOS (Number Of Sockets) */
  96                 __raw_writel(MECR_CIT | MECR_NOS, MECR);
  97                 break;
  98         }
  99 }
 100 EXPORT_SYMBOL_GPL(pxa_smemc_set_pcmcia_socket);
 101
 102 /*
 103  * Intel PXA2xx internal register mapping.
 104  *
 105  * Note: virtual 0xfffe0000-0xffffffff is reserved for the vector table
 106  *       and cache flush area.
 107  */
 108 static struct map_desc common_io_desc[] __initdata = {
 109         {       /* Devs */
 110                 .virtual        = (unsigned long)PERIPH_VIRT,
 111                 .pfn            = __phys_to_pfn(PERIPH_PHYS),
 112                 .length         = PERIPH_SIZE,
 113                 .type           = MT_DEVICE
 114         }
 115 };
 116
 117 void __init pxa_map_io(void)
 118 {
 119         debug_ll_io_init();
 120         iotable_init(ARRAY_AND_SIZE(common_io_desc));
 121 }