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[thirdparty/kernel/stable.git] / arch / arm / mach-pxa / pxa25x.c
1 /*
2 * linux/arch/arm/mach-pxa/pxa25x.c
3 *
4 * Author: Nicolas Pitre
5 * Created: Jun 15, 2001
6 * Copyright: MontaVista Software Inc.
7 *
8 * Code specific to PXA21x/25x/26x variants.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * Since this file should be linked before any other machine specific file,
15 * the __initcall() here will be executed first. This serves as default
16 * initialization stuff for PXA machines which can be overridden later if
17 * need be.
18 */
19 #include <linux/dmaengine.h>
20 #include <linux/dma/pxa-dma.h>
21 #include <linux/gpio.h>
22 #include <linux/gpio-pxa.h>
23 #include <linux/module.h>
24 #include <linux/kernel.h>
25 #include <linux/init.h>
26 #include <linux/platform_device.h>
27 #include <linux/suspend.h>
28 #include <linux/syscore_ops.h>
29 #include <linux/irq.h>
30 #include <linux/irqchip.h>
31 #include <linux/platform_data/mmp_dma.h>
32
33 #include <asm/mach/map.h>
34 #include <asm/suspend.h>
35 #include <mach/hardware.h>
36 #include <mach/irqs.h>
37 #include "pxa25x.h"
38 #include <mach/reset.h>
39 #include "pm.h"
40 #include <mach/dma.h>
41 #include <mach/smemc.h>
42
43 #include "generic.h"
44 #include "devices.h"
45
46 /*
47 * Various clock factors driven by the CCCR register.
48 */
49
50 #ifdef CONFIG_PM
51
52 #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
53 #define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
54
55 /*
56 * List of global PXA peripheral registers to preserve.
57 * More ones like CP and general purpose register values are preserved
58 * with the stack pointer in sleep.S.
59 */
60 enum {
61 SLEEP_SAVE_PSTR,
62 SLEEP_SAVE_COUNT
63 };
64
65
66 static void pxa25x_cpu_pm_save(unsigned long *sleep_save)
67 {
68 SAVE(PSTR);
69 }
70
71 static void pxa25x_cpu_pm_restore(unsigned long *sleep_save)
72 {
73 RESTORE(PSTR);
74 }
75
76 static void pxa25x_cpu_pm_enter(suspend_state_t state)
77 {
78 /* Clear reset status */
79 RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
80
81 switch (state) {
82 case PM_SUSPEND_MEM:
83 cpu_suspend(PWRMODE_SLEEP, pxa25x_finish_suspend);
84 break;
85 }
86 }
87
88 static int pxa25x_cpu_pm_prepare(void)
89 {
90 /* set resume return address */
91 PSPR = __pa_symbol(cpu_resume);
92 return 0;
93 }
94
95 static void pxa25x_cpu_pm_finish(void)
96 {
97 /* ensure not to come back here if it wasn't intended */
98 PSPR = 0;
99 }
100
101 static struct pxa_cpu_pm_fns pxa25x_cpu_pm_fns = {
102 .save_count = SLEEP_SAVE_COUNT,
103 .valid = suspend_valid_only_mem,
104 .save = pxa25x_cpu_pm_save,
105 .restore = pxa25x_cpu_pm_restore,
106 .enter = pxa25x_cpu_pm_enter,
107 .prepare = pxa25x_cpu_pm_prepare,
108 .finish = pxa25x_cpu_pm_finish,
109 };
110
111 static void __init pxa25x_init_pm(void)
112 {
113 pxa_cpu_pm_fns = &pxa25x_cpu_pm_fns;
114 }
115 #else
116 static inline void pxa25x_init_pm(void) {}
117 #endif
118
119 /* PXA25x: supports wakeup from GPIO0..GPIO15 and RTC alarm
120 */
121
122 static int pxa25x_set_wake(struct irq_data *d, unsigned int on)
123 {
124 int gpio = pxa_irq_to_gpio(d->irq);
125 uint32_t mask = 0;
126
127 if (gpio >= 0 && gpio < 85)
128 return gpio_set_wake(gpio, on);
129
130 if (d->irq == IRQ_RTCAlrm) {
131 mask = PWER_RTC;
132 goto set_pwer;
133 }
134
135 return -EINVAL;
136
137 set_pwer:
138 if (on)
139 PWER |= mask;
140 else
141 PWER &=~mask;
142
143 return 0;
144 }
145
146 void __init pxa25x_init_irq(void)
147 {
148 pxa_init_irq(32, pxa25x_set_wake);
149 }
150
151 #ifdef CONFIG_CPU_PXA26x
152 void __init pxa26x_init_irq(void)
153 {
154 pxa_init_irq(32, pxa25x_set_wake);
155 }
156 #endif
157
158 static int __init __init
159 pxa25x_dt_init_irq(struct device_node *node, struct device_node *parent)
160 {
161 pxa_dt_irq_init(pxa25x_set_wake);
162 set_handle_irq(icip_handle_irq);
163
164 return 0;
165 }
166 IRQCHIP_DECLARE(pxa25x_intc, "marvell,pxa-intc", pxa25x_dt_init_irq);
167
168 static struct map_desc pxa25x_io_desc[] __initdata = {
169 { /* Mem Ctl */
170 .virtual = (unsigned long)SMEMC_VIRT,
171 .pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE),
172 .length = SMEMC_SIZE,
173 .type = MT_DEVICE
174 }, { /* UNCACHED_PHYS_0 */
175 .virtual = UNCACHED_PHYS_0,
176 .pfn = __phys_to_pfn(0x00000000),
177 .length = UNCACHED_PHYS_0_SIZE,
178 .type = MT_DEVICE
179 },
180 };
181
182 void __init pxa25x_map_io(void)
183 {
184 pxa_map_io();
185 iotable_init(ARRAY_AND_SIZE(pxa25x_io_desc));
186 pxa25x_get_clk_frequency_khz(1);
187 }
188
189 static struct pxa_gpio_platform_data pxa25x_gpio_info __initdata = {
190 .irq_base = PXA_GPIO_TO_IRQ(0),
191 .gpio_set_wake = gpio_set_wake,
192 };
193
194 static struct platform_device *pxa25x_devices[] __initdata = {
195 &pxa25x_device_udc,
196 &pxa_device_pmu,
197 &pxa_device_i2s,
198 &sa1100_device_rtc,
199 &pxa25x_device_ssp,
200 &pxa25x_device_nssp,
201 &pxa25x_device_assp,
202 &pxa25x_device_pwm0,
203 &pxa25x_device_pwm1,
204 &pxa_device_asoc_platform,
205 };
206
207 static const struct dma_slave_map pxa25x_slave_map[] = {
208 /* PXA25x, PXA27x and PXA3xx common entries */
209 { "pxa2xx-ac97", "pcm_pcm_mic_mono", PDMA_FILTER_PARAM(LOWEST, 8) },
210 { "pxa2xx-ac97", "pcm_pcm_aux_mono_in", PDMA_FILTER_PARAM(LOWEST, 9) },
211 { "pxa2xx-ac97", "pcm_pcm_aux_mono_out",
212 PDMA_FILTER_PARAM(LOWEST, 10) },
213 { "pxa2xx-ac97", "pcm_pcm_stereo_in", PDMA_FILTER_PARAM(LOWEST, 11) },
214 { "pxa2xx-ac97", "pcm_pcm_stereo_out", PDMA_FILTER_PARAM(LOWEST, 12) },
215 { "pxa-ssp-dai.1", "rx", PDMA_FILTER_PARAM(LOWEST, 13) },
216 { "pxa-ssp-dai.1", "tx", PDMA_FILTER_PARAM(LOWEST, 14) },
217 { "pxa-ssp-dai.2", "rx", PDMA_FILTER_PARAM(LOWEST, 15) },
218 { "pxa-ssp-dai.2", "tx", PDMA_FILTER_PARAM(LOWEST, 16) },
219 { "pxa2xx-ir", "rx", PDMA_FILTER_PARAM(LOWEST, 17) },
220 { "pxa2xx-ir", "tx", PDMA_FILTER_PARAM(LOWEST, 18) },
221 { "pxa2xx-mci.0", "rx", PDMA_FILTER_PARAM(LOWEST, 21) },
222 { "pxa2xx-mci.0", "tx", PDMA_FILTER_PARAM(LOWEST, 22) },
223
224 /* PXA25x specific map */
225 { "pxa25x-ssp.0", "rx", PDMA_FILTER_PARAM(LOWEST, 13) },
226 { "pxa25x-ssp.0", "tx", PDMA_FILTER_PARAM(LOWEST, 14) },
227 { "pxa25x-nssp.1", "rx", PDMA_FILTER_PARAM(LOWEST, 15) },
228 { "pxa25x-nssp.1", "tx", PDMA_FILTER_PARAM(LOWEST, 16) },
229 { "pxa25x-nssp.2", "rx", PDMA_FILTER_PARAM(LOWEST, 23) },
230 { "pxa25x-nssp.2", "tx", PDMA_FILTER_PARAM(LOWEST, 24) },
231 };
232
233 static struct mmp_dma_platdata pxa25x_dma_pdata = {
234 .dma_channels = 16,
235 .nb_requestors = 40,
236 .slave_map = pxa25x_slave_map,
237 .slave_map_cnt = ARRAY_SIZE(pxa25x_slave_map),
238 };
239
240 static int __init pxa25x_init(void)
241 {
242 int ret = 0;
243
244 if (cpu_is_pxa25x()) {
245
246 reset_status = RCSR;
247
248 pxa25x_init_pm();
249
250 register_syscore_ops(&pxa_irq_syscore_ops);
251 register_syscore_ops(&pxa2xx_mfp_syscore_ops);
252
253 if (!of_have_populated_dt()) {
254 pxa2xx_set_dmac_info(&pxa25x_dma_pdata);
255 pxa_register_device(&pxa25x_device_gpio, &pxa25x_gpio_info);
256 ret = platform_add_devices(pxa25x_devices,
257 ARRAY_SIZE(pxa25x_devices));
258 }
259 }
260
261 return ret;
262 }
263
264 postcore_initcall(pxa25x_init);