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[thirdparty/u-boot.git] / arch / arm / mach-rmobile / pfc-r8a7792.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * arch/arm/cpu/armv7/rmobile/pfc-r8a7792.c
4 * This file is r8a7792 processor support - PFC hardware block.
5 *
6 * Copyright (C) 2016 Renesas Electronics Corporation
7 */
8
9 #include <common.h>
10 #include <sh_pfc.h>
11 #include <asm/gpio.h>
12 #include "pfc-r8a7790.h"
13
14 enum {
15 PINMUX_RESERVED = 0,
16
17 PINMUX_DATA_BEGIN,
18 GP_ALL(DATA),
19 PINMUX_DATA_END,
20
21 PINMUX_INPUT_BEGIN,
22 GP_ALL(IN),
23 PINMUX_INPUT_END,
24
25 PINMUX_OUTPUT_BEGIN,
26 GP_ALL(OUT),
27 PINMUX_OUTPUT_END,
28
29 PINMUX_FUNCTION_BEGIN,
30 GP_ALL(FN),
31
32 /* GPSR0 */
33 FN_IP0_0, FN_IP0_1, FN_IP0_2, FN_IP0_3,
34 FN_IP0_4, FN_IP0_5, FN_IP0_6, FN_IP0_7,
35 FN_IP0_8, FN_IP0_9, FN_IP0_10, FN_IP0_11,
36 FN_IP0_12, FN_IP0_13, FN_IP0_14, FN_IP0_15,
37 FN_IP0_16, FN_IP0_17, FN_IP0_18, FN_IP0_19,
38 FN_IP0_20, FN_IP0_21, FN_IP0_22, FN_IP0_23,
39 FN_IP1_0, FN_IP1_1, FN_IP1_2, FN_IP1_3,
40 FN_IP1_4,
41
42 /* GPSR1 */
43 FN_IP1_5, FN_IP1_6, FN_IP1_7, FN_IP1_8,
44 FN_IP1_9, FN_IP1_10, FN_IP1_11, FN_IP1_12,
45 FN_IP1_13, FN_IP1_14, FN_IP1_15, FN_IP1_16,
46 FN_DU1_DB2_C0_DATA12, FN_DU1_DB3_C1_DATA13, FN_DU1_DB4_C2_DATA14, FN_DU1_DB5_C3_DATA15,
47 FN_DU1_DB6_C4, FN_DU1_DB7_C5, FN_DU1_EXHSYNC_DU1_HSYNC, FN_DU1_EXVSYNC_DU1_VSYNC,
48 FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, FN_DU1_DISP, FN_DU1_CDE,
49
50 /* GPSR2 */
51 FN_D0, FN_D1, FN_D2, FN_D3,
52 FN_D4, FN_D5, FN_D6, FN_D7,
53 FN_D8, FN_D9, FN_D10, FN_D11,
54 FN_D12, FN_D13, FN_D14, FN_D15,
55 FN_A0, FN_A1, FN_A2, FN_A3,
56 FN_A4, FN_A5, FN_A6, FN_A7,
57 FN_A8, FN_A9, FN_A10, FN_A11,
58 FN_A12, FN_A13, FN_A14, FN_A15,
59
60 /* GPSR3 */
61 FN_A16, FN_A17, FN_A18, FN_A19,
62 FN_IP1_17, FN_IP1_18, FN_CS1_A26, FN_EX_CS0,
63 FN_EX_CS1, FN_EX_CS2, FN_EX_CS3, FN_EX_CS4,
64 FN_EX_CS5, FN_BS, FN_RD, FN_RD_WR,
65 FN_WE0, FN_WE1, FN_EX_WAIT0, FN_IRQ0,
66 FN_IRQ1, FN_IRQ2, FN_IRQ3, FN_IP1_19,
67 FN_IP1_20, FN_IP1_21, FN_IP1_22, FN_CS0,
68
69 /* GPSR4 */
70 FN_VI0_CLK, FN_VI0_CLKENB, FN_VI0_HSYNC, FN_VI0_VSYNC,
71 FN_VI0_D0_B0_C0, FN_VI0_D1_B1_C1, FN_VI0_D2_B2_C2, FN_VI0_D3_B3_C3,
72 FN_VI0_D4_B4_C4, FN_VI0_D5_B5_C5, FN_VI0_D6_B6_C6, FN_VI0_D7_B7_C7,
73 FN_VI0_D8_G0_Y0, FN_VI0_D9_G1_Y1, FN_VI0_D10_G2_Y2, FN_VI0_D11_G3_Y3,
74 FN_VI0_FIELD,
75
76 /* GPSR5 */
77 FN_VI1_CLK, FN_VI1_CLKENB, FN_VI1_HSYNC, FN_VI1_VSYNC,
78 FN_VI1_D0_B0_C0, FN_VI1_D1_B1_C1, FN_VI1_D2_B2_C2, FN_VI1_D3_B3_C3,
79 FN_VI1_D4_B4_C4, FN_VI1_D5_B5_C5, FN_VI1_D6_B6_C6, FN_VI1_D7_B7_C7,
80 FN_VI1_D8_G0_Y0, FN_VI1_D9_G1_Y1, FN_VI1_D10_G2_Y2, FN_VI1_D11_G3_Y3,
81 FN_VI1_FIELD,
82
83 /* GPSR6 */
84 FN_IP2_0, FN_IP2_1, FN_IP2_2, FN_IP2_3,
85 FN_IP2_4, FN_IP2_5, FN_IP2_6, FN_IP2_7,
86 FN_IP2_8, FN_IP2_9, FN_IP2_10, FN_IP2_11,
87 FN_IP2_12, FN_IP2_13, FN_IP2_14, FN_IP2_15,
88 FN_IP2_16,
89
90 /* GPSR7 */
91 FN_IP3_0, FN_IP3_1, FN_IP3_2, FN_IP3_3,
92 FN_IP3_4, FN_IP3_5, FN_IP3_6, FN_IP3_7,
93 FN_IP3_8, FN_IP3_9, FN_IP3_10, FN_IP3_11,
94 FN_IP3_12, FN_IP3_13, FN_VI3_D10_Y2, FN_IP3_14,
95 FN_VI3_FIELD,
96
97 /* GPSR8 */
98 FN_VI4_CLK, FN_IP4_0, FN_IP4_1, FN_IP4_3_2,
99 FN_IP4_4, FN_IP4_6_5, FN_IP4_8_7, FN_IP4_10_9,
100 FN_IP4_12_11, FN_IP4_14_13, FN_IP4_16_15, FN_IP4_18_17,
101 FN_IP4_20_19, FN_IP4_21, FN_IP4_22, FN_IP4_23, FN_IP4_24,
102
103 /* GPSR9 */
104 FN_VI5_CLK, FN_IP5_0, FN_IP5_1, FN_IP5_2,
105 FN_IP5_3, FN_IP5_4, FN_IP5_5, FN_IP5_6,
106 FN_IP5_7, FN_IP5_8, FN_IP5_9, FN_IP5_10,
107 FN_IP5_11, FN_VI5_D9_Y1, FN_VI5_D10_Y2, FN_VI5_D11_Y3,
108 FN_VI5_FIELD,
109
110 /* GPSR10 */
111 FN_IP6_0, FN_IP6_1, FN_HRTS0, FN_IP6_2,
112 FN_IP6_3, FN_IP6_4, FN_IP6_5, FN_HCTS1,
113 FN_IP6_6, FN_IP6_7, FN_SCK0, FN_CTS0,
114 FN_RTS0, FN_TX0, FN_RX0, FN_SCK1,
115 FN_CTS1, FN_RTS1, FN_TX1, FN_RX1,
116 FN_IP6_9_8, FN_IP6_11_10, FN_IP6_13_12, FN_IP6_15_14,
117 FN_IP6_16, FN_IP6_18_17, FN_SCIF_CLK, FN_CAN0_TX,
118 FN_CAN0_RX, FN_CAN_CLK, FN_CAN1_TX, FN_CAN1_RX,
119
120 /* GPSR11 */
121 FN_IP7_1_0, FN_IP7_3_2, FN_IP7_5_4, FN_IP7_6,
122 FN_IP7_7, FN_SD0_CLK, FN_SD0_CMD, FN_SD0_DAT0,
123 FN_SD0_DAT1, FN_SD0_DAT2, FN_SD0_DAT3, FN_SD0_CD,
124 FN_SD0_WP, FN_IP7_9_8, FN_IP7_11_10, FN_IP7_13_12,
125 FN_IP7_15_14, FN_IP7_16, FN_IP7_17, FN_IP7_18,
126 FN_IP7_19, FN_IP7_20, FN_ADICLK, FN_ADICS_SAMP,
127 FN_ADIDATA, FN_ADICHS0, FN_ADICHS1, FN_ADICHS2,
128 FN_AVS1, FN_AVS2,
129
130 /* IPSR0 */
131 FN_DU0_DR0_DATA0, FN_DU0_DR1_DATA1, FN_DU0_DR2_Y4_DATA2, FN_DU0_DR3_Y5_DATA3,
132 FN_DU0_DR4_Y6_DATA4, FN_DU0_DR5_Y7_DATA5, FN_DU0_DR6_Y8_DATA6, FN_DU0_DR7_Y9_DATA7,
133 FN_DU0_DG0_DATA8, FN_DU0_DG1_DATA9, FN_DU0_DG2_C6_DATA10, FN_DU0_DG3_C7_DATA11,
134 FN_DU0_DG4_Y0_DATA12, FN_DU0_DG5_Y1_DATA13, FN_DU0_DG6_Y2_DATA14, FN_DU0_DG7_Y3_DATA15,
135 FN_DU0_DB0, FN_DU0_DB1, FN_DU0_DB2_C0, FN_DU0_DB3_C1,
136 FN_DU0_DB4_C2, FN_DU0_DB5_C3, FN_DU0_DB6_C4, FN_DU0_DB7_C5,
137
138 /* IPSR1 */
139 FN_DU0_EXHSYNC_DU0_HSYNC, FN_DU0_EXVSYNC_DU0_VSYNC, FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, FN_DU0_DISP,
140 FN_DU0_CDE, FN_DU1_DR2_Y4_DATA0, FN_DU1_DR3_Y5_DATA1, FN_DU1_DR4_Y6_DATA2,
141 FN_DU1_DR5_Y7_DATA3, FN_DU1_DR6_DATA4, FN_DU1_DR7_DATA5, FN_DU1_DG2_C6_DATA6,
142 FN_DU1_DG3_C7_DATA7, FN_DU1_DG4_Y0_DATA8, FN_DU1_DG5_Y1_DATA9, FN_DU1_DG6_Y2_DATA10,
143 FN_DU1_DG7_Y3_DATA11, FN_A20, FN_MOSI_IO0, FN_A21, FN_MISO_IO1,
144 FN_A22, FN_IO2, FN_A23, FN_IO3, FN_A24, FN_SPCLK, FN_A25, FN_SSL,
145
146 /* IPSR2 */
147 FN_VI2_CLK, FN_AVB_RX_CLK, FN_VI2_CLKENB, FN_AVB_RX_DV,
148 FN_VI2_HSYNC, FN_AVB_RXD0, FN_VI2_VSYNC, FN_AVB_RXD1,
149 FN_VI2_D0_C0, FN_AVB_RXD2, FN_VI2_D1_C1, FN_AVB_RXD3,
150 FN_VI2_D2_C2, FN_AVB_RXD4, FN_VI2_D3_C3, FN_AVB_RXD5,
151 FN_VI2_D4_C4, FN_AVB_RXD6, FN_VI2_D5_C5, FN_AVB_RXD7,
152 FN_VI2_D6_C6, FN_AVB_RX_ER, FN_VI2_D7_C7, FN_AVB_COL,
153 FN_VI2_D8_Y0, FN_AVB_TXD3, FN_VI2_D9_Y1, FN_AVB_TX_EN,
154 FN_VI2_D10_Y2, FN_AVB_TXD0, FN_VI2_D11_Y3, FN_AVB_TXD1,
155 FN_VI2_FIELD, FN_AVB_TXD2,
156
157 /* IPSR3 */
158 FN_VI3_CLK, FN_AVB_TX_CLK, FN_VI3_CLKENB, FN_AVB_TXD4,
159 FN_VI3_HSYNC, FN_AVB_TXD5, FN_VI3_VSYNC, FN_AVB_TXD6,
160 FN_VI3_D0_C0, FN_AVB_TXD7, FN_VI3_D1_C1, FN_AVB_TX_ER,
161 FN_VI3_D2_C2, FN_AVB_GTX_CLK, FN_VI3_D3_C3, FN_AVB_MDC,
162 FN_VI3_D4_C4, FN_AVB_MDIO, FN_VI3_D5_C5, FN_AVB_LINK,
163 FN_VI3_D6_C6, FN_AVB_MAGIC, FN_VI3_D7_C7, FN_AVB_PHY_INT,
164 FN_VI3_D8_Y0, FN_AVB_CRS, FN_VI3_D9_Y1, FN_AVB_GTXREFCLK,
165 FN_VI3_D11_Y3,
166
167 /* IPSR4 */
168 FN_VI4_CLKENB, FN_VI0_D12_G4_Y4, FN_VI4_HSYNC, FN_VI0_D13_G5_Y5,
169 FN_VI4_VSYNC, FN_VI0_D14_G6_Y6, FN_VI4_D0_C0, FN_VI0_D15_G7_Y7,
170 FN_VI4_D1_C1, FN_VI0_D16_R0, FN_VI1_D12_G4_Y4_0, FN_VI4_D2_C2, FN_VI0_D17_R1, FN_VI1_D13_G5_Y5_0,
171 FN_VI4_D3_C3, FN_VI0_D18_R2, FN_VI1_D14_G6_Y6_0, FN_VI4_D4_C4, FN_VI0_D19_R3, FN_VI1_D15_G7_Y7_0,
172 FN_VI4_D5_C5, FN_VI0_D20_R4, FN_VI2_D12_Y4, FN_VI4_D6_C6, FN_VI0_D21_R5, FN_VI2_D13_Y5,
173 FN_VI4_D7_C7, FN_VI0_D22_R6, FN_VI2_D14_Y6, FN_VI4_D8_Y0, FN_VI0_D23_R7, FN_VI2_D15_Y7,
174 FN_VI4_D9_Y1, FN_VI3_D12_Y4, FN_VI4_D10_Y2, FN_VI3_D13_Y5,
175 FN_VI4_D11_Y3, FN_VI3_D14_Y6, FN_VI4_FIELD, FN_VI3_D15_Y7,
176
177 /* IPSR5 */
178 FN_VI5_CLKENB, FN_VI1_D12_G4_Y4_1, FN_VI5_HSYNC, FN_VI1_D13_G5_Y5_1,
179 FN_VI5_VSYNC, FN_VI1_D14_G6_Y6_1, FN_VI5_D0_C0, FN_VI1_D15_G7_Y7_1,
180 FN_VI5_D1_C1, FN_VI1_D16_R0, FN_VI5_D2_C2, FN_VI1_D17_R1,
181 FN_VI5_D3_C3, FN_VI1_D18_R2, FN_VI5_D4_C4, FN_VI1_D19_R3,
182 FN_VI5_D5_C5, FN_VI1_D20_R4, FN_VI5_D6_C6, FN_VI1_D21_R5,
183 FN_VI5_D7_C7, FN_VI1_D22_R6, FN_VI5_D8_Y0, FN_VI1_D23_R7,
184
185 /* IPSR6 */
186 FN_MSIOF0_SCK, FN_HSCK0, FN_MSIOF0_SYNC, FN_HCTS0,
187 FN_MSIOF0_TXD, FN_HTX0, FN_MSIOF0_RXD, FN_HRX0,
188 FN_MSIOF1_SCK, FN_HSCK1, FN_MSIOF1_SYNC, FN_HRTS1,
189 FN_MSIOF1_TXD, FN_HTX1, FN_MSIOF1_RXD, FN_HRX1,
190 FN_DRACK0, FN_SCK2, FN_DACK0, FN_TX2,
191 FN_DREQ0, FN_RX2, FN_DACK1, FN_SCK3,
192 FN_TX3, FN_DREQ1, FN_RX3,
193
194 /* IPSR7 */
195 FN_PWM0, FN_TCLK1, FN_FSO_CFE_0, FN_PWM1, FN_TCLK2, FN_FSO_CFE_1,
196 FN_PWM2, FN_TCLK3, FN_FSO_TOE, FN_PWM3, FN_PWM4,
197 FN_SSI_SCK3, FN_TPU0TO0, FN_SSI_WS3, FN_TPU0TO1,
198 FN_SSI_SDATA3, FN_TPU0TO2, FN_SSI_SCK4, FN_TPU0TO3,
199 FN_SSI_WS4, FN_SSI_SDATA4, FN_AUDIO_CLKOUT, FN_AUDIO_CLKA, FN_AUDIO_CLKB,
200
201 FN_SEL_VI1_0, FN_SEL_VI1_1,
202 PINMUX_FUNCTION_END,
203
204 PINMUX_MARK_BEGIN,
205 DU1_DB2_C0_DATA12_MARK, DU1_DB3_C1_DATA13_MARK,
206 DU1_DB4_C2_DATA14_MARK, DU1_DB5_C3_DATA15_MARK,
207 DU1_DB6_C4_MARK, DU1_DB7_C5_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK, DU1_EXVSYNC_DU1_VSYNC_MARK,
208 DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK, DU1_DISP_MARK, DU1_CDE_MARK,
209
210 D0_MARK, D1_MARK, D2_MARK, D3_MARK, D4_MARK, D5_MARK,
211 D6_MARK, D7_MARK, D8_MARK, D9_MARK, D10_MARK, D11_MARK,
212 D12_MARK, D13_MARK, D14_MARK, D15_MARK, A0_MARK, A1_MARK,
213 A2_MARK, A3_MARK, A4_MARK, A5_MARK, A6_MARK, A7_MARK,
214 A8_MARK, A9_MARK, A10_MARK, A11_MARK, A12_MARK, A13_MARK,
215 A14_MARK, A15_MARK,
216
217 A16_MARK, A17_MARK, A18_MARK, A19_MARK,
218 CS1_A26_MARK, EX_CS0_MARK, EX_CS1_MARK, EX_CS2_MARK,
219 EX_CS3_MARK, EX_CS4_MARK, EX_CS5_MARK, BS_MARK,
220 RD_MARK, RD_WR_MARK, WE0_MARK, WE1_MARK, EX_WAIT0_MARK,
221 IRQ0_MARK, IRQ1_MARK, IRQ2_MARK, IRQ3_MARK, CS0_MARK,
222
223 VI0_CLK_MARK, VI0_CLKENB_MARK, VI0_HSYNC_MARK, VI0_VSYNC_MARK,
224 VI0_D0_B0_C0_MARK, VI0_D1_B1_C1_MARK, VI0_D2_B2_C2_MARK, VI0_D3_B3_C3_MARK,
225 VI0_D4_B4_C4_MARK, VI0_D5_B5_C5_MARK, VI0_D6_B6_C6_MARK, VI0_D7_B7_C7_MARK,
226 VI0_D8_G0_Y0_MARK, VI0_D9_G1_Y1_MARK, VI0_D10_G2_Y2_MARK, VI0_D11_G3_Y3_MARK,
227 VI0_FIELD_MARK,
228
229 VI1_CLK_MARK, VI1_CLKENB_MARK, VI1_HSYNC_MARK,
230 VI1_VSYNC_MARK, VI1_D0_B0_C0_MARK, VI1_D1_B1_C1_MARK,
231 VI1_D2_B2_C2_MARK, VI1_D3_B3_C3_MARK, VI1_D4_B4_C4_MARK,
232 VI1_D5_B5_C5_MARK, VI1_D6_B6_C6_MARK, VI1_D7_B7_C7_MARK,
233 VI1_D8_G0_Y0_MARK, VI1_D9_G1_Y1_MARK, VI1_D10_G2_Y2_MARK,
234 VI1_D11_G3_Y3_MARK, VI1_FIELD_MARK,
235
236 VI3_D10_Y2_MARK, VI3_FIELD_MARK,
237
238 VI4_CLK_MARK,
239
240 VI5_CLK_MARK, VI5_D9_Y1_MARK, VI5_D10_Y2_MARK, VI5_D11_Y3_MARK, VI5_FIELD_MARK,
241
242 HRTS0_MARK, HCTS1_MARK, SCK0_MARK, CTS0_MARK, RTS0_MARK, TX0_MARK,
243 RX0_MARK, SCK1_MARK, CTS1_MARK, RTS1_MARK, TX1_MARK, RX1_MARK,
244 SCIF_CLK_MARK, CAN0_TX_MARK, CAN0_RX_MARK,
245 CAN_CLK_MARK, CAN1_TX_MARK, CAN1_RX_MARK,
246
247 SD0_CLK_MARK, SD0_CMD_MARK, SD0_DAT0_MARK,
248 SD0_DAT1_MARK, SD0_DAT2_MARK, SD0_DAT3_MARK,
249 SD0_CD_MARK, SD0_WP_MARK, ADICLK_MARK,
250 ADICS_SAMP_MARK, ADIDATA_MARK, ADICHS0_MARK,
251 ADICHS1_MARK, ADICHS2_MARK, AVS1_MARK, AVS2_MARK,
252
253 DU0_DR0_DATA0_MARK, DU0_DR1_DATA1_MARK, DU0_DR2_Y4_DATA2_MARK,
254 DU0_DR3_Y5_DATA3_MARK, DU0_DR4_Y6_DATA4_MARK, DU0_DR5_Y7_DATA5_MARK,
255 DU0_DR6_Y8_DATA6_MARK, DU0_DR7_Y9_DATA7_MARK, DU0_DG0_DATA8_MARK,
256 DU0_DG1_DATA9_MARK, DU0_DG2_C6_DATA10_MARK, DU0_DG3_C7_DATA11_MARK,
257 DU0_DG4_Y0_DATA12_MARK, DU0_DG5_Y1_DATA13_MARK, DU0_DG6_Y2_DATA14_MARK,
258 DU0_DG7_Y3_DATA15_MARK, DU0_DB0_MARK, DU0_DB1_MARK,
259 DU0_DB2_C0_MARK, DU0_DB3_C1_MARK, DU0_DB4_C2_MARK,
260 DU0_DB5_C3_MARK, DU0_DB6_C4_MARK, DU0_DB7_C5_MARK,
261
262 DU0_EXHSYNC_DU0_HSYNC_MARK, DU0_EXVSYNC_DU0_VSYNC_MARK,
263 DU0_EXODDF_DU0_ODDF_DISP_CDE_MARK, DU0_DISP_MARK, DU0_CDE_MARK,
264 DU1_DR2_Y4_DATA0_MARK, DU1_DR3_Y5_DATA1_MARK, DU1_DR4_Y6_DATA2_MARK,
265 DU1_DR5_Y7_DATA3_MARK, DU1_DR6_DATA4_MARK, DU1_DR7_DATA5_MARK,
266 DU1_DG2_C6_DATA6_MARK, DU1_DG3_C7_DATA7_MARK, DU1_DG4_Y0_DATA8_MARK,
267 DU1_DG5_Y1_DATA9_MARK, DU1_DG6_Y2_DATA10_MARK, DU1_DG7_Y3_DATA11_MARK,
268 A20_MARK, MOSI_IO0_MARK, A21_MARK, MISO_IO1_MARK, A22_MARK, IO2_MARK,
269 A23_MARK, IO3_MARK, A24_MARK, SPCLK_MARK, A25_MARK, SSL_MARK,
270
271 VI2_CLK_MARK, AVB_RX_CLK_MARK, VI2_CLKENB_MARK, AVB_RX_DV_MARK,
272 VI2_HSYNC_MARK, AVB_RXD0_MARK, VI2_VSYNC_MARK, AVB_RXD1_MARK,
273 VI2_D0_C0_MARK, AVB_RXD2_MARK, VI2_D1_C1_MARK, AVB_RXD3_MARK,
274 VI2_D2_C2_MARK, AVB_RXD4_MARK, VI2_D3_C3_MARK, AVB_RXD5_MARK,
275 VI2_D4_C4_MARK, AVB_RXD6_MARK, VI2_D5_C5_MARK, AVB_RXD7_MARK,
276 VI2_D6_C6_MARK, AVB_RX_ER_MARK, VI2_D7_C7_MARK, AVB_COL_MARK,
277 VI2_D8_Y0_MARK, AVB_TXD3_MARK, VI2_D9_Y1_MARK, AVB_TX_EN_MARK,
278 VI2_D10_Y2_MARK, AVB_TXD0_MARK, VI2_D11_Y3_MARK, AVB_TXD1_MARK,
279 VI2_FIELD_MARK, AVB_TXD2_MARK,
280
281 VI3_CLK_MARK, AVB_TX_CLK_MARK, VI3_CLKENB_MARK, AVB_TXD4_MARK,
282 VI3_HSYNC_MARK, AVB_TXD5_MARK, VI3_VSYNC_MARK, AVB_TXD6_MARK,
283 VI3_D0_C0_MARK, AVB_TXD7_MARK, VI3_D1_C1_MARK, AVB_TX_ER_MARK,
284 VI3_D2_C2_MARK, AVB_GTX_CLK_MARK, VI3_D3_C3_MARK, AVB_MDC_MARK,
285 VI3_D4_C4_MARK, AVB_MDIO_MARK, VI3_D5_C5_MARK, AVB_LINK_MARK,
286 VI3_D6_C6_MARK, AVB_MAGIC_MARK, VI3_D7_C7_MARK, AVB_PHY_INT_MARK,
287 VI3_D8_Y0_MARK, AVB_CRS_MARK, VI3_D9_Y1_MARK, AVB_GTXREFCLK_MARK,
288 VI3_D11_Y3_MARK,
289
290 VI4_CLKENB_MARK, VI0_D12_G4_Y4_MARK, VI4_HSYNC_MARK, VI0_D13_G5_Y5_MARK,
291 VI4_VSYNC_MARK, VI0_D14_G6_Y6_MARK, VI4_D0_C0_MARK, VI0_D15_G7_Y7_MARK,
292 VI4_D1_C1_MARK, VI0_D16_R0_MARK, VI1_D12_G4_Y4_0_MARK,
293 VI4_D2_C2_MARK, VI0_D17_R1_MARK, VI1_D13_G5_Y5_0_MARK,
294 VI4_D3_C3_MARK, VI0_D18_R2_MARK, VI1_D14_G6_Y6_0_MARK,
295 VI4_D4_C4_MARK, VI0_D19_R3_MARK, VI1_D15_G7_Y7_0_MARK,
296 VI4_D5_C5_MARK, VI0_D20_R4_MARK, VI2_D12_Y4_MARK,
297 VI4_D6_C6_MARK, VI0_D21_R5_MARK, VI2_D13_Y5_MARK,
298 VI4_D7_C7_MARK, VI0_D22_R6_MARK, VI2_D14_Y6_MARK,
299 VI4_D8_Y0_MARK, VI0_D23_R7_MARK, VI2_D15_Y7_MARK,
300 VI4_D9_Y1_MARK, VI3_D12_Y4_MARK, VI4_D10_Y2_MARK, VI3_D13_Y5_MARK,
301 VI4_D11_Y3_MARK, VI3_D14_Y6_MARK, VI4_FIELD_MARK, VI3_D15_Y7_MARK,
302
303 VI5_CLKENB_MARK, VI1_D12_G4_Y4_1_MARK, VI5_HSYNC_MARK, VI1_D13_G5_Y5_1_MARK,
304 VI5_VSYNC_MARK, VI1_D14_G6_Y6_1_MARK, VI5_D0_C0_MARK, VI1_D15_G7_Y7_1_MARK,
305 VI5_D1_C1_MARK, VI1_D16_R0_MARK, VI5_D2_C2_MARK, VI1_D17_R1_MARK,
306 VI5_D3_C3_MARK, VI1_D18_R2_MARK, VI5_D4_C4_MARK, VI1_D19_R3_MARK,
307 VI5_D5_C5_MARK, VI1_D20_R4_MARK, VI5_D6_C6_MARK, VI1_D21_R5_MARK,
308 VI5_D7_C7_MARK, VI1_D22_R6_MARK, VI5_D8_Y0_MARK, VI1_D23_R7_MARK,
309
310 MSIOF0_SCK_MARK, HSCK0_MARK, MSIOF0_SYNC_MARK, HCTS0_MARK,
311 MSIOF0_TXD_MARK, HTX0_MARK, MSIOF0_RXD_MARK, HRX0_MARK,
312 MSIOF1_SCK_MARK, HSCK1_MARK, MSIOF1_SYNC_MARK, HRTS1_MARK,
313 MSIOF1_TXD_MARK, HTX1_MARK, MSIOF1_RXD_MARK, HRX1_MARK,
314 DRACK0_MARK, SCK2_MARK, DACK0_MARK, TX2_MARK,
315 DREQ0_MARK, RX2_MARK, DACK1_MARK, SCK3_MARK,
316 TX3_MARK, DREQ1_MARK, RX3_MARK,
317
318 PWM0_MARK, TCLK1_MARK, FSO_CFE_0_MARK,
319 PWM1_MARK, TCLK2_MARK, FSO_CFE_1_MARK,
320 PWM2_MARK, TCLK3_MARK, FSO_TOE_MARK,
321 PWM3_MARK, PWM4_MARK, SSI_SCK3_MARK, TPU0TO0_MARK,
322 SSI_WS3_MARK, TPU0TO1_MARK, SSI_SDATA3_MARK, TPU0TO2_MARK,
323 SSI_SCK4_MARK, TPU0TO3_MARK, SSI_WS4_MARK,
324 SSI_SDATA4_MARK, AUDIO_CLKOUT_MARK,
325 AUDIO_CLKA_MARK, AUDIO_CLKB_MARK,
326
327 PINMUX_MARK_END,
328 };
329
330 static pinmux_enum_t pinmux_data[] = {
331 PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */
332
333 PINMUX_DATA(DU1_DB2_C0_DATA12_MARK, FN_DU1_DB2_C0_DATA12),
334 PINMUX_DATA(DU1_DB3_C1_DATA13_MARK, FN_DU1_DB3_C1_DATA13),
335 PINMUX_DATA(DU1_DB4_C2_DATA14_MARK, FN_DU1_DB4_C2_DATA14),
336 PINMUX_DATA(DU1_DB5_C3_DATA15_MARK, FN_DU1_DB5_C3_DATA15),
337 PINMUX_DATA(DU1_DB6_C4_MARK, FN_DU1_DB6_C4),
338 PINMUX_DATA(DU1_DB7_C5_MARK, FN_DU1_DB7_C5),
339 PINMUX_DATA(DU1_EXHSYNC_DU1_HSYNC_MARK, FN_DU1_EXHSYNC_DU1_HSYNC),
340 PINMUX_DATA(DU1_EXVSYNC_DU1_VSYNC_MARK, FN_DU1_EXVSYNC_DU1_VSYNC),
341 PINMUX_DATA(DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK, FN_DU1_EXODDF_DU1_ODDF_DISP_CDE),
342 PINMUX_DATA(DU1_DISP_MARK, FN_DU1_DISP),
343 PINMUX_DATA(DU1_CDE_MARK, FN_DU1_CDE),
344
345 PINMUX_DATA(D0_MARK, FN_D0),
346 PINMUX_DATA(D1_MARK, FN_D1),
347 PINMUX_DATA(D2_MARK, FN_D2),
348 PINMUX_DATA(D3_MARK, FN_D3),
349 PINMUX_DATA(D4_MARK, FN_D4),
350 PINMUX_DATA(D5_MARK, FN_D5),
351 PINMUX_DATA(D6_MARK, FN_D6),
352 PINMUX_DATA(D7_MARK, FN_D7),
353 PINMUX_DATA(D8_MARK, FN_D8),
354 PINMUX_DATA(D9_MARK, FN_D9),
355 PINMUX_DATA(D10_MARK, FN_D10),
356 PINMUX_DATA(D11_MARK, FN_D11),
357 PINMUX_DATA(D12_MARK, FN_D12),
358 PINMUX_DATA(D13_MARK, FN_D13),
359 PINMUX_DATA(D14_MARK, FN_D14),
360 PINMUX_DATA(D15_MARK, FN_D15),
361 PINMUX_DATA(A0_MARK, FN_A0),
362 PINMUX_DATA(A1_MARK, FN_A1),
363 PINMUX_DATA(A2_MARK, FN_A2),
364 PINMUX_DATA(A3_MARK, FN_A3),
365 PINMUX_DATA(A4_MARK, FN_A4),
366 PINMUX_DATA(A5_MARK, FN_A5),
367 PINMUX_DATA(A6_MARK, FN_A6),
368 PINMUX_DATA(A7_MARK, FN_A7),
369 PINMUX_DATA(A8_MARK, FN_A8),
370 PINMUX_DATA(A9_MARK, FN_A9),
371 PINMUX_DATA(A10_MARK, FN_A10),
372 PINMUX_DATA(A11_MARK, FN_A11),
373 PINMUX_DATA(A12_MARK, FN_A12),
374 PINMUX_DATA(A13_MARK, FN_A13),
375 PINMUX_DATA(A14_MARK, FN_A14),
376 PINMUX_DATA(A15_MARK, FN_A15),
377
378 PINMUX_DATA(A16_MARK, FN_A16),
379 PINMUX_DATA(A17_MARK, FN_A17),
380 PINMUX_DATA(A18_MARK, FN_A18),
381 PINMUX_DATA(A19_MARK, FN_A19),
382 PINMUX_DATA(CS1_A26_MARK, FN_CS1_A26),
383 PINMUX_DATA(EX_CS0_MARK, FN_EX_CS0),
384 PINMUX_DATA(EX_CS1_MARK, FN_EX_CS1),
385 PINMUX_DATA(EX_CS2_MARK, FN_EX_CS2),
386 PINMUX_DATA(EX_CS3_MARK, FN_EX_CS3),
387 PINMUX_DATA(EX_CS4_MARK, FN_EX_CS4),
388 PINMUX_DATA(EX_CS5_MARK, FN_EX_CS5),
389 PINMUX_DATA(BS_MARK, FN_BS),
390 PINMUX_DATA(RD_MARK, FN_RD),
391 PINMUX_DATA(RD_WR_MARK, FN_RD_WR),
392 PINMUX_DATA(WE0_MARK, FN_WE0),
393 PINMUX_DATA(WE1_MARK, FN_WE1),
394 PINMUX_DATA(EX_WAIT0_MARK, FN_EX_WAIT0),
395 PINMUX_DATA(IRQ0_MARK, FN_IRQ0),
396 PINMUX_DATA(IRQ1_MARK, FN_IRQ1),
397 PINMUX_DATA(IRQ2_MARK, FN_IRQ2),
398 PINMUX_DATA(IRQ3_MARK, FN_IRQ3),
399 PINMUX_DATA(CS0_MARK, FN_CS0),
400
401 PINMUX_DATA(VI0_CLK_MARK, FN_VI0_CLK),
402 PINMUX_DATA(VI0_CLKENB_MARK, FN_VI0_CLKENB),
403 PINMUX_DATA(VI0_HSYNC_MARK, FN_VI0_HSYNC),
404 PINMUX_DATA(VI0_VSYNC_MARK, FN_VI0_VSYNC),
405 PINMUX_DATA(VI0_D0_B0_C0_MARK, FN_VI0_D0_B0_C0),
406 PINMUX_DATA(VI0_D1_B1_C1_MARK, FN_VI0_D1_B1_C1),
407 PINMUX_DATA(VI0_D2_B2_C2_MARK, FN_VI0_D2_B2_C2),
408 PINMUX_DATA(VI0_D3_B3_C3_MARK, FN_VI0_D3_B3_C3),
409 PINMUX_DATA(VI0_D4_B4_C4_MARK, FN_VI0_D4_B4_C4),
410 PINMUX_DATA(VI0_D5_B5_C5_MARK, FN_VI0_D5_B5_C5),
411 PINMUX_DATA(VI0_D6_B6_C6_MARK, FN_VI0_D6_B6_C6),
412 PINMUX_DATA(VI0_D7_B7_C7_MARK, FN_VI0_D7_B7_C7),
413 PINMUX_DATA(VI0_D8_G0_Y0_MARK, FN_VI0_D8_G0_Y0),
414 PINMUX_DATA(VI0_D9_G1_Y1_MARK, FN_VI0_D9_G1_Y1),
415 PINMUX_DATA(VI0_D10_G2_Y2_MARK, FN_VI0_D10_G2_Y2),
416 PINMUX_DATA(VI0_D11_G3_Y3_MARK, FN_VI0_D11_G3_Y3),
417 PINMUX_DATA(VI0_FIELD_MARK, FN_VI0_FIELD),
418
419 PINMUX_DATA(VI1_CLK_MARK, FN_VI1_CLK),
420 PINMUX_DATA(VI1_CLKENB_MARK, FN_VI1_CLKENB),
421 PINMUX_DATA(VI1_HSYNC_MARK, FN_VI1_HSYNC),
422 PINMUX_DATA(VI1_VSYNC_MARK, FN_VI1_VSYNC),
423 PINMUX_DATA(VI1_D0_B0_C0_MARK, FN_VI1_D0_B0_C0),
424 PINMUX_DATA(VI1_D1_B1_C1_MARK, FN_VI1_D1_B1_C1),
425 PINMUX_DATA(VI1_D2_B2_C2_MARK, FN_VI1_D2_B2_C2),
426 PINMUX_DATA(VI1_D3_B3_C3_MARK, FN_VI1_D3_B3_C3),
427 PINMUX_DATA(VI1_D4_B4_C4_MARK, FN_VI1_D4_B4_C4),
428 PINMUX_DATA(VI1_D5_B5_C5_MARK, FN_VI1_D5_B5_C5),
429 PINMUX_DATA(VI1_D6_B6_C6_MARK, FN_VI1_D6_B6_C6),
430 PINMUX_DATA(VI1_D7_B7_C7_MARK, FN_VI1_D7_B7_C7),
431 PINMUX_DATA(VI1_D8_G0_Y0_MARK, FN_VI1_D8_G0_Y0),
432 PINMUX_DATA(VI1_D9_G1_Y1_MARK, FN_VI1_D9_G1_Y1),
433 PINMUX_DATA(VI1_D10_G2_Y2_MARK, FN_VI1_D10_G2_Y2),
434 PINMUX_DATA(VI1_D11_G3_Y3_MARK, FN_VI1_D11_G3_Y3),
435 PINMUX_DATA(VI1_FIELD_MARK, FN_VI1_FIELD),
436
437 PINMUX_DATA(VI3_D10_Y2_MARK, FN_VI3_D10_Y2),
438 PINMUX_DATA(VI3_FIELD_MARK, FN_VI3_FIELD),
439
440 PINMUX_DATA(VI4_CLK_MARK, FN_VI4_CLK),
441
442 PINMUX_DATA(VI5_CLK_MARK, FN_VI5_CLK),
443 PINMUX_DATA(VI5_D9_Y1_MARK, FN_VI5_D9_Y1),
444 PINMUX_DATA(VI5_D10_Y2_MARK, FN_VI5_D10_Y2),
445 PINMUX_DATA(VI5_D11_Y3_MARK, FN_VI5_D11_Y3),
446 PINMUX_DATA(VI5_FIELD_MARK, FN_VI5_FIELD),
447
448 PINMUX_DATA(HRTS0_MARK, FN_HRTS0),
449 PINMUX_DATA(HCTS1_MARK, FN_HCTS1),
450 PINMUX_DATA(SCK0_MARK, FN_SCK0),
451 PINMUX_DATA(CTS0_MARK, FN_CTS0),
452 PINMUX_DATA(RTS0_MARK, FN_RTS0),
453 PINMUX_DATA(TX0_MARK, FN_TX0),
454 PINMUX_DATA(RX0_MARK, FN_RX0),
455 PINMUX_DATA(SCK1_MARK, FN_SCK1),
456 PINMUX_DATA(CTS1_MARK, FN_CTS1),
457 PINMUX_DATA(RTS1_MARK, FN_RTS1),
458 PINMUX_DATA(TX1_MARK, FN_TX1),
459 PINMUX_DATA(RX1_MARK, FN_RX1),
460 PINMUX_DATA(SCIF_CLK_MARK, FN_SCIF_CLK),
461 PINMUX_DATA(CAN0_TX_MARK, FN_CAN0_TX),
462 PINMUX_DATA(CAN0_RX_MARK, FN_CAN0_RX),
463 PINMUX_DATA(CAN_CLK_MARK, FN_CAN_CLK),
464 PINMUX_DATA(CAN1_TX_MARK, FN_CAN1_TX),
465 PINMUX_DATA(CAN1_RX_MARK, FN_CAN1_RX),
466
467 PINMUX_DATA(SD0_CLK_MARK, FN_SD0_CLK),
468 PINMUX_DATA(SD0_CMD_MARK, FN_SD0_CMD),
469 PINMUX_DATA(SD0_DAT0_MARK, FN_SD0_DAT0),
470 PINMUX_DATA(SD0_DAT1_MARK, FN_SD0_DAT1),
471 PINMUX_DATA(SD0_DAT2_MARK, FN_SD0_DAT2),
472 PINMUX_DATA(SD0_DAT3_MARK, FN_SD0_DAT3),
473 PINMUX_DATA(SD0_CD_MARK, FN_SD0_CD),
474 PINMUX_DATA(SD0_WP_MARK, FN_SD0_WP),
475 PINMUX_DATA(ADICLK_MARK, FN_ADICLK),
476 PINMUX_DATA(ADICS_SAMP_MARK, FN_ADICS_SAMP),
477 PINMUX_DATA(ADIDATA_MARK, FN_ADIDATA),
478 PINMUX_DATA(ADICHS0_MARK, FN_ADICHS0),
479 PINMUX_DATA(ADICHS1_MARK, FN_ADICHS1),
480 PINMUX_DATA(ADICHS2_MARK, FN_ADICHS2),
481 PINMUX_DATA(AVS1_MARK, FN_AVS1),
482 PINMUX_DATA(AVS2_MARK, FN_AVS2),
483
484 PINMUX_IPSR_DATA(IP0_0, DU0_DR0_DATA0),
485 PINMUX_IPSR_DATA(IP0_1, DU0_DR1_DATA1),
486 PINMUX_IPSR_DATA(IP0_2, DU0_DR2_Y4_DATA2),
487 PINMUX_IPSR_DATA(IP0_3, DU0_DR3_Y5_DATA3),
488 PINMUX_IPSR_DATA(IP0_4, DU0_DR4_Y6_DATA4),
489 PINMUX_IPSR_DATA(IP0_5, DU0_DR5_Y7_DATA5),
490 PINMUX_IPSR_DATA(IP0_6, DU0_DR6_Y8_DATA6),
491 PINMUX_IPSR_DATA(IP0_7, DU0_DR7_Y9_DATA7),
492 PINMUX_IPSR_DATA(IP0_8, DU0_DG0_DATA8),
493 PINMUX_IPSR_DATA(IP0_9, DU0_DG1_DATA9),
494 PINMUX_IPSR_DATA(IP0_10, DU0_DG2_C6_DATA10),
495 PINMUX_IPSR_DATA(IP0_11, DU0_DG3_C7_DATA11),
496 PINMUX_IPSR_DATA(IP0_12, DU0_DG4_Y0_DATA12),
497 PINMUX_IPSR_DATA(IP0_13, DU0_DG5_Y1_DATA13),
498 PINMUX_IPSR_DATA(IP0_14, DU0_DG6_Y2_DATA14),
499 PINMUX_IPSR_DATA(IP0_15, DU0_DG7_Y3_DATA15),
500 PINMUX_IPSR_DATA(IP0_16, DU0_DB0),
501 PINMUX_IPSR_DATA(IP0_17, DU0_DB1),
502 PINMUX_IPSR_DATA(IP0_18, DU0_DB2_C0),
503 PINMUX_IPSR_DATA(IP0_19, DU0_DB3_C1),
504 PINMUX_IPSR_DATA(IP0_20, DU0_DB4_C2),
505 PINMUX_IPSR_DATA(IP0_21, DU0_DB5_C3),
506 PINMUX_IPSR_DATA(IP0_22, DU0_DB6_C4),
507 PINMUX_IPSR_DATA(IP0_23, DU0_DB7_C5),
508
509 PINMUX_IPSR_DATA(IP1_0, DU0_EXHSYNC_DU0_HSYNC),
510 PINMUX_IPSR_DATA(IP1_1, DU0_EXVSYNC_DU0_VSYNC),
511 PINMUX_IPSR_DATA(IP1_2, DU0_EXODDF_DU0_ODDF_DISP_CDE),
512 PINMUX_IPSR_DATA(IP1_3, DU0_DISP),
513 PINMUX_IPSR_DATA(IP1_4, DU0_CDE),
514 PINMUX_IPSR_DATA(IP1_5, DU1_DR2_Y4_DATA0),
515 PINMUX_IPSR_DATA(IP1_6, DU1_DR3_Y5_DATA1),
516 PINMUX_IPSR_DATA(IP1_7, DU1_DR4_Y6_DATA2),
517 PINMUX_IPSR_DATA(IP1_8, DU1_DR5_Y7_DATA3),
518 PINMUX_IPSR_DATA(IP1_9, DU1_DR6_DATA4),
519 PINMUX_IPSR_DATA(IP1_10, DU1_DR7_DATA5),
520 PINMUX_IPSR_DATA(IP1_11, DU1_DG2_C6_DATA6),
521 PINMUX_IPSR_DATA(IP1_12, DU1_DG3_C7_DATA7),
522 PINMUX_IPSR_DATA(IP1_13, DU1_DG4_Y0_DATA8),
523 PINMUX_IPSR_DATA(IP1_14, DU1_DG5_Y1_DATA9),
524 PINMUX_IPSR_DATA(IP1_15, DU1_DG6_Y2_DATA10),
525 PINMUX_IPSR_DATA(IP1_16, DU1_DG7_Y3_DATA11),
526 PINMUX_IPSR_DATA(IP1_17, A20),
527 PINMUX_IPSR_DATA(IP1_17, MOSI_IO0),
528 PINMUX_IPSR_DATA(IP1_18, A21),
529 PINMUX_IPSR_DATA(IP1_18, MISO_IO1),
530 PINMUX_IPSR_DATA(IP1_19, A22),
531 PINMUX_IPSR_DATA(IP1_19, IO2),
532 PINMUX_IPSR_DATA(IP1_20, A23),
533 PINMUX_IPSR_DATA(IP1_20, IO3),
534 PINMUX_IPSR_DATA(IP1_21, A24),
535 PINMUX_IPSR_DATA(IP1_21, SPCLK),
536 PINMUX_IPSR_DATA(IP1_22, A25),
537 PINMUX_IPSR_DATA(IP1_22, SSL),
538
539 PINMUX_IPSR_DATA(IP2_0, VI2_CLK),
540 PINMUX_IPSR_DATA(IP2_0, AVB_RX_CLK),
541 PINMUX_IPSR_DATA(IP2_1, VI2_CLKENB),
542 PINMUX_IPSR_DATA(IP2_1, AVB_RX_DV),
543 PINMUX_IPSR_DATA(IP2_2, VI2_HSYNC),
544 PINMUX_IPSR_DATA(IP2_2, AVB_RXD0),
545 PINMUX_IPSR_DATA(IP2_3, VI2_VSYNC),
546 PINMUX_IPSR_DATA(IP2_3, AVB_RXD1),
547 PINMUX_IPSR_DATA(IP2_4, VI2_D0_C0),
548 PINMUX_IPSR_DATA(IP2_4, AVB_RXD2),
549 PINMUX_IPSR_DATA(IP2_5, VI2_D1_C1),
550 PINMUX_IPSR_DATA(IP2_5, AVB_RXD3),
551 PINMUX_IPSR_DATA(IP2_6, VI2_D2_C2),
552 PINMUX_IPSR_DATA(IP2_6, AVB_RXD4),
553 PINMUX_IPSR_DATA(IP2_7, VI2_D3_C3),
554 PINMUX_IPSR_DATA(IP2_7, AVB_RXD5),
555 PINMUX_IPSR_DATA(IP2_8, VI2_D4_C4),
556 PINMUX_IPSR_DATA(IP2_8, AVB_RXD6),
557 PINMUX_IPSR_DATA(IP2_9, VI2_D5_C5),
558 PINMUX_IPSR_DATA(IP2_9, AVB_RXD7),
559 PINMUX_IPSR_DATA(IP2_10, VI2_D6_C6),
560 PINMUX_IPSR_DATA(IP2_10, AVB_RX_ER),
561 PINMUX_IPSR_DATA(IP2_11, VI2_D7_C7),
562 PINMUX_IPSR_DATA(IP2_11, AVB_COL),
563 PINMUX_IPSR_DATA(IP2_12, VI2_D8_Y0),
564 PINMUX_IPSR_DATA(IP2_12, AVB_TXD3),
565 PINMUX_IPSR_DATA(IP2_13, VI2_D9_Y1),
566 PINMUX_IPSR_DATA(IP2_13, AVB_TX_EN),
567 PINMUX_IPSR_DATA(IP2_14, VI2_D10_Y2),
568 PINMUX_IPSR_DATA(IP2_14, AVB_TXD0),
569 PINMUX_IPSR_DATA(IP2_15, VI2_D11_Y3),
570 PINMUX_IPSR_DATA(IP2_15, AVB_TXD1),
571 PINMUX_IPSR_DATA(IP2_16, VI2_FIELD),
572 PINMUX_IPSR_DATA(IP2_16, AVB_TXD2),
573
574 PINMUX_IPSR_DATA(IP3_0, VI3_CLK),
575 PINMUX_IPSR_DATA(IP3_0, AVB_TX_CLK),
576 PINMUX_IPSR_DATA(IP3_1, VI3_CLKENB),
577 PINMUX_IPSR_DATA(IP3_1, AVB_TXD4),
578 PINMUX_IPSR_DATA(IP3_2, VI3_HSYNC),
579 PINMUX_IPSR_DATA(IP3_2, AVB_TXD5),
580 PINMUX_IPSR_DATA(IP3_3, VI3_VSYNC),
581 PINMUX_IPSR_DATA(IP3_3, AVB_TXD6),
582 PINMUX_IPSR_DATA(IP3_4, VI3_D0_C0),
583 PINMUX_IPSR_DATA(IP3_4, AVB_TXD7),
584 PINMUX_IPSR_DATA(IP3_5, VI3_D1_C1),
585 PINMUX_IPSR_DATA(IP3_5, AVB_TX_ER),
586 PINMUX_IPSR_DATA(IP3_6, VI3_D2_C2),
587 PINMUX_IPSR_DATA(IP3_6, AVB_GTX_CLK),
588 PINMUX_IPSR_DATA(IP3_7, VI3_D3_C3),
589 PINMUX_IPSR_DATA(IP3_7, AVB_MDC),
590 PINMUX_IPSR_DATA(IP3_8, VI3_D4_C4),
591 PINMUX_IPSR_DATA(IP3_8, AVB_MDIO),
592 PINMUX_IPSR_DATA(IP3_9, VI3_D5_C5),
593 PINMUX_IPSR_DATA(IP3_9, AVB_LINK),
594 PINMUX_IPSR_DATA(IP3_10, VI3_D6_C6),
595 PINMUX_IPSR_DATA(IP3_10, AVB_MAGIC),
596 PINMUX_IPSR_DATA(IP3_11, VI3_D7_C7),
597 PINMUX_IPSR_DATA(IP3_11, AVB_PHY_INT),
598 PINMUX_IPSR_DATA(IP3_12, VI3_D8_Y0),
599 PINMUX_IPSR_DATA(IP3_12, AVB_CRS),
600 PINMUX_IPSR_DATA(IP3_13, VI3_D9_Y1),
601 PINMUX_IPSR_DATA(IP3_13, AVB_GTXREFCLK),
602 PINMUX_IPSR_DATA(IP3_14, VI3_D11_Y3),
603
604 PINMUX_IPSR_DATA(IP4_0, VI4_CLKENB),
605 PINMUX_IPSR_DATA(IP4_0, VI0_D12_G4_Y4),
606 PINMUX_IPSR_DATA(IP4_1, VI4_HSYNC),
607 PINMUX_IPSR_DATA(IP4_1, VI0_D13_G5_Y5),
608 PINMUX_IPSR_DATA(IP4_3_2, VI4_VSYNC),
609 PINMUX_IPSR_DATA(IP4_3_2, VI0_D14_G6_Y6),
610 PINMUX_IPSR_DATA(IP4_4, VI4_D0_C0),
611 PINMUX_IPSR_DATA(IP4_4, VI0_D15_G7_Y7),
612 PINMUX_IPSR_DATA(IP4_6_5, VI4_D1_C1),
613 PINMUX_IPSR_DATA(IP4_6_5, VI0_D16_R0),
614 PINMUX_IPSR_MODSEL_DATA(IP4_6_5, VI1_D12_G4_Y4_0, SEL_VI1_0),
615 PINMUX_IPSR_DATA(IP4_8_7, VI4_D2_C2),
616 PINMUX_IPSR_DATA(IP4_8_7, VI0_D17_R1),
617 PINMUX_IPSR_MODSEL_DATA(IP4_8_7, VI1_D13_G5_Y5_0, SEL_VI1_0),
618 PINMUX_IPSR_DATA(IP4_10_9, VI4_D3_C3),
619 PINMUX_IPSR_DATA(IP4_10_9, VI0_D18_R2),
620 PINMUX_IPSR_MODSEL_DATA(IP4_10_9, VI1_D14_G6_Y6_0, SEL_VI1_0),
621 PINMUX_IPSR_DATA(IP4_12_11, VI4_D4_C4),
622 PINMUX_IPSR_DATA(IP4_12_11, VI0_D19_R3),
623 PINMUX_IPSR_MODSEL_DATA(IP4_12_11, VI1_D15_G7_Y7_0, SEL_VI1_0),
624 PINMUX_IPSR_DATA(IP4_14_13, VI4_D5_C5),
625 PINMUX_IPSR_DATA(IP4_14_13, VI0_D20_R4),
626 PINMUX_IPSR_DATA(IP4_14_13, VI2_D12_Y4),
627 PINMUX_IPSR_DATA(IP4_16_15, VI4_D6_C6),
628 PINMUX_IPSR_DATA(IP4_16_15, VI0_D21_R5),
629 PINMUX_IPSR_DATA(IP4_16_15, VI2_D13_Y5),
630 PINMUX_IPSR_DATA(IP4_18_17, VI4_D7_C7),
631 PINMUX_IPSR_DATA(IP4_18_17, VI0_D22_R6),
632 PINMUX_IPSR_DATA(IP4_18_17, VI2_D14_Y6),
633 PINMUX_IPSR_DATA(IP4_20_19, VI4_D8_Y0),
634 PINMUX_IPSR_DATA(IP4_20_19, VI0_D23_R7),
635 PINMUX_IPSR_DATA(IP4_20_19, VI2_D15_Y7),
636 PINMUX_IPSR_DATA(IP4_21, VI4_D9_Y1),
637 PINMUX_IPSR_DATA(IP4_21, VI3_D12_Y4),
638 PINMUX_IPSR_DATA(IP4_22, VI4_D10_Y2),
639 PINMUX_IPSR_DATA(IP4_22, VI3_D13_Y5),
640 PINMUX_IPSR_DATA(IP4_23, VI4_D11_Y3),
641 PINMUX_IPSR_DATA(IP4_23, VI3_D14_Y6),
642 PINMUX_IPSR_DATA(IP4_24, VI4_FIELD),
643 PINMUX_IPSR_DATA(IP4_24, VI3_D15_Y7),
644
645 PINMUX_IPSR_DATA(IP5_0, VI5_CLKENB),
646 PINMUX_IPSR_MODSEL_DATA(IP5_0, VI1_D12_G4_Y4_1, SEL_VI1_1),
647 PINMUX_IPSR_DATA(IP5_1, VI5_HSYNC),
648 PINMUX_IPSR_MODSEL_DATA(IP5_1, VI1_D13_G5_Y5_1, SEL_VI1_1),
649 PINMUX_IPSR_DATA(IP5_2, VI5_VSYNC),
650 PINMUX_IPSR_MODSEL_DATA(IP5_2, VI1_D14_G6_Y6_1, SEL_VI1_1),
651 PINMUX_IPSR_DATA(IP5_3, VI5_D0_C0),
652 PINMUX_IPSR_MODSEL_DATA(IP5_3, VI1_D15_G7_Y7_1, SEL_VI1_1),
653 PINMUX_IPSR_DATA(IP5_4, VI5_D1_C1),
654 PINMUX_IPSR_DATA(IP5_4, VI1_D16_R0),
655 PINMUX_IPSR_DATA(IP5_5, VI5_D2_C2),
656 PINMUX_IPSR_DATA(IP5_5, VI1_D17_R1),
657 PINMUX_IPSR_DATA(IP5_6, VI5_D3_C3),
658 PINMUX_IPSR_DATA(IP5_6, VI1_D18_R2),
659 PINMUX_IPSR_DATA(IP5_7, VI5_D4_C4),
660 PINMUX_IPSR_DATA(IP5_7, VI1_D19_R3),
661 PINMUX_IPSR_DATA(IP5_8, VI5_D5_C5),
662 PINMUX_IPSR_DATA(IP5_8, VI1_D20_R4),
663 PINMUX_IPSR_DATA(IP5_9, VI5_D6_C6),
664 PINMUX_IPSR_DATA(IP5_9, VI1_D21_R5),
665 PINMUX_IPSR_DATA(IP5_10, VI5_D7_C7),
666 PINMUX_IPSR_DATA(IP5_10, VI1_D22_R6),
667 PINMUX_IPSR_DATA(IP5_11, VI5_D8_Y0),
668 PINMUX_IPSR_DATA(IP5_11, VI1_D23_R7),
669
670 PINMUX_IPSR_DATA(IP6_0, MSIOF0_SCK),
671 PINMUX_IPSR_DATA(IP6_0, HSCK0),
672 PINMUX_IPSR_DATA(IP6_1, MSIOF0_SYNC),
673 PINMUX_IPSR_DATA(IP6_1, HCTS0),
674 PINMUX_IPSR_DATA(IP6_2, MSIOF0_TXD),
675 PINMUX_IPSR_DATA(IP6_2, HTX0),
676 PINMUX_IPSR_DATA(IP6_3, MSIOF0_RXD),
677 PINMUX_IPSR_DATA(IP6_3, HRX0),
678 PINMUX_IPSR_DATA(IP6_4, MSIOF1_SCK),
679 PINMUX_IPSR_DATA(IP6_4, HSCK1),
680 PINMUX_IPSR_DATA(IP6_5, MSIOF1_SYNC),
681 PINMUX_IPSR_DATA(IP6_5, HRTS1),
682 PINMUX_IPSR_DATA(IP6_6, MSIOF1_TXD),
683 PINMUX_IPSR_DATA(IP6_6, HTX1),
684 PINMUX_IPSR_DATA(IP6_7, MSIOF1_RXD),
685 PINMUX_IPSR_DATA(IP6_7, HRX1),
686 PINMUX_IPSR_DATA(IP6_9_8, DRACK0),
687 PINMUX_IPSR_DATA(IP6_9_8, SCK2),
688 PINMUX_IPSR_DATA(IP6_11_10, DACK0),
689 PINMUX_IPSR_DATA(IP6_11_10, TX2),
690 PINMUX_IPSR_DATA(IP6_13_12, DREQ0),
691 PINMUX_IPSR_DATA(IP6_13_12, RX2),
692 PINMUX_IPSR_DATA(IP6_15_14, DACK1),
693 PINMUX_IPSR_DATA(IP6_15_14, SCK3),
694 PINMUX_IPSR_DATA(IP6_16, TX3),
695 PINMUX_IPSR_DATA(IP6_18_17, DREQ1),
696 PINMUX_IPSR_DATA(IP6_18_17, RX3),
697
698 PINMUX_IPSR_DATA(IP7_1_0, PWM0),
699 PINMUX_IPSR_DATA(IP7_1_0, TCLK1),
700 PINMUX_IPSR_DATA(IP7_1_0, FSO_CFE_0),
701 PINMUX_IPSR_DATA(IP7_3_2, PWM1),
702 PINMUX_IPSR_DATA(IP7_3_2, TCLK2),
703 PINMUX_IPSR_DATA(IP7_3_2, FSO_CFE_1),
704 PINMUX_IPSR_DATA(IP7_5_4, PWM2),
705 PINMUX_IPSR_DATA(IP7_5_4, TCLK3),
706 PINMUX_IPSR_DATA(IP7_5_4, FSO_TOE),
707 PINMUX_IPSR_DATA(IP7_6, PWM3),
708 PINMUX_IPSR_DATA(IP7_7, PWM4),
709 PINMUX_IPSR_DATA(IP7_9_8, SSI_SCK3),
710 PINMUX_IPSR_DATA(IP7_9_8, TPU0TO0),
711 PINMUX_IPSR_DATA(IP7_11_10, SSI_WS3),
712 PINMUX_IPSR_DATA(IP7_11_10, TPU0TO1),
713 PINMUX_IPSR_DATA(IP7_13_12, SSI_SDATA3),
714 PINMUX_IPSR_DATA(IP7_13_12, TPU0TO2),
715 PINMUX_IPSR_DATA(IP7_15_14, SSI_SCK4),
716 PINMUX_IPSR_DATA(IP7_15_14, TPU0TO3),
717 PINMUX_IPSR_DATA(IP7_16, SSI_WS4),
718 PINMUX_IPSR_DATA(IP7_17, SSI_SDATA4),
719 PINMUX_IPSR_DATA(IP7_18, AUDIO_CLKOUT),
720 PINMUX_IPSR_DATA(IP7_19, AUDIO_CLKA),
721 PINMUX_IPSR_DATA(IP7_20, AUDIO_CLKB),
722 };
723
724 static struct pinmux_gpio pinmux_gpios[] = {
725 PINMUX_GPIO_GP_ALL(),
726
727 GPIO_FN(DU1_DB2_C0_DATA12), GPIO_FN(DU1_DB3_C1_DATA13),
728 GPIO_FN(DU1_DB4_C2_DATA14), GPIO_FN(DU1_DB5_C3_DATA15),
729 GPIO_FN(DU1_DB6_C4), GPIO_FN(DU1_DB7_C5),
730 GPIO_FN(DU1_EXHSYNC_DU1_HSYNC), GPIO_FN(DU1_EXVSYNC_DU1_VSYNC),
731 GPIO_FN(DU1_EXODDF_DU1_ODDF_DISP_CDE), GPIO_FN(DU1_DISP), GPIO_FN(DU1_CDE),
732
733 GPIO_FN(D0), GPIO_FN(D1), GPIO_FN(D2), GPIO_FN(D3),
734 GPIO_FN(D4), GPIO_FN(D5), GPIO_FN(D6), GPIO_FN(D7),
735 GPIO_FN(D8), GPIO_FN(D9), GPIO_FN(D10), GPIO_FN(D11),
736 GPIO_FN(D12), GPIO_FN(D13), GPIO_FN(D14), GPIO_FN(D15),
737 GPIO_FN(A0), GPIO_FN(A1), GPIO_FN(A2), GPIO_FN(A3),
738 GPIO_FN(A4), GPIO_FN(A5), GPIO_FN(A6), GPIO_FN(A7),
739 GPIO_FN(A8), GPIO_FN(A9), GPIO_FN(A10), GPIO_FN(A11),
740 GPIO_FN(A12), GPIO_FN(A13), GPIO_FN(A14), GPIO_FN(A15),
741
742 GPIO_FN(A16), GPIO_FN(A17), GPIO_FN(A18), GPIO_FN(A19),
743 GPIO_FN(CS1_A26), GPIO_FN(EX_CS0), GPIO_FN(EX_CS1), GPIO_FN(EX_CS2),
744 GPIO_FN(EX_CS3), GPIO_FN(EX_CS4), GPIO_FN(EX_CS5), GPIO_FN(BS),
745 GPIO_FN(RD), GPIO_FN(RD_WR), GPIO_FN(WE0), GPIO_FN(WE1),
746 GPIO_FN(EX_WAIT0), GPIO_FN(IRQ0), GPIO_FN(IRQ1), GPIO_FN(IRQ2),
747 GPIO_FN(IRQ3), GPIO_FN(CS0),
748
749 GPIO_FN(VI0_CLK), GPIO_FN(VI0_CLKENB), GPIO_FN(VI0_HSYNC),
750 GPIO_FN(VI0_VSYNC), GPIO_FN(VI0_D0_B0_C0), GPIO_FN(VI0_D1_B1_C1),
751 GPIO_FN(VI0_D2_B2_C2), GPIO_FN(VI0_D3_B3_C3), GPIO_FN(VI0_D4_B4_C4),
752 GPIO_FN(VI0_D5_B5_C5), GPIO_FN(VI0_D6_B6_C6), GPIO_FN(VI0_D7_B7_C7),
753 GPIO_FN(VI0_D8_G0_Y0), GPIO_FN(VI0_D9_G1_Y1), GPIO_FN(VI0_D10_G2_Y2),
754 GPIO_FN(VI0_D11_G3_Y3), GPIO_FN(VI0_FIELD),
755
756 GPIO_FN(VI1_CLK), GPIO_FN(VI1_CLKENB), GPIO_FN(VI1_HSYNC),
757 GPIO_FN(VI1_VSYNC), GPIO_FN(VI1_D0_B0_C0), GPIO_FN(VI1_D1_B1_C1),
758 GPIO_FN(VI1_D2_B2_C2), GPIO_FN(VI1_D3_B3_C3), GPIO_FN(VI1_D4_B4_C4),
759 GPIO_FN(VI1_D5_B5_C5), GPIO_FN(VI1_D6_B6_C6), GPIO_FN(VI1_D7_B7_C7),
760 GPIO_FN(VI1_D8_G0_Y0), GPIO_FN(VI1_D9_G1_Y1), GPIO_FN(VI1_D10_G2_Y2),
761 GPIO_FN(VI1_D11_G3_Y3), GPIO_FN(VI1_FIELD),
762
763 GPIO_FN(VI3_D10_Y2), GPIO_FN(VI3_FIELD),
764
765 GPIO_FN(VI4_CLK),
766
767 GPIO_FN(VI5_CLK), GPIO_FN(VI5_D9_Y1), GPIO_FN(VI5_D10_Y2),
768 GPIO_FN(VI5_D11_Y3), GPIO_FN(VI5_FIELD),
769
770 GPIO_FN(HRTS0), GPIO_FN(HCTS1), GPIO_FN(SCK0), GPIO_FN(CTS0),
771 GPIO_FN(RTS0), GPIO_FN(TX0), GPIO_FN(RX0), GPIO_FN(SCK1),
772 GPIO_FN(CTS1), GPIO_FN(RTS1), GPIO_FN(TX1), GPIO_FN(RX1),
773 GPIO_FN(SCIF_CLK), GPIO_FN(CAN0_TX), GPIO_FN(CAN0_RX), GPIO_FN(CAN_CLK),
774 GPIO_FN(CAN1_TX), GPIO_FN(CAN1_RX),
775
776 GPIO_FN(SD0_CLK), GPIO_FN(SD0_CMD), GPIO_FN(SD0_DAT0),
777 GPIO_FN(SD0_DAT1), GPIO_FN(SD0_DAT2), GPIO_FN(SD0_DAT3),
778 GPIO_FN(SD0_CD), GPIO_FN(SD0_WP), GPIO_FN(ADICLK),
779 GPIO_FN(ADICS_SAMP), GPIO_FN(ADIDATA), GPIO_FN(ADICHS0),
780 GPIO_FN(ADICHS1), GPIO_FN(ADICHS2), GPIO_FN(AVS1),
781 GPIO_FN(AVS2),
782
783 GPIO_FN(DU0_DR0_DATA0), GPIO_FN(DU0_DR1_DATA1),
784 GPIO_FN(DU0_DR2_Y4_DATA2), GPIO_FN(DU0_DR3_Y5_DATA3),
785 GPIO_FN(DU0_DR4_Y6_DATA4), GPIO_FN(DU0_DR5_Y7_DATA5),
786 GPIO_FN(DU0_DR6_Y8_DATA6), GPIO_FN(DU0_DR7_Y9_DATA7),
787 GPIO_FN(DU0_DG0_DATA8), GPIO_FN(DU0_DG1_DATA9),
788 GPIO_FN(DU0_DG2_C6_DATA10), GPIO_FN(DU0_DG3_C7_DATA11),
789 GPIO_FN(DU0_DG4_Y0_DATA12), GPIO_FN(DU0_DG5_Y1_DATA13),
790 GPIO_FN(DU0_DG6_Y2_DATA14), GPIO_FN(DU0_DG7_Y3_DATA15),
791 GPIO_FN(DU0_DB0), GPIO_FN(DU0_DB1),
792 GPIO_FN(DU0_DB2_C0), GPIO_FN(DU0_DB3_C1), GPIO_FN(DU0_DB4_C2),
793 GPIO_FN(DU0_DB5_C3), GPIO_FN(DU0_DB6_C4), GPIO_FN(DU0_DB7_C5),
794
795 GPIO_FN(DU0_EXHSYNC_DU0_HSYNC), GPIO_FN(DU0_EXVSYNC_DU0_VSYNC),
796 GPIO_FN(DU0_EXODDF_DU0_ODDF_DISP_CDE), GPIO_FN(DU0_DISP),
797 GPIO_FN(DU0_CDE), GPIO_FN(DU1_DR2_Y4_DATA0), GPIO_FN(DU1_DR3_Y5_DATA1),
798 GPIO_FN(DU1_DR4_Y6_DATA2), GPIO_FN(DU1_DR5_Y7_DATA3),
799 GPIO_FN(DU1_DR6_DATA4), GPIO_FN(DU1_DR7_DATA5),
800 GPIO_FN(DU1_DG2_C6_DATA6), GPIO_FN(DU1_DG3_C7_DATA7),
801 GPIO_FN(DU1_DG4_Y0_DATA8), GPIO_FN(DU1_DG5_Y1_DATA9),
802 GPIO_FN(DU1_DG6_Y2_DATA10), GPIO_FN(DU1_DG7_Y3_DATA11),
803 GPIO_FN(A20), GPIO_FN(MOSI_IO0), GPIO_FN(A21), GPIO_FN(MISO_IO1),
804 GPIO_FN(A22), GPIO_FN(IO2), GPIO_FN(A23), GPIO_FN(IO3),
805 GPIO_FN(A24), GPIO_FN(SPCLK), GPIO_FN(A25), GPIO_FN(SSL),
806
807 GPIO_FN(VI2_CLK), GPIO_FN(AVB_RX_CLK), GPIO_FN(VI2_CLKENB),
808 GPIO_FN(AVB_RX_DV), GPIO_FN(VI2_HSYNC), GPIO_FN(AVB_RXD0),
809 GPIO_FN(VI2_VSYNC), GPIO_FN(AVB_RXD1), GPIO_FN(VI2_D0_C0),
810 GPIO_FN(AVB_RXD2), GPIO_FN(VI2_D1_C1), GPIO_FN(AVB_RXD3),
811 GPIO_FN(VI2_D2_C2), GPIO_FN(AVB_RXD4), GPIO_FN(VI2_D3_C3),
812 GPIO_FN(AVB_RXD5), GPIO_FN(VI2_D4_C4), GPIO_FN(AVB_RXD6),
813 GPIO_FN(VI2_D5_C5), GPIO_FN(AVB_RXD7), GPIO_FN(VI2_D6_C6),
814 GPIO_FN(AVB_RX_ER), GPIO_FN(VI2_D7_C7), GPIO_FN(AVB_COL),
815 GPIO_FN(VI2_D8_Y0), GPIO_FN(AVB_TXD3), GPIO_FN(VI2_D9_Y1),
816 GPIO_FN(AVB_TX_EN), GPIO_FN(VI2_D10_Y2), GPIO_FN(AVB_TXD0),
817 GPIO_FN(VI2_D11_Y3), GPIO_FN(AVB_TXD1), GPIO_FN(VI2_FIELD),
818 GPIO_FN(AVB_TXD2),
819
820 GPIO_FN(VI3_CLK), GPIO_FN(AVB_TX_CLK), GPIO_FN(VI3_CLKENB),
821 GPIO_FN(AVB_TXD4), GPIO_FN(VI3_HSYNC), GPIO_FN(AVB_TXD5),
822 GPIO_FN(VI3_VSYNC), GPIO_FN(AVB_TXD6), GPIO_FN(VI3_D0_C0),
823 GPIO_FN(AVB_TXD7), GPIO_FN(VI3_D1_C1), GPIO_FN(AVB_TX_ER),
824 GPIO_FN(VI3_D2_C2), GPIO_FN(AVB_GTX_CLK), GPIO_FN(VI3_D3_C3),
825 GPIO_FN(AVB_MDC), GPIO_FN(VI3_D4_C4), GPIO_FN(AVB_MDIO),
826 GPIO_FN(VI3_D5_C5), GPIO_FN(AVB_LINK), GPIO_FN(VI3_D6_C6),
827 GPIO_FN(AVB_MAGIC), GPIO_FN(VI3_D7_C7), GPIO_FN(AVB_PHY_INT),
828 GPIO_FN(VI3_D8_Y0), GPIO_FN(AVB_CRS), GPIO_FN(VI3_D9_Y1),
829 GPIO_FN(AVB_GTXREFCLK), GPIO_FN(VI3_D11_Y3),
830
831 GPIO_FN(VI4_CLKENB), GPIO_FN(VI0_D12_G4_Y4), GPIO_FN(VI4_HSYNC),
832 GPIO_FN(VI0_D13_G5_Y5), GPIO_FN(VI4_VSYNC), GPIO_FN(VI0_D14_G6_Y6),
833 GPIO_FN(VI4_D0_C0), GPIO_FN(VI0_D15_G7_Y7), GPIO_FN(VI4_D1_C1),
834 GPIO_FN(VI0_D16_R0), GPIO_FN(VI1_D12_G4_Y4_0), GPIO_FN(VI4_D2_C2),
835 GPIO_FN(VI0_D17_R1), GPIO_FN(VI1_D13_G5_Y5_0), GPIO_FN(VI4_D3_C3),
836 GPIO_FN(VI0_D18_R2), GPIO_FN(VI1_D14_G6_Y6_0), GPIO_FN(VI4_D4_C4),
837 GPIO_FN(VI0_D19_R3), GPIO_FN(VI1_D15_G7_Y7_0), GPIO_FN(VI4_D5_C5),
838 GPIO_FN(VI0_D20_R4), GPIO_FN(VI2_D12_Y4), GPIO_FN(VI4_D6_C6),
839 GPIO_FN(VI0_D21_R5), GPIO_FN(VI2_D13_Y5), GPIO_FN(VI4_D7_C7),
840 GPIO_FN(VI0_D22_R6), GPIO_FN(VI2_D14_Y6), GPIO_FN(VI4_D8_Y0),
841 GPIO_FN(VI0_D23_R7), GPIO_FN(VI2_D15_Y7), GPIO_FN(VI4_D9_Y1),
842 GPIO_FN(VI3_D12_Y4), GPIO_FN(VI4_D10_Y2), GPIO_FN(VI3_D13_Y5),
843 GPIO_FN(VI4_D11_Y3), GPIO_FN(VI3_D14_Y6), GPIO_FN(VI4_FIELD),
844 GPIO_FN(VI3_D15_Y7),
845
846 GPIO_FN(VI5_CLKENB), GPIO_FN(VI1_D12_G4_Y4_1), GPIO_FN(VI5_HSYNC),
847 GPIO_FN(VI1_D13_G5_Y5_1), GPIO_FN(VI5_VSYNC), GPIO_FN(VI1_D14_G6_Y6_1),
848 GPIO_FN(VI5_D0_C0), GPIO_FN(VI1_D15_G7_Y7_1), GPIO_FN(VI5_D1_C1),
849 GPIO_FN(VI1_D16_R0), GPIO_FN(VI5_D2_C2), GPIO_FN(VI1_D17_R1),
850 GPIO_FN(VI5_D3_C3), GPIO_FN(VI1_D18_R2), GPIO_FN(VI5_D4_C4),
851 GPIO_FN(VI1_D19_R3), GPIO_FN(VI5_D5_C5), GPIO_FN(VI1_D20_R4),
852 GPIO_FN(VI5_D6_C6), GPIO_FN(VI1_D21_R5), GPIO_FN(VI5_D7_C7),
853 GPIO_FN(VI1_D22_R6), GPIO_FN(VI5_D8_Y0), GPIO_FN(VI1_D23_R7),
854
855 GPIO_FN(MSIOF0_SCK), GPIO_FN(HSCK0), GPIO_FN(MSIOF0_SYNC),
856 GPIO_FN(HCTS0), GPIO_FN(MSIOF0_TXD), GPIO_FN(HTX0),
857 GPIO_FN(MSIOF0_RXD), GPIO_FN(HRX0), GPIO_FN(MSIOF1_SCK),
858 GPIO_FN(HSCK1), GPIO_FN(MSIOF1_SYNC), GPIO_FN(HRTS1),
859 GPIO_FN(MSIOF1_TXD), GPIO_FN(HTX1), GPIO_FN(MSIOF1_RXD),
860 GPIO_FN(HRX1), GPIO_FN(DRACK0), GPIO_FN(SCK2),
861 GPIO_FN(DACK0), GPIO_FN(TX2), GPIO_FN(DREQ0),
862 GPIO_FN(RX2), GPIO_FN(DACK1), GPIO_FN(SCK3),
863 GPIO_FN(TX3), GPIO_FN(DREQ1), GPIO_FN(RX3),
864
865 GPIO_FN(PWM0), GPIO_FN(TCLK1), GPIO_FN(FSO_CFE_0),
866 GPIO_FN(PWM1), GPIO_FN(TCLK2), GPIO_FN(FSO_CFE_1),
867 GPIO_FN(PWM2), GPIO_FN(TCLK3), GPIO_FN(FSO_TOE),
868 GPIO_FN(PWM3), GPIO_FN(PWM4),
869 GPIO_FN(SSI_SCK3), GPIO_FN(TPU0TO0),
870 GPIO_FN(SSI_WS3), GPIO_FN(TPU0TO1),
871 GPIO_FN(SSI_SDATA3), GPIO_FN(TPU0TO2),
872 GPIO_FN(SSI_SCK4), GPIO_FN(TPU0TO3),
873 GPIO_FN(SSI_WS4), GPIO_FN(SSI_SDATA4),
874 GPIO_FN(AUDIO_CLKOUT), GPIO_FN(AUDIO_CLKA), GPIO_FN(AUDIO_CLKB),
875
876 };
877
878 static struct pinmux_cfg_reg pinmux_config_regs[] = {
879 { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1) {
880 0, 0,
881 0, 0,
882 0, 0,
883 GP_0_28_FN, FN_IP1_4,
884 GP_0_27_FN, FN_IP1_3,
885 GP_0_26_FN, FN_IP1_2,
886 GP_0_25_FN, FN_IP1_1,
887 GP_0_24_FN, FN_IP1_0,
888 GP_0_23_FN, FN_IP0_23,
889 GP_0_22_FN, FN_IP0_22,
890 GP_0_21_FN, FN_IP0_21,
891 GP_0_20_FN, FN_IP0_20,
892 GP_0_19_FN, FN_IP0_19,
893 GP_0_18_FN, FN_IP0_18,
894 GP_0_17_FN, FN_IP0_17,
895 GP_0_16_FN, FN_IP0_16,
896 GP_0_15_FN, FN_IP0_15,
897 GP_0_14_FN, FN_IP0_14,
898 GP_0_13_FN, FN_IP0_13,
899 GP_0_12_FN, FN_IP0_12,
900 GP_0_11_FN, FN_IP0_11,
901 GP_0_10_FN, FN_IP0_10,
902 GP_0_9_FN, FN_IP0_9,
903 GP_0_8_FN, FN_IP0_8,
904 GP_0_7_FN, FN_IP0_7,
905 GP_0_6_FN, FN_IP0_6,
906 GP_0_5_FN, FN_IP0_5,
907 GP_0_4_FN, FN_IP0_4,
908 GP_0_3_FN, FN_IP0_3,
909 GP_0_2_FN, FN_IP0_2,
910 GP_0_1_FN, FN_IP0_1,
911 GP_0_0_FN, FN_IP0_0 }
912 },
913 { PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1) {
914 0, 0,
915 0, 0,
916 0, 0,
917 0, 0,
918 0, 0,
919 0, 0,
920 0, 0,
921 0, 0,
922 0, 0,
923 GP_1_22_FN, FN_DU1_CDE,
924 GP_1_21_FN, FN_DU1_DISP,
925 GP_1_20_FN, FN_DU1_EXODDF_DU1_ODDF_DISP_CDE,
926 GP_1_19_FN, FN_DU1_EXVSYNC_DU1_VSYNC,
927 GP_1_18_FN, FN_DU1_EXHSYNC_DU1_HSYNC,
928 GP_1_17_FN, FN_DU1_DB7_C5,
929 GP_1_16_FN, FN_DU1_DB6_C4,
930 GP_1_15_FN, FN_DU1_DB5_C3_DATA15,
931 GP_1_14_FN, FN_DU1_DB4_C2_DATA14,
932 GP_1_13_FN, FN_DU1_DB3_C1_DATA13,
933 GP_1_12_FN, FN_DU1_DB2_C0_DATA12,
934 GP_1_11_FN, FN_IP1_16,
935 GP_1_10_FN, FN_IP1_15,
936 GP_1_9_FN, FN_IP1_14,
937 GP_1_8_FN, FN_IP1_13,
938 GP_1_7_FN, FN_IP1_12,
939 GP_1_6_FN, FN_IP1_11,
940 GP_1_5_FN, FN_IP1_10,
941 GP_1_4_FN, FN_IP1_9,
942 GP_1_3_FN, FN_IP1_8,
943 GP_1_2_FN, FN_IP1_7,
944 GP_1_1_FN, FN_IP1_6,
945 GP_1_0_FN, FN_IP1_5, }
946 },
947 { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1) {
948 GP_2_31_FN, FN_A15,
949 GP_2_30_FN, FN_A14,
950 GP_2_29_FN, FN_A13,
951 GP_2_28_FN, FN_A12,
952 GP_2_27_FN, FN_A11,
953 GP_2_26_FN, FN_A10,
954 GP_2_25_FN, FN_A9,
955 GP_2_24_FN, FN_A8,
956 GP_2_23_FN, FN_A7,
957 GP_2_22_FN, FN_A6,
958 GP_2_21_FN, FN_A5,
959 GP_2_20_FN, FN_A4,
960 GP_2_19_FN, FN_A3,
961 GP_2_18_FN, FN_A2,
962 GP_2_17_FN, FN_A1,
963 GP_2_16_FN, FN_A0,
964 GP_2_15_FN, FN_D15,
965 GP_2_14_FN, FN_D14,
966 GP_2_13_FN, FN_D13,
967 GP_2_12_FN, FN_D12,
968 GP_2_11_FN, FN_D11,
969 GP_2_10_FN, FN_D10,
970 GP_2_9_FN, FN_D9,
971 GP_2_8_FN, FN_D8,
972 GP_2_7_FN, FN_D7,
973 GP_2_6_FN, FN_D6,
974 GP_2_5_FN, FN_D5,
975 GP_2_4_FN, FN_D4,
976 GP_2_3_FN, FN_D3,
977 GP_2_2_FN, FN_D2,
978 GP_2_1_FN, FN_D1,
979 GP_2_0_FN, FN_D0 }
980 },
981 { PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1) {
982 0, 0,
983 0, 0,
984 0, 0,
985 0, 0,
986 GP_3_27_FN, FN_CS0,
987 GP_3_26_FN, FN_IP1_22,
988 GP_3_25_FN, FN_IP1_21,
989 GP_3_24_FN, FN_IP1_20,
990 GP_3_23_FN, FN_IP1_19,
991 GP_3_22_FN, FN_IRQ3,
992 GP_3_21_FN, FN_IRQ2,
993 GP_3_20_FN, FN_IRQ1,
994 GP_3_19_FN, FN_IRQ0,
995 GP_3_18_FN, FN_EX_WAIT0,
996 GP_3_17_FN, FN_WE1,
997 GP_3_16_FN, FN_WE0,
998 GP_3_15_FN, FN_RD_WR,
999 GP_3_14_FN, FN_RD,
1000 GP_3_13_FN, FN_BS,
1001 GP_3_12_FN, FN_EX_CS5,
1002 GP_3_11_FN, FN_EX_CS4,
1003 GP_3_10_FN, FN_EX_CS3,
1004 GP_3_9_FN, FN_EX_CS2,
1005 GP_3_8_FN, FN_EX_CS1,
1006 GP_3_7_FN, FN_EX_CS0,
1007 GP_3_6_FN, FN_CS1_A26,
1008 GP_3_5_FN, FN_IP1_18,
1009 GP_3_4_FN, FN_IP1_17,
1010 GP_3_3_FN, FN_A19,
1011 GP_3_2_FN, FN_A18,
1012 GP_3_1_FN, FN_A17,
1013 GP_3_0_FN, FN_A16 }
1014 },
1015 { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1) {
1016 0, 0,
1017 0, 0,
1018 0, 0,
1019 0, 0,
1020 0, 0,
1021 0, 0,
1022 0, 0,
1023 0, 0,
1024 0, 0,
1025 0, 0,
1026 0, 0,
1027 0, 0,
1028 0, 0,
1029 0, 0,
1030 0, 0,
1031 GP_4_16_FN, FN_VI0_FIELD,
1032 GP_4_15_FN, FN_VI0_D11_G3_Y3,
1033 GP_4_14_FN, FN_VI0_D10_G2_Y2,
1034 GP_4_13_FN, FN_VI0_D9_G1_Y1,
1035 GP_4_12_FN, FN_VI0_D8_G0_Y0,
1036 GP_4_11_FN, FN_VI0_D7_B7_C7,
1037 GP_4_10_FN, FN_VI0_D6_B6_C6,
1038 GP_4_9_FN, FN_VI0_D5_B5_C5,
1039 GP_4_8_FN, FN_VI0_D4_B4_C4,
1040 GP_4_7_FN, FN_VI0_D3_B3_C3,
1041 GP_4_6_FN, FN_VI0_D2_B2_C2,
1042 GP_4_5_FN, FN_VI0_D1_B1_C1,
1043 GP_4_4_FN, FN_VI0_D0_B0_C0,
1044 GP_4_3_FN, FN_VI0_VSYNC,
1045 GP_4_2_FN, FN_VI0_HSYNC,
1046 GP_4_1_FN, FN_VI0_CLKENB,
1047 GP_4_0_FN, FN_VI0_CLK }
1048 },
1049 { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1) {
1050 0, 0,
1051 0, 0,
1052 0, 0,
1053 0, 0,
1054 0, 0,
1055 0, 0,
1056 0, 0,
1057 0, 0,
1058 0, 0,
1059 0, 0,
1060 0, 0,
1061 0, 0,
1062 0, 0,
1063 0, 0,
1064 0, 0,
1065 GP_5_16_FN, FN_VI1_FIELD,
1066 GP_5_15_FN, FN_VI1_D11_G3_Y3,
1067 GP_5_14_FN, FN_VI1_D10_G2_Y2,
1068 GP_5_13_FN, FN_VI1_D9_G1_Y1,
1069 GP_5_12_FN, FN_VI1_D8_G0_Y0,
1070 GP_5_11_FN, FN_VI1_D7_B7_C7,
1071 GP_5_10_FN, FN_VI1_D6_B6_C6,
1072 GP_5_9_FN, FN_VI1_D5_B5_C5,
1073 GP_5_8_FN, FN_VI1_D4_B4_C4,
1074 GP_5_7_FN, FN_VI1_D3_B3_C3,
1075 GP_5_6_FN, FN_VI1_D2_B2_C2,
1076 GP_5_5_FN, FN_VI1_D1_B1_C1,
1077 GP_5_4_FN, FN_VI1_D0_B0_C0,
1078 GP_5_3_FN, FN_VI1_VSYNC,
1079 GP_5_2_FN, FN_VI1_HSYNC,
1080 GP_5_1_FN, FN_VI1_CLKENB,
1081 GP_5_0_FN, FN_VI1_CLK }
1082 },
1083 { PINMUX_CFG_REG("GPSR6", 0xE606001C, 32, 1) {
1084 0, 0,
1085 0, 0,
1086 0, 0,
1087 0, 0,
1088 0, 0,
1089 0, 0,
1090 0, 0,
1091 0, 0,
1092 0, 0,
1093 0, 0,
1094 0, 0,
1095 0, 0,
1096 0, 0,
1097 0, 0,
1098 0, 0,
1099 GP_6_16_FN, FN_IP2_16,
1100 GP_6_15_FN, FN_IP2_15,
1101 GP_6_14_FN, FN_IP2_14,
1102 GP_6_13_FN, FN_IP2_13,
1103 GP_6_12_FN, FN_IP2_12,
1104 GP_6_11_FN, FN_IP2_11,
1105 GP_6_10_FN, FN_IP2_10,
1106 GP_6_9_FN, FN_IP2_9,
1107 GP_6_8_FN, FN_IP2_8,
1108 GP_6_7_FN, FN_IP2_7,
1109 GP_6_6_FN, FN_IP2_6,
1110 GP_6_5_FN, FN_IP2_5,
1111 GP_6_4_FN, FN_IP2_4,
1112 GP_6_3_FN, FN_IP2_3,
1113 GP_6_2_FN, FN_IP2_2,
1114 GP_6_1_FN, FN_IP2_1,
1115 GP_6_0_FN, FN_IP2_0 }
1116 },
1117 { PINMUX_CFG_REG("GPSR7", 0xE6060020, 32, 1) {
1118 0, 0,
1119 0, 0,
1120 0, 0,
1121 0, 0,
1122 0, 0,
1123 0, 0,
1124 0, 0,
1125 0, 0,
1126 0, 0,
1127 0, 0,
1128 0, 0,
1129 0, 0,
1130 0, 0,
1131 0, 0,
1132 0, 0,
1133 GP_7_16_FN, FN_VI3_FIELD,
1134 GP_7_15_FN, FN_IP3_14,
1135 GP_7_14_FN, FN_VI3_D10_Y2,
1136 GP_7_13_FN, FN_IP3_13,
1137 GP_7_12_FN, FN_IP3_12,
1138 GP_7_11_FN, FN_IP3_11,
1139 GP_7_10_FN, FN_IP3_10,
1140 GP_7_9_FN, FN_IP3_9,
1141 GP_7_8_FN, FN_IP3_8,
1142 GP_7_7_FN, FN_IP3_7,
1143 GP_7_6_FN, FN_IP3_6,
1144 GP_7_5_FN, FN_IP3_5,
1145 GP_7_4_FN, FN_IP3_4,
1146 GP_7_3_FN, FN_IP3_3,
1147 GP_7_2_FN, FN_IP3_2,
1148 GP_7_1_FN, FN_IP3_1,
1149 GP_7_0_FN, FN_IP3_0 }
1150 },
1151 { PINMUX_CFG_REG("GPSR8", 0xE6060024, 32, 1) {
1152 0, 0,
1153 0, 0,
1154 0, 0,
1155 0, 0,
1156 0, 0,
1157 0, 0,
1158 0, 0,
1159 0, 0,
1160 0, 0,
1161 0, 0,
1162 0, 0,
1163 0, 0,
1164 0, 0,
1165 0, 0,
1166 0, 0,
1167 GP_8_16_FN, FN_IP4_24,
1168 GP_8_15_FN, FN_IP4_23,
1169 GP_8_14_FN, FN_IP4_22,
1170 GP_8_13_FN, FN_IP4_21,
1171 GP_8_12_FN, FN_IP4_20_19,
1172 GP_8_11_FN, FN_IP4_18_17,
1173 GP_8_10_FN, FN_IP4_16_15,
1174 GP_8_9_FN, FN_IP4_14_13,
1175 GP_8_8_FN, FN_IP4_12_11,
1176 GP_8_7_FN, FN_IP4_10_9,
1177 GP_8_6_FN, FN_IP4_8_7,
1178 GP_8_5_FN, FN_IP4_6_5,
1179 GP_8_4_FN, FN_IP4_4,
1180 GP_8_3_FN, FN_IP4_3_2,
1181 GP_8_2_FN, FN_IP4_1,
1182 GP_8_1_FN, FN_IP4_0,
1183 GP_8_0_FN, FN_VI4_CLK }
1184 },
1185 { PINMUX_CFG_REG("GPSR9", 0xE6060028, 32, 1) {
1186 0, 0,
1187 0, 0,
1188 0, 0,
1189 0, 0,
1190 0, 0,
1191 0, 0,
1192 0, 0,
1193 0, 0,
1194 0, 0,
1195 0, 0,
1196 0, 0,
1197 0, 0,
1198 0, 0,
1199 0, 0,
1200 0, 0,
1201 GP_9_16_FN, FN_VI5_FIELD,
1202 GP_9_15_FN, FN_VI5_D11_Y3,
1203 GP_9_14_FN, FN_VI5_D10_Y2,
1204 GP_9_13_FN, FN_VI5_D9_Y1,
1205 GP_9_12_FN, FN_IP5_11,
1206 GP_9_11_FN, FN_IP5_10,
1207 GP_9_10_FN, FN_IP5_9,
1208 GP_9_9_FN, FN_IP5_8,
1209 GP_9_8_FN, FN_IP5_7,
1210 GP_9_7_FN, FN_IP5_6,
1211 GP_9_6_FN, FN_IP5_5,
1212 GP_9_5_FN, FN_IP5_4,
1213 GP_9_4_FN, FN_IP5_3,
1214 GP_9_3_FN, FN_IP5_2,
1215 GP_9_2_FN, FN_IP5_1,
1216 GP_9_1_FN, FN_IP5_0,
1217 GP_9_0_FN, FN_VI5_CLK }
1218 },
1219 { PINMUX_CFG_REG("GPSR10", 0xE606002C, 32, 1) {
1220 GP_10_31_FN, FN_CAN1_RX,
1221 GP_10_30_FN, FN_CAN1_TX,
1222 GP_10_29_FN, FN_CAN_CLK,
1223 GP_10_28_FN, FN_CAN0_RX,
1224 GP_10_27_FN, FN_CAN0_TX,
1225 GP_10_26_FN, FN_SCIF_CLK,
1226 GP_10_25_FN, FN_IP6_18_17,
1227 GP_10_24_FN, FN_IP6_16,
1228 GP_10_23_FN, FN_IP6_15_14,
1229 GP_10_22_FN, FN_IP6_13_12,
1230 GP_10_21_FN, FN_IP6_11_10,
1231 GP_10_20_FN, FN_IP6_9_8,
1232 GP_10_19_FN, FN_RX1,
1233 GP_10_18_FN, FN_TX1,
1234 GP_10_17_FN, FN_RTS1,
1235 GP_10_16_FN, FN_CTS1,
1236 GP_10_15_FN, FN_SCK1,
1237 GP_10_14_FN, FN_RX0,
1238 GP_10_13_FN, FN_TX0,
1239 GP_10_12_FN, FN_RTS0,
1240 GP_10_11_FN, FN_CTS0,
1241 GP_10_10_FN, FN_SCK0,
1242 GP_10_9_FN, FN_IP6_7,
1243 GP_10_8_FN, FN_IP6_6,
1244 GP_10_7_FN, FN_HCTS1,
1245 GP_10_6_FN, FN_IP6_5,
1246 GP_10_5_FN, FN_IP6_4,
1247 GP_10_4_FN, FN_IP6_3,
1248 GP_10_3_FN, FN_IP6_2,
1249 GP_10_2_FN, FN_HRTS0,
1250 GP_10_1_FN, FN_IP6_1,
1251 GP_10_0_FN, FN_IP6_0 }
1252 },
1253 { PINMUX_CFG_REG("GPSR11", 0xE6060030, 32, 1) {
1254 0, 0,
1255 0, 0,
1256 GP_11_29_FN, FN_AVS2,
1257 GP_11_28_FN, FN_AVS1,
1258 GP_11_27_FN, FN_ADICHS2,
1259 GP_11_26_FN, FN_ADICHS1,
1260 GP_11_25_FN, FN_ADICHS0,
1261 GP_11_24_FN, FN_ADIDATA,
1262 GP_11_23_FN, FN_ADICS_SAMP,
1263 GP_11_22_FN, FN_ADICLK,
1264 GP_11_21_FN, FN_IP7_20,
1265 GP_11_20_FN, FN_IP7_19,
1266 GP_11_19_FN, FN_IP7_18,
1267 GP_11_18_FN, FN_IP7_17,
1268 GP_11_17_FN, FN_IP7_16,
1269 GP_11_16_FN, FN_IP7_15_14,
1270 GP_11_15_FN, FN_IP7_13_12,
1271 GP_11_14_FN, FN_IP7_11_10,
1272 GP_11_13_FN, FN_IP7_9_8,
1273 GP_11_12_FN, FN_SD0_WP,
1274 GP_11_11_FN, FN_SD0_CD,
1275 GP_11_10_FN, FN_SD0_DAT3,
1276 GP_11_9_FN, FN_SD0_DAT2,
1277 GP_11_8_FN, FN_SD0_DAT1,
1278 GP_11_7_FN, FN_SD0_DAT0,
1279 GP_11_6_FN, FN_SD0_CMD,
1280 GP_11_5_FN, FN_SD0_CLK,
1281 GP_11_4_FN, FN_IP7_7,
1282 GP_11_3_FN, FN_IP7_6,
1283 GP_11_2_FN, FN_IP7_5_4,
1284 GP_11_1_FN, FN_IP7_3_2,
1285 GP_11_0_FN, FN_IP7_1_0 }
1286 },
1287 /* IPSR0 */
1288 { PINMUX_CFG_REG("IPSR0", 0xE6060040, 32 ,1) {
1289 /* IP0_31 [1] */
1290 0, 0,
1291 /* IP0_30 [1] */
1292 0, 0,
1293 /* IP0_29 [1] */
1294 0, 0,
1295 /* IP0_28 [1] */
1296 0, 0,
1297 /* IP0_27 [1] */
1298 0, 0,
1299 /* IP0_26 [1] */
1300 0, 0,
1301 /* IP0_25 [1] */
1302 0, 0,
1303 /* IP0_24 [1] */
1304 0, 0,
1305 /* IP0_23 [1] */
1306 FN_DU0_DB7_C5, 0,
1307 /* IP0_22 [1] */
1308 FN_DU0_DB6_C4, 0,
1309 /* IP0_21 [1] */
1310 FN_DU0_DB5_C3, 0,
1311 /* IP0_20 [1] */
1312 FN_DU0_DB4_C2, 0,
1313 /* IP0_19 [1] */
1314 FN_DU0_DB3_C1, 0,
1315 /* IP0_18 [1] */
1316 FN_DU0_DB2_C0, 0,
1317 /* IP0_17 [1] */
1318 FN_DU0_DB1, 0,
1319 /* IP0_16 [1] */
1320 FN_DU0_DB0, 0,
1321 /* IP0_15 [1] */
1322 FN_DU0_DG7_Y3_DATA15, 0,
1323 /* IP0_14 [1] */
1324 FN_DU0_DG6_Y2_DATA14, 0,
1325 /* IP0_13 [1] */
1326 FN_DU0_DG5_Y1_DATA13, 0,
1327 /* IP0_12 [1] */
1328 FN_DU0_DG4_Y0_DATA12, 0,
1329 /* IP0_11 [1] */
1330 FN_DU0_DG3_C7_DATA11, 0,
1331 /* IP0_10 [1] */
1332 FN_DU0_DG2_C6_DATA10, 0,
1333 /* IP0_9 [1] */
1334 FN_DU0_DG1_DATA9, 0,
1335 /* IP0_8 [1] */
1336 FN_DU0_DG0_DATA8, 0,
1337 /* IP0_7 [1] */
1338 FN_DU0_DR7_Y9_DATA7, 0,
1339 /* IP0_6 [1] */
1340 FN_DU0_DR6_Y8_DATA6, 0,
1341 /* IP0_5 [1] */
1342 FN_DU0_DR5_Y7_DATA5, 0,
1343 /* IP0_4 [1] */
1344 FN_DU0_DR4_Y6_DATA4, 0,
1345 /* IP0_3 [1] */
1346 FN_DU0_DR3_Y5_DATA3, 0,
1347 /* IP0_2 [1] */
1348 FN_DU0_DR2_Y4_DATA2, 0,
1349 /* IP0_1 [1] */
1350 FN_DU0_DR1_DATA1, 0,
1351 /* IP0_0 [1] */
1352 FN_DU0_DR0_DATA0, 0, }
1353 },
1354 /* IPSR1 */
1355 { PINMUX_CFG_REG("IPSR1", 0xE6060044, 32, 1) {
1356 /* IP1_31 [1] */
1357 0, 0,
1358 /* IP1_30 [1] */
1359 0, 0,
1360 /* IP1_29 [1] */
1361 0, 0,
1362 /* IP1_28 [1] */
1363 0, 0,
1364 /* IP1_27 [1] */
1365 0, 0,
1366 /* IP1_26 [1] */
1367 0, 0,
1368 /* IP1_25 [1] */
1369 0, 0,
1370 /* IP1_24 [1] */
1371 0, 0,
1372 /* IP1_23 [1] */
1373 0, 0,
1374 /* IP1_22 [1] */
1375 FN_A25, FN_SSL,
1376 /* IP1_21 [1] */
1377 FN_A24, FN_SPCLK,
1378 /* IP1_20 [1] */
1379 FN_A23, FN_IO3,
1380 /* IP1_19 [1] */
1381 FN_A22, FN_IO2,
1382 /* IP1_18 [1] */
1383 FN_A21, FN_MISO_IO1,
1384 /* IP1_17 [1] */
1385 FN_A20, FN_MOSI_IO0,
1386 /* IP1_16 [1] */
1387 FN_DU1_DG7_Y3_DATA11, 0,
1388 /* IP1_15 [1] */
1389 FN_DU1_DG6_Y2_DATA10, 0,
1390 /* IP1_14 [1] */
1391 FN_DU1_DG5_Y1_DATA9, 0,
1392 /* IP1_13 [1] */
1393 FN_DU1_DG4_Y0_DATA8, 0,
1394 /* IP1_12 [1] */
1395 FN_DU1_DG3_C7_DATA7, 0,
1396 /* IP1_11 [1] */
1397 FN_DU1_DG2_C6_DATA6, 0,
1398 /* IP1_10 [1] */
1399 FN_DU1_DR7_DATA5, 0,
1400 /* IP1_9 [1] */
1401 FN_DU1_DR6_DATA4, 0,
1402 /* IP1_8 [1] */
1403 FN_DU1_DR5_Y7_DATA3, 0,
1404 /* IP1_7 [1] */
1405 FN_DU1_DR4_Y6_DATA2, 0,
1406 /* IP1_6 [1] */
1407 FN_DU1_DR3_Y5_DATA1, 0,
1408 /* IP1_5 [1] */
1409 FN_DU1_DR2_Y4_DATA0, 0,
1410 /* IP1_4 [1] */
1411 FN_DU0_CDE, 0,
1412 /* IP1_3 [1] */
1413 FN_DU0_DISP, 0,
1414 /* IP1_2 [1] */
1415 FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, 0,
1416 /* IP1_1 [1] */
1417 FN_DU0_EXVSYNC_DU0_VSYNC, 0,
1418 /* IP1_0 [1] */
1419 FN_DU0_EXHSYNC_DU0_HSYNC, 0, }
1420 },
1421 /* IPSR2 */
1422 { PINMUX_CFG_REG("IPSR2", 0xE6060048, 32, 1) {
1423 /* IP2_31 [1] */
1424 0, 0,
1425 /* IP2_30 [1] */
1426 0, 0,
1427 /* IP2_29 [1] */
1428 0, 0,
1429 /* IP2_28 [1] */
1430 0, 0,
1431 /* IP2_27 [1] */
1432 0, 0,
1433 /* IP2_26 [1] */
1434 0, 0,
1435 /* IP2_25 [1] */
1436 0, 0,
1437 /* IP2_24 [1] */
1438 0, 0,
1439 /* IP2_23 [1] */
1440 0, 0,
1441 /* IP2_22 [1] */
1442 0, 0,
1443 /* IP2_21 [1] */
1444 0, 0,
1445 /* IP2_20 [1] */
1446 0, 0,
1447 /* IP2_19 [1] */
1448 0, 0,
1449 /* IP2_18 [1] */
1450 0, 0,
1451 /* IP2_17 [1] */
1452 0, 0,
1453 /* IP2_16 [1] */
1454 FN_VI2_FIELD, FN_AVB_TXD2,
1455 /* IP2_15 [1] */
1456 FN_VI2_D11_Y3, FN_AVB_TXD1,
1457 /* IP2_14 [1] */
1458 FN_VI2_D10_Y2, FN_AVB_TXD0,
1459 /* IP2_13 [1] */
1460 FN_VI2_D9_Y1, FN_AVB_TX_EN,
1461 /* IP2_12 [1] */
1462 FN_VI2_D8_Y0, FN_AVB_TXD3,
1463 /* IP2_11 [1] */
1464 FN_VI2_D7_C7, FN_AVB_COL,
1465 /* IP2_10 [1] */
1466 FN_VI2_D6_C6, FN_AVB_RX_ER,
1467 /* IP2_9 [1] */
1468 FN_VI2_D5_C5, FN_AVB_RXD7,
1469 /* IP2_8 [1] */
1470 FN_VI2_D4_C4, FN_AVB_RXD6,
1471 /* IP2_7 [1] */
1472 FN_VI2_D3_C3, FN_AVB_RXD5,
1473 /* IP2_6 [1] */
1474 FN_VI2_D2_C2, FN_AVB_RXD4,
1475 /* IP2_5 [1] */
1476 FN_VI2_D1_C1, FN_AVB_RXD3,
1477 /* IP2_4 [1] */
1478 FN_VI2_D0_C0, FN_AVB_RXD2,
1479 /* IP2_3 [1] */
1480 FN_VI2_VSYNC, FN_AVB_RXD1,
1481 /* IP2_2 [1] */
1482 FN_VI2_HSYNC, FN_AVB_RXD0,
1483 /* IP2_1 [1] */
1484 FN_VI2_CLKENB, FN_AVB_RX_DV,
1485 /* IP2_0 [1] */
1486 FN_VI2_CLK, FN_AVB_RX_CLK, }
1487 },
1488 /* IPSR3 */
1489 { PINMUX_CFG_REG("IPSR3", 0xE606004C, 32, 1) {
1490 /* IP3_31 [1] */
1491 0, 0,
1492 /* IP3_30 [1] */
1493 0, 0,
1494 /* IP3_29 [1] */
1495 0, 0,
1496 /* IP3_28 [1] */
1497 0, 0,
1498 /* IP3_27 [1] */
1499 0, 0,
1500 /* IP3_26 [1] */
1501 0, 0,
1502 /* IP3_25 [1] */
1503 0, 0,
1504 /* IP3_24 [1] */
1505 0, 0,
1506 /* IP3_23 [1] */
1507 0, 0,
1508 /* IP3_22 [1] */
1509 0, 0,
1510 /* IP3_21 [1] */
1511 0, 0,
1512 /* IP3_20 [1] */
1513 0, 0,
1514 /* IP3_19 [1] */
1515 0, 0,
1516 /* IP3_18 [1] */
1517 0, 0,
1518 /* IP3_17 [1] */
1519 0, 0,
1520 /* IP3_16 [1] */
1521 0, 0,
1522 /* IP3_15 [1] */
1523 0, 0,
1524 /* IP3_14 [1] */
1525 FN_VI3_D11_Y3, 0,
1526 /* IP3_13 [1] */
1527 FN_VI3_D9_Y1, FN_AVB_GTXREFCLK,
1528 /* IP3_12 [1] */
1529 FN_VI3_D8_Y0, FN_AVB_CRS,
1530 /* IP3_11 [1] */
1531 FN_VI3_D7_C7, FN_AVB_PHY_INT,
1532 /* IP3_10 [1] */
1533 FN_VI3_D6_C6, FN_AVB_MAGIC,
1534 /* IP3_9 [1] */
1535 FN_VI3_D5_C5, FN_AVB_LINK,
1536 /* IP3_8 [1] */
1537 FN_VI3_D4_C4, FN_AVB_MDIO,
1538 /* IP3_7 [1] */
1539 FN_VI3_D3_C3, FN_AVB_MDC,
1540 /* IP3_6 [1] */
1541 FN_VI3_D2_C2, FN_AVB_GTX_CLK,
1542 /* IP3_5 [1] */
1543 FN_VI3_D1_C1, FN_AVB_TX_ER,
1544 /* IP3_4 [1] */
1545 FN_VI3_D0_C0, FN_AVB_TXD7,
1546 /* IP3_3 [1] */
1547 FN_VI3_VSYNC, FN_AVB_TXD6,
1548 /* IP3_2 [1] */
1549 FN_VI3_HSYNC, FN_AVB_TXD5,
1550 /* IP3_1 [1] */
1551 FN_VI3_CLKENB, FN_AVB_TXD4,
1552 /* IP3_0 [1] */
1553 FN_VI3_CLK, FN_AVB_TX_CLK,}
1554 },
1555 /* IPSR4 */
1556 { PINMUX_CFG_REG_VAR("IPSR4", 0xE6060050, 32,
1557 1, 1, 1, 1, 1, 1, 1,
1558 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 1, 2, 1, 1) {
1559 /* IP4_31 [1] */
1560 0, 0,
1561 /* IP4_30 [1] */
1562 0, 0,
1563 /* IP4_29 [1] */
1564 0, 0,
1565 /* IP4_28 [1] */
1566 0, 0,
1567 /* IP4_27 [1] */
1568 0, 0,
1569 /* IP4_26 [1] */
1570 0, 0,
1571 /* IP4_25 [1] */
1572 0, 0,
1573 /* IP4_24 [1] */
1574 FN_VI4_FIELD, FN_VI3_D15_Y7,
1575 /* IP4_23 [1] */
1576 FN_VI4_D11_Y3, FN_VI3_D14_Y6,
1577 /* IP4_22 [1] */
1578 FN_VI4_D10_Y2, FN_VI3_D13_Y5,
1579 /* IP4_21 [1] */
1580 FN_VI4_D9_Y1, FN_VI3_D12_Y4,
1581 /* IP4_20_19 [2] */
1582 FN_VI4_D8_Y0, FN_VI0_D23_R7, FN_VI2_D15_Y7, 0,
1583 /* IP4_18_17 [2] */
1584 FN_VI4_D7_C7, FN_VI0_D22_R6, FN_VI2_D14_Y6, 0,
1585 /* IP4_16_15 [2] */
1586 FN_VI4_D6_C6, FN_VI0_D21_R5, FN_VI2_D13_Y5, 0,
1587 /* IP4_14_13 [2] */
1588 FN_VI4_D5_C5, FN_VI0_D20_R4, FN_VI2_D12_Y4, 0,
1589 /* IP4_12_11 [2] */
1590 FN_VI4_D4_C4, FN_VI0_D19_R3, FN_VI1_D15_G7_Y7_0, 0,
1591 /* IP4_10_9 [2] */
1592 FN_VI4_D3_C3, FN_VI0_D18_R2, FN_VI1_D14_G6_Y6_0, 0,
1593 /* IP4_8_7 [2] */
1594 FN_VI4_D2_C2, FN_VI0_D17_R1, FN_VI1_D13_G5_Y5_0, 0,
1595 /* IP4_6_5 [2] */
1596 FN_VI4_D1_C1, FN_VI0_D16_R0, FN_VI1_D12_G4_Y4_0, 0,
1597 /* IP4_4 [1] */
1598 FN_VI4_D0_C0, FN_VI0_D15_G7_Y7,
1599 /* IP4_3_2 [2] */
1600 FN_VI4_VSYNC, FN_VI0_D14_G6_Y6, 0, 0,
1601 /* IP4_1 [1] */
1602 FN_VI4_HSYNC, FN_VI0_D13_G5_Y5,
1603 /* IP4_0 [1] */
1604 FN_VI4_CLKENB, FN_VI0_D12_G4_Y4,}
1605 },
1606 /* IPSR5 */
1607 { PINMUX_CFG_REG("IPSR5", 0xE6060054, 32, 1) {
1608 /* IP5_31 [1] */
1609 0, 0,
1610 /* IP5_30 [1] */
1611 0, 0,
1612 /* IP5_29 [1] */
1613 0, 0,
1614 /* IP5_28 [1] */
1615 0, 0,
1616 /* IP5_27 [1] */
1617 0, 0,
1618 /* IP5_26 [1] */
1619 0, 0,
1620 /* IP5_25 [1] */
1621 0, 0,
1622 /* IP5_24 [1] */
1623 0, 0,
1624 /* IP5_23 [1] */
1625 0, 0,
1626 /* IP5_22 [1] */
1627 0, 0,
1628 /* IP5_21 [1] */
1629 0, 0,
1630 /* IP5_20 [1] */
1631 0, 0,
1632 /* IP5_19 [1] */
1633 0, 0,
1634 /* IP5_18 [1] */
1635 0, 0,
1636 /* IP5_17 [1] */
1637 0, 0,
1638 /* IP5_16 [1] */
1639 0, 0,
1640 /* IP5_15 [1] */
1641 0, 0,
1642 /* IP5_14 [1] */
1643 0, 0,
1644 /* IP5_13 [1] */
1645 0, 0,
1646 /* IP5_12 [1] */
1647 0, 0,
1648 /* IP5_11 [1] */
1649 FN_VI5_D8_Y0, FN_VI1_D23_R7,
1650 /* IP5_10 [1] */
1651 FN_VI5_D7_C7, FN_VI1_D22_R6,
1652 /* IP5_9 [1] */
1653 FN_VI5_D6_C6, FN_VI1_D21_R5,
1654 /* IP5_8 [1] */
1655 FN_VI5_D5_C5, FN_VI1_D20_R4,
1656 /* IP5_7 [1] */
1657 FN_VI5_D4_C4, FN_VI1_D19_R3,
1658 /* IP5_6 [1] */
1659 FN_VI5_D3_C3, FN_VI1_D18_R2,
1660 /* IP5_5 [1] */
1661 FN_VI5_D2_C2, FN_VI1_D17_R1,
1662 /* IP5_4 [1] */
1663 FN_VI5_D1_C1, FN_VI1_D16_R0,
1664 /* IP5_3 [1] */
1665 FN_VI5_D0_C0, FN_VI1_D15_G7_Y7_1,
1666 /* IP5_2 [1] */
1667 FN_VI5_VSYNC, FN_VI1_D14_G6_Y6_1,
1668 /* IP5_1 [1] */
1669 FN_VI5_HSYNC, FN_VI1_D13_G5_Y5_1,
1670 /* IP5_0 [1] */
1671 FN_VI5_CLKENB, FN_VI1_D12_G4_Y4_1,}
1672 },
1673 /* IPSR6 */
1674 { PINMUX_CFG_REG_VAR("IPSR6", 0xE6060058, 32,
1675 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1676 2, 1, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1) {
1677 /* IP6_31 [1] */
1678 0, 0,
1679 /* IP6_30 [1] */
1680 0, 0,
1681 /* IP6_29 [1] */
1682 0, 0,
1683 /* IP6_28 [1] */
1684 0, 0,
1685 /* IP6_27 [1] */
1686 0, 0,
1687 /* IP6_26 [1] */
1688 0, 0,
1689 /* IP6_25 [1] */
1690 0, 0,
1691 /* IP6_24 [1] */
1692 0, 0,
1693 /* IP6_23 [1] */
1694 0, 0,
1695 /* IP6_22 [1] */
1696 0, 0,
1697 /* IP6_21 [1] */
1698 0, 0,
1699 /* IP6_20 [1] */
1700 0, 0,
1701 /* IP6_19 [1] */
1702 0, 0,
1703 /* IP6_18_17 [2] */
1704 FN_DREQ1, FN_RX3, 0, 0,
1705 /* IP6_16 [1] */
1706 FN_TX3, 0,
1707 /* IP6_15_14 [2] */
1708 FN_DACK1, FN_SCK3, 0, 0,
1709 /* IP6_13_12 [2] */
1710 FN_DREQ0, FN_RX2, 0, 0,
1711 /* IP6_11_10 [2] */
1712 FN_DACK0, FN_TX2, 0, 0,
1713 /* IP6_9_8 [2] */
1714 FN_DRACK0, FN_SCK2, 0, 0,
1715 /* IP6_7 [1] */
1716 FN_MSIOF1_RXD, FN_HRX1,
1717 /* IP6_6 [1] */
1718 FN_MSIOF1_TXD, FN_HTX1,
1719 /* IP6_5 [1] */
1720 FN_MSIOF1_SYNC, FN_HRTS1,
1721 /* IP6_4 [1] */
1722 FN_MSIOF1_SCK, FN_HSCK1,
1723 /* IP6_3 [1] */
1724 FN_MSIOF0_RXD, FN_HRX0,
1725 /* IP6_2 [1] */
1726 FN_MSIOF0_TXD, FN_HTX0,
1727 /* IP6_1 [1] */
1728 FN_MSIOF0_SYNC, FN_HCTS0,
1729 /* IP6_0 [1] */
1730 FN_MSIOF0_SCK, FN_HSCK0, }
1731 },
1732 /* IPSR7 */
1733 { PINMUX_CFG_REG_VAR("IPSR7", 0xE606005C, 32,
1734 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1735 1, 1, 1, 1, 1, 2, 2, 2, 2, 1, 1, 2, 2, 2) {
1736 /* IP7_31 [1] */
1737 0, 0,
1738 /* IP7_30 [1] */
1739 0, 0,
1740 /* IP7_29 [1] */
1741 0, 0,
1742 /* IP7_28 [1] */
1743 0, 0,
1744 /* IP7_27 [1] */
1745 0, 0,
1746 /* IP7_26 [1] */
1747 0, 0,
1748 /* IP7_25 [1] */
1749 0, 0,
1750 /* IP7_24 [1] */
1751 0, 0,
1752 /* IP7_23 [1] */
1753 0, 0,
1754 /* IP7_22 [1] */
1755 0, 0,
1756 /* IP7_21 [1] */
1757 0, 0,
1758 /* IP7_20 [1] */
1759 FN_AUDIO_CLKB, 0,
1760 /* IP7_19 [1] */
1761 FN_AUDIO_CLKA, 0,
1762 /* IP7_18 [1] */
1763 FN_AUDIO_CLKOUT, 0,
1764 /* IP7_17 [1] */
1765 FN_SSI_SDATA4, 0,
1766 /* IP7_16 [1] */
1767 FN_SSI_WS4, 0,
1768 /* IP7_15_14 [2] */
1769 FN_SSI_SCK4, FN_TPU0TO3, 0, 0,
1770 /* IP7_13_12 [2] */
1771 FN_SSI_SDATA3, FN_TPU0TO2, 0, 0,
1772 /* IP7_11_10 [2] */
1773 FN_SSI_WS3, FN_TPU0TO1, 0, 0,
1774 /* IP7_9_8 [2] */
1775 FN_SSI_SCK3, FN_TPU0TO0, 0, 0,
1776 /* IP7_7 [1] */
1777 FN_PWM4, 0,
1778 /* IP7_6 [1] */
1779 FN_PWM3, 0,
1780 /* IP7_5_4 [2] */
1781 FN_PWM2, FN_TCLK3, FN_FSO_TOE, 0,
1782 /* IP7_3_2 [2] */
1783 FN_PWM1, FN_TCLK2, FN_FSO_CFE_1, 0,
1784 /* IP7_1_0 [2] */
1785 FN_PWM0, FN_TCLK1, FN_FSO_CFE_0, 0, }
1786 },
1787 /* MOD SEL */
1788 { PINMUX_CFG_REG("MOD_SEL", 0xE6060140, 32, 1) {
1789 0, 0,
1790 0, 0,
1791 0, 0,
1792 0, 0,
1793 0, 0,
1794 0, 0,
1795 0, 0,
1796 0, 0,
1797 0, 0,
1798 0, 0,
1799 0, 0,
1800 0, 0,
1801 0, 0,
1802 0, 0,
1803 0, 0,
1804 0, 0,
1805 0, 0,
1806 0, 0,
1807 0, 0,
1808 0, 0,
1809 0, 0,
1810 0, 0,
1811 0, 0,
1812 0, 0,
1813 0, 0,
1814 0, 0,
1815 0, 0,
1816 0, 0,
1817 0, 0,
1818 0, 0,
1819 0, 0,
1820 /* MOD_SEL [1] */
1821 FN_SEL_VI1_0, FN_SEL_VI1_1, }
1822 },
1823 { PINMUX_CFG_REG("INOUTSEL0", 0xE6050004, 32, 1) {
1824 0, 0,
1825 0, 0,
1826 0, 0,
1827 GP_0_28_IN, GP_0_28_OUT,
1828 GP_0_27_IN, GP_0_27_OUT,
1829 GP_0_26_IN, GP_0_26_OUT,
1830 GP_0_25_IN, GP_0_25_OUT,
1831 GP_0_24_IN, GP_0_24_OUT,
1832 GP_0_23_IN, GP_0_23_OUT,
1833 GP_0_22_IN, GP_0_22_OUT,
1834 GP_0_21_IN, GP_0_21_OUT,
1835 GP_0_20_IN, GP_0_20_OUT,
1836 GP_0_19_IN, GP_0_19_OUT,
1837 GP_0_18_IN, GP_0_18_OUT,
1838 GP_0_17_IN, GP_0_17_OUT,
1839 GP_0_16_IN, GP_0_16_OUT,
1840 GP_0_15_IN, GP_0_15_OUT,
1841 GP_0_14_IN, GP_0_14_OUT,
1842 GP_0_13_IN, GP_0_13_OUT,
1843 GP_0_12_IN, GP_0_12_OUT,
1844 GP_0_11_IN, GP_0_11_OUT,
1845 GP_0_10_IN, GP_0_10_OUT,
1846 GP_0_9_IN, GP_0_9_OUT,
1847 GP_0_8_IN, GP_0_8_OUT,
1848 GP_0_7_IN, GP_0_7_OUT,
1849 GP_0_6_IN, GP_0_6_OUT,
1850 GP_0_5_IN, GP_0_5_OUT,
1851 GP_0_4_IN, GP_0_4_OUT,
1852 GP_0_3_IN, GP_0_3_OUT,
1853 GP_0_2_IN, GP_0_2_OUT,
1854 GP_0_1_IN, GP_0_1_OUT,
1855 GP_0_0_IN, GP_0_0_OUT, }
1856 },
1857 { PINMUX_CFG_REG("INOUTSEL1", 0xE6051004, 32, 1) {
1858 0, 0,
1859 0, 0,
1860 0, 0,
1861 0, 0,
1862 0, 0,
1863 0, 0,
1864 0, 0,
1865 0, 0,
1866 0, 0,
1867 GP_1_22_IN, GP_1_22_OUT,
1868 GP_1_21_IN, GP_1_21_OUT,
1869 GP_1_20_IN, GP_1_20_OUT,
1870 GP_1_19_IN, GP_1_19_OUT,
1871 GP_1_18_IN, GP_1_18_OUT,
1872 GP_1_17_IN, GP_1_17_OUT,
1873 GP_1_16_IN, GP_1_16_OUT,
1874 GP_1_15_IN, GP_1_15_OUT,
1875 GP_1_14_IN, GP_1_14_OUT,
1876 GP_1_13_IN, GP_1_13_OUT,
1877 GP_1_12_IN, GP_1_12_OUT,
1878 GP_1_11_IN, GP_1_11_OUT,
1879 GP_1_10_IN, GP_1_10_OUT,
1880 GP_1_9_IN, GP_1_9_OUT,
1881 GP_1_8_IN, GP_1_8_OUT,
1882 GP_1_7_IN, GP_1_7_OUT,
1883 GP_1_6_IN, GP_1_6_OUT,
1884 GP_1_5_IN, GP_1_5_OUT,
1885 GP_1_4_IN, GP_1_4_OUT,
1886 GP_1_3_IN, GP_1_3_OUT,
1887 GP_1_2_IN, GP_1_2_OUT,
1888 GP_1_1_IN, GP_1_1_OUT,
1889 GP_1_0_IN, GP_1_0_OUT, }
1890 },
1891 { PINMUX_CFG_REG("INOUTSEL2", 0xE6052004, 32, 1) { GP_INOUTSEL(2) } },
1892 { PINMUX_CFG_REG("INOUTSEL3", 0xE6053004, 32, 1) {
1893 0, 0,
1894 0, 0,
1895 0, 0,
1896 0, 0,
1897 GP_3_27_IN, GP_3_27_OUT,
1898 GP_3_26_IN, GP_3_26_OUT,
1899 GP_3_25_IN, GP_3_25_OUT,
1900 GP_3_24_IN, GP_3_24_OUT,
1901 GP_3_23_IN, GP_3_23_OUT,
1902 GP_3_22_IN, GP_3_22_OUT,
1903 GP_3_21_IN, GP_3_21_OUT,
1904 GP_3_20_IN, GP_3_20_OUT,
1905 GP_3_19_IN, GP_3_19_OUT,
1906 GP_3_18_IN, GP_3_18_OUT,
1907 GP_3_17_IN, GP_3_17_OUT,
1908 GP_3_16_IN, GP_3_16_OUT,
1909 GP_3_15_IN, GP_3_15_OUT,
1910 GP_3_14_IN, GP_3_14_OUT,
1911 GP_3_13_IN, GP_3_13_OUT,
1912 GP_3_12_IN, GP_3_12_OUT,
1913 GP_3_11_IN, GP_3_11_OUT,
1914 GP_3_10_IN, GP_3_10_OUT,
1915 GP_3_9_IN, GP_3_9_OUT,
1916 GP_3_8_IN, GP_3_8_OUT,
1917 GP_3_7_IN, GP_3_7_OUT,
1918 GP_3_6_IN, GP_3_6_OUT,
1919 GP_3_5_IN, GP_3_5_OUT,
1920 GP_3_4_IN, GP_3_4_OUT,
1921 GP_3_3_IN, GP_3_3_OUT,
1922 GP_3_2_IN, GP_3_2_OUT,
1923 GP_3_1_IN, GP_3_1_OUT,
1924 GP_3_0_IN, GP_3_0_OUT, }
1925 },
1926 { PINMUX_CFG_REG("INOUTSEL4", 0xE6054004, 32, 1) {
1927 0, 0,
1928 0, 0,
1929 0, 0,
1930 0, 0,
1931 0, 0,
1932 0, 0,
1933 0, 0,
1934 0, 0,
1935 0, 0,
1936 0, 0,
1937 0, 0,
1938 0, 0,
1939 0, 0,
1940 0, 0,
1941 0, 0,
1942 GP_4_16_IN, GP_4_16_OUT,
1943 GP_4_15_IN, GP_4_15_OUT,
1944 GP_4_14_IN, GP_4_14_OUT,
1945 GP_4_13_IN, GP_4_13_OUT,
1946 GP_4_12_IN, GP_4_12_OUT,
1947 GP_4_11_IN, GP_4_11_OUT,
1948 GP_4_10_IN, GP_4_10_OUT,
1949 GP_4_9_IN, GP_4_9_OUT,
1950 GP_4_8_IN, GP_4_8_OUT,
1951 GP_4_7_IN, GP_4_7_OUT,
1952 GP_4_6_IN, GP_4_6_OUT,
1953 GP_4_5_IN, GP_4_5_OUT,
1954 GP_4_4_IN, GP_4_4_OUT,
1955 GP_4_3_IN, GP_4_3_OUT,
1956 GP_4_2_IN, GP_4_2_OUT,
1957 GP_4_1_IN, GP_4_1_OUT,
1958 GP_4_0_IN, GP_4_0_OUT, }
1959 },
1960 { PINMUX_CFG_REG("INOUTSEL5", 0xE6055004, 32, 1) {
1961 0, 0,
1962 0, 0,
1963 0, 0,
1964 0, 0,
1965 0, 0,
1966 0, 0,
1967 0, 0,
1968 0, 0,
1969 0, 0,
1970 0, 0,
1971 0, 0,
1972 0, 0,
1973 0, 0,
1974 0, 0,
1975 0, 0,
1976 GP_5_16_IN, GP_5_16_OUT,
1977 GP_5_15_IN, GP_5_15_OUT,
1978 GP_5_14_IN, GP_5_14_OUT,
1979 GP_5_13_IN, GP_5_13_OUT,
1980 GP_5_12_IN, GP_5_12_OUT,
1981 GP_5_11_IN, GP_5_11_OUT,
1982 GP_5_10_IN, GP_5_10_OUT,
1983 GP_5_9_IN, GP_5_9_OUT,
1984 GP_5_8_IN, GP_5_8_OUT,
1985 GP_5_7_IN, GP_5_7_OUT,
1986 GP_5_6_IN, GP_5_6_OUT,
1987 GP_5_5_IN, GP_5_5_OUT,
1988 GP_5_4_IN, GP_5_4_OUT,
1989 GP_5_3_IN, GP_5_3_OUT,
1990 GP_5_2_IN, GP_5_2_OUT,
1991 GP_5_1_IN, GP_5_1_OUT,
1992 GP_5_0_IN, GP_5_0_OUT, }
1993 },
1994 { PINMUX_CFG_REG("INOUTSEL6", 0xE6055104, 32, 1) {
1995 0, 0,
1996 0, 0,
1997 0, 0,
1998 0, 0,
1999 0, 0,
2000 0, 0,
2001 0, 0,
2002 0, 0,
2003 0, 0,
2004 0, 0,
2005 0, 0,
2006 0, 0,
2007 0, 0,
2008 0, 0,
2009 0, 0,
2010 GP_6_16_IN, GP_6_16_OUT,
2011 GP_6_15_IN, GP_6_15_OUT,
2012 GP_6_14_IN, GP_6_14_OUT,
2013 GP_6_13_IN, GP_6_13_OUT,
2014 GP_6_12_IN, GP_6_12_OUT,
2015 GP_6_11_IN, GP_6_11_OUT,
2016 GP_6_10_IN, GP_6_10_OUT,
2017 GP_6_9_IN, GP_6_9_OUT,
2018 GP_6_8_IN, GP_6_8_OUT,
2019 GP_6_7_IN, GP_6_7_OUT,
2020 GP_6_6_IN, GP_6_6_OUT,
2021 GP_6_5_IN, GP_6_5_OUT,
2022 GP_6_4_IN, GP_6_4_OUT,
2023 GP_6_3_IN, GP_6_3_OUT,
2024 GP_6_2_IN, GP_6_2_OUT,
2025 GP_6_1_IN, GP_6_1_OUT,
2026 GP_6_0_IN, GP_6_0_OUT, }
2027 },
2028 { PINMUX_CFG_REG("INOUTSEL7", 0xE6055204, 32, 1) {
2029 0, 0,
2030 0, 0,
2031 0, 0,
2032 0, 0,
2033 0, 0,
2034 0, 0,
2035 0, 0,
2036 0, 0,
2037 0, 0,
2038 0, 0,
2039 0, 0,
2040 0, 0,
2041 0, 0,
2042 0, 0,
2043 0, 0,
2044 GP_7_16_IN, GP_7_16_OUT,
2045 GP_7_15_IN, GP_7_15_OUT,
2046 GP_7_14_IN, GP_7_14_OUT,
2047 GP_7_13_IN, GP_7_13_OUT,
2048 GP_7_12_IN, GP_7_12_OUT,
2049 GP_7_11_IN, GP_7_11_OUT,
2050 GP_7_10_IN, GP_7_10_OUT,
2051 GP_7_9_IN, GP_7_9_OUT,
2052 GP_7_8_IN, GP_7_8_OUT,
2053 GP_7_7_IN, GP_7_7_OUT,
2054 GP_7_6_IN, GP_7_6_OUT,
2055 GP_7_5_IN, GP_7_5_OUT,
2056 GP_7_4_IN, GP_7_4_OUT,
2057 GP_7_3_IN, GP_7_3_OUT,
2058 GP_7_2_IN, GP_7_2_OUT,
2059 GP_7_1_IN, GP_7_1_OUT,
2060 GP_7_0_IN, GP_7_0_OUT, }
2061 },
2062 { PINMUX_CFG_REG("INOUTSEL8", 0xE6055304, 32, 1) {
2063 0, 0,
2064 0, 0,
2065 0, 0,
2066 0, 0,
2067 0, 0,
2068 0, 0,
2069 0, 0,
2070 0, 0,
2071 0, 0,
2072 0, 0,
2073 0, 0,
2074 0, 0,
2075 0, 0,
2076 0, 0,
2077 0, 0,
2078 GP_8_16_IN, GP_8_16_OUT,
2079 GP_8_15_IN, GP_8_15_OUT,
2080 GP_8_14_IN, GP_8_14_OUT,
2081 GP_8_13_IN, GP_8_13_OUT,
2082 GP_8_12_IN, GP_8_12_OUT,
2083 GP_8_11_IN, GP_8_11_OUT,
2084 GP_8_10_IN, GP_8_10_OUT,
2085 GP_8_9_IN, GP_8_9_OUT,
2086 GP_8_8_IN, GP_8_8_OUT,
2087 GP_8_7_IN, GP_8_7_OUT,
2088 GP_8_6_IN, GP_8_6_OUT,
2089 GP_8_5_IN, GP_8_5_OUT,
2090 GP_8_4_IN, GP_8_4_OUT,
2091 GP_8_3_IN, GP_8_3_OUT,
2092 GP_8_2_IN, GP_8_2_OUT,
2093 GP_8_1_IN, GP_8_1_OUT,
2094 GP_8_0_IN, GP_8_0_OUT, }
2095 },
2096 { PINMUX_CFG_REG("INOUTSEL9", 0xE6055404, 32, 1) {
2097 0, 0,
2098 0, 0,
2099 0, 0,
2100 0, 0,
2101 0, 0,
2102 0, 0,
2103 0, 0,
2104 0, 0,
2105 0, 0,
2106 0, 0,
2107 0, 0,
2108 0, 0,
2109 0, 0,
2110 0, 0,
2111 0, 0,
2112 GP_9_16_IN, GP_9_16_OUT,
2113 GP_9_15_IN, GP_9_15_OUT,
2114 GP_9_14_IN, GP_9_14_OUT,
2115 GP_9_13_IN, GP_9_13_OUT,
2116 GP_9_12_IN, GP_9_12_OUT,
2117 GP_9_11_IN, GP_9_11_OUT,
2118 GP_9_10_IN, GP_9_10_OUT,
2119 GP_9_9_IN, GP_9_9_OUT,
2120 GP_9_8_IN, GP_9_8_OUT,
2121 GP_9_7_IN, GP_9_7_OUT,
2122 GP_9_6_IN, GP_9_6_OUT,
2123 GP_9_5_IN, GP_9_5_OUT,
2124 GP_9_4_IN, GP_9_4_OUT,
2125 GP_9_3_IN, GP_9_3_OUT,
2126 GP_9_2_IN, GP_9_2_OUT,
2127 GP_9_1_IN, GP_9_1_OUT,
2128 GP_9_0_IN, GP_9_0_OUT, }
2129 },
2130 { PINMUX_CFG_REG("INOUTSEL10", 0xE6055504, 32, 1) { GP_INOUTSEL(10) } },
2131 { PINMUX_CFG_REG("INOUTSEL11", 0xE6055604, 32, 1) {
2132 0, 0,
2133 0, 0,
2134 GP_11_29_IN, GP_11_29_OUT,
2135 GP_11_28_IN, GP_11_28_OUT,
2136 GP_11_27_IN, GP_11_27_OUT,
2137 GP_11_26_IN, GP_11_26_OUT,
2138 GP_11_25_IN, GP_11_25_OUT,
2139 GP_11_24_IN, GP_11_24_OUT,
2140 GP_11_23_IN, GP_11_23_OUT,
2141 GP_11_22_IN, GP_11_22_OUT,
2142 GP_11_21_IN, GP_11_21_OUT,
2143 GP_11_20_IN, GP_11_20_OUT,
2144 GP_11_19_IN, GP_11_19_OUT,
2145 GP_11_18_IN, GP_11_18_OUT,
2146 GP_11_17_IN, GP_11_17_OUT,
2147 GP_11_16_IN, GP_11_16_OUT,
2148 GP_11_15_IN, GP_11_15_OUT,
2149 GP_11_14_IN, GP_11_14_OUT,
2150 GP_11_13_IN, GP_11_13_OUT,
2151 GP_11_12_IN, GP_11_12_OUT,
2152 GP_11_11_IN, GP_11_11_OUT,
2153 GP_11_10_IN, GP_11_10_OUT,
2154 GP_11_9_IN, GP_11_9_OUT,
2155 GP_11_8_IN, GP_11_8_OUT,
2156 GP_11_7_IN, GP_11_7_OUT,
2157 GP_11_6_IN, GP_11_6_OUT,
2158 GP_11_5_IN, GP_11_5_OUT,
2159 GP_11_4_IN, GP_11_4_OUT,
2160 GP_11_3_IN, GP_11_3_OUT,
2161 GP_11_2_IN, GP_11_2_OUT,
2162 GP_11_1_IN, GP_11_1_OUT,
2163 GP_11_0_IN, GP_11_0_OUT, }
2164 },
2165 { },
2166 };
2167
2168 static struct pinmux_data_reg pinmux_data_regs[] = {
2169 { PINMUX_DATA_REG("INDT0", 0xE6050008, 32) {
2170 0, 0, 0, GP_0_28_DATA,
2171 GP_0_27_DATA, GP_0_26_DATA, GP_0_25_DATA, GP_0_24_DATA,
2172 GP_0_23_DATA, GP_0_22_DATA, GP_0_21_DATA, GP_0_20_DATA,
2173 GP_0_19_DATA, GP_0_18_DATA, GP_0_17_DATA, GP_0_16_DATA,
2174 GP_0_15_DATA, GP_0_14_DATA, GP_0_13_DATA, GP_0_12_DATA,
2175 GP_0_11_DATA, GP_0_10_DATA, GP_0_9_DATA, GP_0_8_DATA,
2176 GP_0_7_DATA, GP_0_6_DATA, GP_0_5_DATA, GP_0_4_DATA,
2177 GP_0_3_DATA, GP_0_2_DATA, GP_0_1_DATA, GP_0_0_DATA }
2178 },
2179 { PINMUX_DATA_REG("INDT1", 0xE6051008, 32) {
2180 0, 0, 0, 0,
2181 0, 0, 0, 0,
2182 0, GP_1_22_DATA, GP_1_21_DATA, GP_1_20_DATA,
2183 GP_1_19_DATA, GP_1_18_DATA, GP_1_17_DATA, GP_1_16_DATA,
2184 GP_1_15_DATA, GP_1_14_DATA, GP_1_13_DATA, GP_1_12_DATA,
2185 GP_1_11_DATA, GP_1_10_DATA, GP_1_9_DATA, GP_1_8_DATA,
2186 GP_1_7_DATA, GP_1_6_DATA, GP_1_5_DATA, GP_1_4_DATA,
2187 GP_1_3_DATA, GP_1_2_DATA, GP_1_1_DATA, GP_1_0_DATA }
2188 },
2189 { PINMUX_DATA_REG("INDT2", 0xE6052008, 32) { GP_INDT(2) } },
2190 { PINMUX_DATA_REG("INDT3", 0xE6053008, 32) {
2191 0, 0, 0, 0,
2192 GP_3_27_DATA, GP_3_26_DATA, GP_3_25_DATA, GP_3_24_DATA,
2193 GP_3_23_DATA, GP_3_22_DATA, GP_3_21_DATA, GP_3_20_DATA,
2194 GP_3_19_DATA, GP_3_18_DATA, GP_3_17_DATA, GP_3_16_DATA,
2195 GP_3_15_DATA, GP_3_14_DATA, GP_3_13_DATA, GP_3_12_DATA,
2196 GP_3_11_DATA, GP_3_10_DATA, GP_3_9_DATA, GP_3_8_DATA,
2197 GP_3_7_DATA, GP_3_6_DATA, GP_3_5_DATA, GP_3_4_DATA,
2198 GP_3_3_DATA, GP_3_2_DATA, GP_3_1_DATA, GP_3_0_DATA }
2199 },
2200 { PINMUX_DATA_REG("INDT4", 0xE6054008, 32) {
2201 0, 0, 0, 0,
2202 0, 0, 0, 0,
2203 0, 0, 0, 0,
2204 0, 0, 0, GP_4_16_DATA,
2205 GP_4_15_DATA, GP_4_14_DATA, GP_4_13_DATA, GP_4_12_DATA,
2206 GP_4_11_DATA, GP_4_10_DATA, GP_4_9_DATA, GP_4_8_DATA,
2207 GP_4_7_DATA, GP_4_6_DATA, GP_4_5_DATA, GP_4_4_DATA,
2208 GP_4_3_DATA, GP_4_2_DATA, GP_4_1_DATA, GP_4_0_DATA }
2209 },
2210 { PINMUX_DATA_REG("INDT5", 0xE6055008, 32) {
2211 0, 0, 0, 0,
2212 0, 0, 0, 0,
2213 0, 0, 0, 0,
2214 0, 0, 0, GP_5_16_DATA,
2215 GP_5_15_DATA, GP_5_14_DATA, GP_5_13_DATA, GP_5_12_DATA,
2216 GP_5_11_DATA, GP_5_10_DATA, GP_5_9_DATA, GP_5_8_DATA,
2217 GP_5_7_DATA, GP_5_6_DATA, GP_5_5_DATA, GP_5_4_DATA,
2218 GP_5_3_DATA, GP_5_2_DATA, GP_5_1_DATA, GP_5_0_DATA }
2219 },
2220 { PINMUX_DATA_REG("INDT6", 0xE6055108, 32) {
2221 0, 0, 0, 0,
2222 0, 0, 0, 0,
2223 0, 0, 0, 0,
2224 0, 0, 0, GP_6_16_DATA,
2225 GP_6_15_DATA, GP_6_14_DATA, GP_6_13_DATA, GP_6_12_DATA,
2226 GP_6_11_DATA, GP_6_10_DATA, GP_6_9_DATA, GP_6_8_DATA,
2227 GP_6_7_DATA, GP_6_6_DATA, GP_6_5_DATA, GP_6_4_DATA,
2228 GP_6_3_DATA, GP_6_2_DATA, GP_6_1_DATA, GP_6_0_DATA }
2229 },
2230 { PINMUX_DATA_REG("INDT7", 0xE6055208, 32) {
2231 0, 0, 0, 0,
2232 0, 0, 0, 0,
2233 0, 0, 0, 0,
2234 0, 0, 0, GP_7_16_DATA,
2235 GP_7_15_DATA, GP_7_14_DATA, GP_7_13_DATA, GP_7_12_DATA,
2236 GP_7_11_DATA, GP_7_10_DATA, GP_7_9_DATA, GP_7_8_DATA,
2237 GP_7_7_DATA, GP_7_6_DATA, GP_7_5_DATA, GP_7_4_DATA,
2238 GP_7_3_DATA, GP_7_2_DATA, GP_7_1_DATA, GP_7_0_DATA }
2239 },
2240 { PINMUX_DATA_REG("INDT8", 0xE6055308, 32) {
2241 0, 0, 0, 0,
2242 0, 0, 0, 0,
2243 0, 0, 0, 0,
2244 0, 0, 0, GP_8_16_DATA,
2245 GP_8_15_DATA, GP_8_14_DATA, GP_8_13_DATA, GP_8_12_DATA,
2246 GP_8_11_DATA, GP_8_10_DATA, GP_8_9_DATA, GP_8_8_DATA,
2247 GP_8_7_DATA, GP_8_6_DATA, GP_8_5_DATA, GP_8_4_DATA,
2248 GP_8_3_DATA, GP_8_2_DATA, GP_8_1_DATA, GP_8_0_DATA }
2249 },
2250 { PINMUX_DATA_REG("INDT9", 0xE6055408, 32) {
2251 0, 0, 0, 0,
2252 0, 0, 0, 0,
2253 0, 0, 0, 0,
2254 0, 0, 0, GP_9_16_DATA,
2255 GP_9_15_DATA, GP_9_14_DATA, GP_9_13_DATA, GP_9_12_DATA,
2256 GP_9_11_DATA, GP_9_10_DATA, GP_9_9_DATA, GP_9_8_DATA,
2257 GP_9_7_DATA, GP_9_6_DATA, GP_9_5_DATA, GP_9_4_DATA,
2258 GP_9_3_DATA, GP_9_2_DATA, GP_9_1_DATA, GP_9_0_DATA }
2259 },
2260 { PINMUX_DATA_REG("INDT10", 0xE6055508, 32) { GP_INDT(10) } },
2261 { PINMUX_DATA_REG("INDT11", 0xE6055608, 32) {
2262 0, 0, GP_11_29_DATA, GP_11_28_DATA,
2263 GP_11_27_DATA, GP_11_26_DATA, GP_11_25_DATA, GP_11_24_DATA,
2264 GP_11_23_DATA, GP_11_22_DATA, GP_11_21_DATA, GP_11_20_DATA,
2265 GP_11_19_DATA, GP_11_18_DATA, GP_11_17_DATA, GP_11_16_DATA,
2266 GP_11_15_DATA, GP_11_14_DATA, GP_11_13_DATA, GP_11_12_DATA,
2267 GP_11_11_DATA, GP_11_10_DATA, GP_11_9_DATA, GP_11_8_DATA,
2268 GP_11_7_DATA, GP_11_6_DATA, GP_11_5_DATA, GP_11_4_DATA,
2269 GP_11_3_DATA, GP_11_2_DATA, GP_11_1_DATA, GP_11_0_DATA }
2270 },
2271 { },
2272 };
2273
2274 static struct pinmux_info r8a7792_pinmux_info = {
2275 .name = "r8a7792_pfc",
2276
2277 .unlock_reg = 0xe6060000, /* PMMR */
2278
2279 .reserved_id = PINMUX_RESERVED,
2280 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
2281 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
2282 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
2283 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
2284 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
2285
2286 .first_gpio = GPIO_GP_0_0,
2287 .last_gpio = GPIO_FN_AUDIO_CLKB,
2288
2289 .gpios = pinmux_gpios,
2290 .cfg_regs = pinmux_config_regs,
2291 .data_regs = pinmux_data_regs,
2292
2293 .gpio_data = pinmux_data,
2294 .gpio_data_size = ARRAY_SIZE(pinmux_data),
2295 };
2296
2297 void r8a7792_pinmux_init(void)
2298 {
2299 register_pinmux(&r8a7792_pinmux_info);
2300 }
2301
"Das U-Boot" Source Tree