2 * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
4 * SPDX-License-Identifier: GPL-2.0+
12 #include <asm/arch/clock.h>
13 #include <asm/arch/periph.h>
14 #include <asm/arch/grf_rk322x.h>
15 #include <asm/arch/boot_mode.h>
17 DECLARE_GLOBAL_DATA_PTR
;
19 #define GRF_BASE 0x11000000
21 static void setup_boot_mode(void)
23 struct rk322x_grf
*const grf
= (void *)GRF_BASE
;
24 int boot_mode
= readl(&grf
->os_reg
[4]);
26 debug("boot mode %x.\n", boot_mode
);
29 writel(BOOT_NORMAL
, &grf
->os_reg
[4]);
33 printf("enter fastboot!\n");
34 env_set("preboot", "setenv preboot; fastboot usb0");
37 printf("enter UMS!\n");
38 env_set("preboot", "setenv preboot; ums mmc 0");
43 __weak
int rk_board_late_init(void)
48 int board_late_init(void)
52 return rk_board_late_init();
57 #include <asm/arch/grf_rk322x.h>
58 /* Enable early UART2 channel 1 on the RK322x */
59 #define GRF_BASE 0x11000000
60 struct rk322x_grf
* const grf
= (void *)GRF_BASE
;
62 rk_clrsetreg(&grf
->gpio1b_iomux
,
63 GPIO1B1_MASK
| GPIO1B2_MASK
,
64 GPIO1B2_UART21_SIN
<< GPIO1B2_SHIFT
|
65 GPIO1B1_UART21_SOUT
<< GPIO1B1_SHIFT
);
66 /* Set channel C as UART2 input */
67 rk_clrsetreg(&grf
->con_iomux
,
68 CON_IOMUX_UART2SEL_MASK
,
69 CON_IOMUX_UART2SEL_21
<< CON_IOMUX_UART2SEL_SHIFT
);
72 * The integrated macphy is enabled by default, disable it
73 * for saving power consuming.
75 rk_clrsetreg(&grf
->macphy_con
[0],
76 MACPHY_CFG_ENABLE_MASK
,
77 0 << MACPHY_CFG_ENABLE_SHIFT
);
82 int dram_init_banksize(void)
84 gd
->bd
->bi_dram
[0].start
= CONFIG_SYS_SDRAM_BASE
;
85 gd
->bd
->bi_dram
[0].size
= 0x8400000;
86 /* Reserve 0x200000 for OPTEE */
87 gd
->bd
->bi_dram
[1].start
= CONFIG_SYS_SDRAM_BASE
88 + gd
->bd
->bi_dram
[0].size
+ 0x200000;
89 gd
->bd
->bi_dram
[1].size
= gd
->bd
->bi_dram
[0].start
90 + gd
->ram_size
- gd
->bd
->bi_dram
[1].start
;
95 #ifndef CONFIG_SYS_DCACHE_OFF
96 void enable_caches(void)
98 /* Enable D-cache. I-cache is already enabled in start.S */
103 #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
105 #include <usb/dwc2_udc.h>
107 static struct dwc2_plat_otg_data rk322x_otg_data
= {
113 int board_usb_init(int index
, enum usb_init_type init
)
117 bool matched
= false;
118 const void *blob
= gd
->fdt_blob
;
120 /* find the usb_otg node */
121 node
= fdt_node_offset_by_compatible(blob
, -1,
122 "rockchip,rk3288-usb");
125 mode
= fdt_getprop(blob
, node
, "dr_mode", NULL
);
126 if (mode
&& strcmp(mode
, "otg") == 0) {
131 node
= fdt_node_offset_by_compatible(blob
, node
,
132 "rockchip,rk3288-usb");
135 debug("Not found usb_otg device\n");
138 rk322x_otg_data
.regs_otg
= fdtdec_get_addr(blob
, node
, "reg");
140 return dwc2_udc_probe(&rk322x_otg_data
);
143 int board_usb_cleanup(int index
, enum usb_init_type init
)
149 #if defined(CONFIG_USB_FUNCTION_FASTBOOT)
150 int fb_set_reboot_flag(void)
152 struct rk322x_grf
*grf
;
154 printf("Setting reboot to fastboot flag ...\n");
155 grf
= syscon_get_first_range(ROCKCHIP_SYSCON_GRF
);
156 /* Set boot mode to fastboot */
157 writel(BOOT_FASTBOOT
, &grf
->os_reg
[0]);