2 * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
4 * SPDX-License-Identifier: GPL-2.0+
8 #include <asm/arch/clock.h>
9 #include <debug_uart.h>
14 #include <asm/arch/bootrom.h>
15 #include <asm/arch/cru_rk3368.h>
16 #include <asm/arch/grf_rk3368.h>
17 #include <asm/arch/hardware.h>
18 #include <asm/arch/timer.h>
21 DECLARE_GLOBAL_DATA_PTR
;
24 * The SPL (and also the full U-Boot stage on the RK3368) will run in
25 * secure mode (i.e. EL3) and an ATF will eventually be booted before
26 * starting up the operating system... so we can initialize the SGRF
27 * here and rely on the ATF installing the final (secure) policy
30 static inline uintptr_t sgrf_soc_con_addr(unsigned no
)
32 const uintptr_t SGRF_BASE
=
33 (uintptr_t)syscon_get_first_range(ROCKCHIP_SYSCON_SGRF
);
35 return SGRF_BASE
+ sizeof(u32
) * no
;
38 static inline uintptr_t sgrf_busdmac_addr(unsigned no
)
40 const uintptr_t SGRF_BASE
=
41 (uintptr_t)syscon_get_first_range(ROCKCHIP_SYSCON_SGRF
);
42 const uintptr_t SGRF_BUSDMAC_OFFSET
= 0x100;
43 const uintptr_t SGRF_BUSDMAC_BASE
= SGRF_BASE
+ SGRF_BUSDMAC_OFFSET
;
45 return SGRF_BUSDMAC_BASE
+ sizeof(u32
) * no
;
48 static void sgrf_init(void)
50 struct rk3368_cru
* const cru
=
51 (struct rk3368_cru
* const)rockchip_get_cru();
52 const u16 SGRF_SOC_CON_SEC
= GENMASK(15, 0);
53 const u16 SGRF_BUSDMAC_CON0_SEC
= BIT(2);
54 const u16 SGRF_BUSDMAC_CON1_SEC
= GENMASK(15, 12);
56 /* Set all configurable IP to 'non secure'-mode */
57 rk_setreg(sgrf_soc_con_addr(5), SGRF_SOC_CON_SEC
);
58 rk_setreg(sgrf_soc_con_addr(6), SGRF_SOC_CON_SEC
);
59 rk_setreg(sgrf_soc_con_addr(7), SGRF_SOC_CON_SEC
);
62 * From rockchip-uboot/arch/arm/cpu/armv8/rk33xx/cpu.c
63 * Original comment: "ddr space set no secure mode"
65 rk_clrreg(sgrf_soc_con_addr(8), SGRF_SOC_CON_SEC
);
66 rk_clrreg(sgrf_soc_con_addr(9), SGRF_SOC_CON_SEC
);
67 rk_clrreg(sgrf_soc_con_addr(10), SGRF_SOC_CON_SEC
);
69 /* Set 'secure dma' to 'non secure'-mode */
70 rk_setreg(sgrf_busdmac_addr(0), SGRF_BUSDMAC_CON0_SEC
);
71 rk_setreg(sgrf_busdmac_addr(1), SGRF_BUSDMAC_CON1_SEC
);
75 rk_setreg(&cru
->softrst_con
[1], DMA1_SRST_REQ
);
76 rk_setreg(&cru
->softrst_con
[4], DMA2_SRST_REQ
);
81 rk_clrreg(&cru
->softrst_con
[1], DMA1_SRST_REQ
);
82 rk_clrreg(&cru
->softrst_con
[4], DMA2_SRST_REQ
);
85 void board_debug_uart_init(void)
88 * N.B.: This is called before the device-model has been
89 * initialised. For this reason, we can not access
90 * the GRF address range using the syscon API.
92 struct rk3368_grf
* const grf
=
93 (struct rk3368_grf
* const)0xff770000;
96 GPIO2D1_MASK
= GENMASK(3, 2),
98 GPIO2D1_UART0_SOUT
= (1 << 2),
100 GPIO2D0_MASK
= GENMASK(1, 0),
102 GPIO2D0_UART0_SIN
= (1 << 0),
105 #if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
106 /* Enable early UART0 on the RK3368 */
107 rk_clrsetreg(&grf
->gpio2d_iomux
,
108 GPIO2D0_MASK
, GPIO2D0_UART0_SIN
);
109 rk_clrsetreg(&grf
->gpio2d_iomux
,
110 GPIO2D1_MASK
, GPIO2D1_UART0_SOUT
);
114 void board_init_f(ulong dummy
)
122 * Debug UART can be used from here if required:
127 * printascii("string");
130 printascii("U-Boot TPL board init\n");
133 ret
= spl_early_init();
135 debug("spl_early_init() failed: %d\n", ret
);
139 /* Reset security, so we can use DMA in the MMC drivers */
142 ret
= uclass_get_device(UCLASS_RAM
, 0, &dev
);
144 debug("DRAM init failed: %d\n", ret
);
149 void board_return_to_bootrom(void)
154 u32
spl_boot_device(void)
156 return BOOT_DEVICE_BOOTROM
;