arch/arm/mach-s3c64xx/irq-pm.c

   1 /* arch/arm/plat-s3c64xx/irq-pm.c
   2  *
   3  * Copyright 2008 Openmoko, Inc.
   4  * Copyright 2008 Simtec Electronics
   5  *      Ben Dooks <ben@simtec.co.uk>
   6  *      http://armlinux.simtec.co.uk/
   7  *
   8  * S3C64XX - Interrupt handling Power Management
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  */
  14
  15 #include <linux/kernel.h>
  16 #include <linux/syscore_ops.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/serial_core.h>
  19 #include <linux/irq.h>
  20 #include <linux/io.h>
  21
  22 #include <mach/map.h>
  23
  24 #include <plat/regs-serial.h>
  25 #include <mach/regs-gpio.h>
  26 #include <plat/cpu.h>
  27 #include <plat/pm.h>
  28
  29 /* We handled all the IRQ types in this code, to save having to make several
  30  * small files to handle each different type separately. Having the EINT_GRP
  31  * code here shouldn't be as much bloat as the IRQ table space needed when
  32  * they are enabled. The added benefit is we ensure that these registers are
  33  * in the same state as we suspended.
  34  */
  35
  36 static struct sleep_save irq_save[] = {
  37         SAVE_ITEM(S3C64XX_PRIORITY),
  38         SAVE_ITEM(S3C64XX_EINT0CON0),
  39         SAVE_ITEM(S3C64XX_EINT0CON1),
  40         SAVE_ITEM(S3C64XX_EINT0FLTCON0),
  41         SAVE_ITEM(S3C64XX_EINT0FLTCON1),
  42         SAVE_ITEM(S3C64XX_EINT0FLTCON2),
  43         SAVE_ITEM(S3C64XX_EINT0FLTCON3),
  44         SAVE_ITEM(S3C64XX_EINT0MASK),
  45 };
  46
  47 static struct irq_grp_save {
  48         u32     fltcon;
  49         u32     con;
  50         u32     mask;
  51 } eint_grp_save[5];
  52
  53 static u32 irq_uart_mask[CONFIG_SERIAL_SAMSUNG_UARTS];
  54
  55 static int s3c64xx_irq_pm_suspend(void)
  56 {
  57         struct irq_grp_save *grp = eint_grp_save;
  58         int i;
  59
  60         S3C_PMDBG("%s: suspending IRQs\n", __func__);
  61
  62         s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save));
  63
  64         for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++)
  65                 irq_uart_mask[i] = __raw_readl(S3C_VA_UARTx(i) + S3C64XX_UINTM);
  66
  67         for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) {
  68                 grp->con = __raw_readl(S3C64XX_EINT12CON + (i * 4));
  69                 grp->mask = __raw_readl(S3C64XX_EINT12MASK + (i * 4));
  70                 grp->fltcon = __raw_readl(S3C64XX_EINT12FLTCON + (i * 4));
  71         }
  72
  73         return 0;
  74 }
  75
  76 static void s3c64xx_irq_pm_resume(void)
  77 {
  78         struct irq_grp_save *grp = eint_grp_save;
  79         int i;
  80
  81         S3C_PMDBG("%s: resuming IRQs\n", __func__);
  82
  83         s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save));
  84
  85         for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++)
  86                 __raw_writel(irq_uart_mask[i], S3C_VA_UARTx(i) + S3C64XX_UINTM);
  87
  88         for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) {
  89                 __raw_writel(grp->con, S3C64XX_EINT12CON + (i * 4));
  90                 __raw_writel(grp->mask, S3C64XX_EINT12MASK + (i * 4));
  91                 __raw_writel(grp->fltcon, S3C64XX_EINT12FLTCON + (i * 4));
  92         }
  93
  94         S3C_PMDBG("%s: IRQ configuration restored\n", __func__);
  95 }
  96
  97 static struct syscore_ops s3c64xx_irq_syscore_ops = {
  98         .suspend = s3c64xx_irq_pm_suspend,
  99         .resume  = s3c64xx_irq_pm_resume,
 100 };
 101
 102 static __init int s3c64xx_syscore_init(void)
 103 {
 104         register_syscore_ops(&s3c64xx_irq_syscore_ops);
 105
 106         return 0;
 107 }
 108
 109 core_initcall(s3c64xx_syscore_init);