arch/arm/mach-socfpga/Kconfig

   1 if ARCH_SOCFPGA
   2
   3 config TARGET_SOCFPGA_ARRIA5
   4         bool
   5         select TARGET_SOCFPGA_GEN5
   6
   7 config TARGET_SOCFPGA_CYCLONE5
   8         bool
   9         select TARGET_SOCFPGA_GEN5
  10
  11 config TARGET_SOCFPGA_GEN5
  12         bool
  13
  14 choice
  15         prompt "Altera SOCFPGA board select"
  16         optional
  17
  18 config TARGET_SOCFPGA_ARRIA5_SOCDK
  19         bool "Altera SOCFPGA SoCDK (Arria V)"
  20         select TARGET_SOCFPGA_ARRIA5
  21
  22 config TARGET_SOCFPGA_CYCLONE5_SOCDK
  23         bool "Altera SOCFPGA SoCDK (Cyclone V)"
  24         select TARGET_SOCFPGA_CYCLONE5
  25
  26 config TARGET_SOCFPGA_DENX_MCVEVK
  27         bool "DENX MCVEVK (Cyclone V)"
  28         select TARGET_SOCFPGA_CYCLONE5
  29
  30 config TARGET_SOCFPGA_SR1500
  31         bool "SR1500 (Cyclone V)"
  32         select TARGET_SOCFPGA_CYCLONE5
  33
  34 config TARGET_SOCFPGA_EBV_SOCRATES
  35         bool "EBV SoCrates (Cyclone V)"
  36         select TARGET_SOCFPGA_CYCLONE5
  37
  38 config TARGET_SOCFPGA_IS1
  39         bool "IS1 (Cyclone V)"
  40         select TARGET_SOCFPGA_CYCLONE5
  41
  42 config TARGET_SOCFPGA_SAMTEC_VINING_FPGA
  43         bool "samtec VIN|ING FPGA (Cyclone V)"
  44         select TARGET_SOCFPGA_CYCLONE5
  45
  46 config TARGET_SOCFPGA_TERASIC_DE0_NANO
  47         bool "Terasic DE0-Nano-Atlas (Cyclone V)"
  48         select TARGET_SOCFPGA_CYCLONE5
  49
  50 config TARGET_SOCFPGA_TERASIC_SOCKIT
  51         bool "Terasic SoCkit (Cyclone V)"
  52         select TARGET_SOCFPGA_CYCLONE5
  53
  54 endchoice
  55
  56 config SYS_BOARD
  57         default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
  58         default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
  59         default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
  60         default "is1" if TARGET_SOCFPGA_IS1
  61         default "mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK
  62         default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
  63         default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES
  64         default "sr1500" if TARGET_SOCFPGA_SR1500
  65         default "vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
  66
  67 config SYS_VENDOR
  68         default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK
  69         default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK
  70         default "denx" if TARGET_SOCFPGA_DENX_MCVEVK
  71         default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES
  72         default "samtec" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
  73         default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO
  74         default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT
  75
  76 config SYS_SOC
  77         default "socfpga"
  78
  79 config SYS_CONFIG_NAME
  80         default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
  81         default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
  82         default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
  83         default "socfpga_is1" if TARGET_SOCFPGA_IS1
  84         default "socfpga_mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK
  85         default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
  86         default "socfpga_socrates" if TARGET_SOCFPGA_EBV_SOCRATES
  87         default "socfpga_sr1500" if TARGET_SOCFPGA_SR1500
  88         default "socfpga_vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
  89
  90 endif