arch/arm/mach-uniphier/arm32/psci_smp.S

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright (C) 2016 Socionext Inc.
   4  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
   5  */
   6
   7 #include <linux/linkage.h>
   8 #include <asm/system.h>
   9
  10         .section ._secure.text, "ax"
  11
  12 ENTRY(uniphier_smp_trampoline)
  13         ldr     r0, 0f
  14         mrc     p15, 0, r1, c1, c0, 0   @ SCTLR (System Control Register)
  15         orr     r1, r1, #CR_I           @ Enable ICache
  16         bic     r1, r1, #(CR_C | CR_M)  @ Disable MMU and Dcache
  17         mcr     p15, 0, r1, c1, c0, 0
  18
  19         bx      r0
  20 0:      .word   uniphier_secondary_startup
  21         .globl  uniphier_smp_trampoline_end
  22 uniphier_smp_trampoline_end:
  23 ENDPROC(uniphier_smp_trampoline)
  24
  25 LENTRY(uniphier_secondary_startup)
  26         mrc     p15, 0, r1, c0, c0, 5   @ MPIDR (Multiprocessor Affinity Reg)
  27         and     r1, r1, #0xff
  28
  29         ldr     r2, =uniphier_smp_booted
  30         mov     r0, #1
  31         str     r0, [r2, r1, lsl #2]
  32
  33         ldr     r2, =uniphier_psci_holding_pen_release
  34 pen:    ldr     r0, [r2]
  35         cmp     r0, r1
  36         beq     psci_cpu_entry
  37         wfe
  38         b       pen
  39 ENDPROC(uniphier_secondary_startup)