arch/arm/mach-uniphier/bcu/bcu-sld3.c

   1 /*
   2  * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <linux/io.h>
   8
   9 #include "../init.h"
  10 #include "bcu-regs.h"
  11
  12 #define ch(x) ((x) >= 32 ? 0 : (x) < 0 ? 0x11111111 : 0x11111111 << (x))
  13
  14 int ph1_sld3_bcu_init(const struct uniphier_board_data *bd)
  15 {
  16         int shift;
  17
  18         writel(0x11111111, BCSCR2); /* 0x80000000-0x9fffffff: IPPC/IPPD-bus */
  19         writel(0x11111111, BCSCR3); /* 0xa0000000-0xbfffffff: IPPC/IPPD-bus */
  20         writel(0x11111111, BCSCR4); /* 0xc0000000-0xdfffffff: IPPC/IPPD-bus */
  21         /*
  22          * 0xe0000000-0xefffffff: Ex-bus
  23          * 0xf0000000-0xfbffffff: ASM bus
  24          * 0xfc000000-0xffffffff: OCM bus
  25          */
  26         writel(0x24440000, BCSCR5);
  27
  28         /* Specify DDR channel */
  29         shift = (bd->dram_ch[1].base - bd->dram_ch[0].base) / 0x04000000 * 4;
  30         writel(ch(shift), BCIPPCCHR2); /* 0x80000000-0x9fffffff */
  31
  32         shift -= 32;
  33         writel(ch(shift), BCIPPCCHR3); /* 0xa0000000-0xbfffffff */
  34
  35         shift -= 32;
  36         writel(ch(shift), BCIPPCCHR4); /* 0xc0000000-0xdfffffff */
  37
  38         return 0;
  39 }