arch/arm/mach-uniphier/ph1-pro4/sbc_init.c

   1 /*
   2  * Copyright (C) 2011-2014 Panasonic Corporation
   3  *   Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #include <common.h>
   9 #include <asm/io.h>
  10 #include <asm/arch/sbc-regs.h>
  11 #include <asm/arch/sg-regs.h>
  12
  13 void sbc_init(void)
  14 {
  15 #if defined(CONFIG_PFC_MICRO_SUPPORT_CARD)
  16         /*
  17          * Only CS1 is connected to support card.
  18          * BKSZ[1:0] should be set to "01".
  19          */
  20         writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL10);
  21         writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL11);
  22         writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12);
  23         writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14);
  24
  25         if (boot_is_swapped()) {
  26                 /*
  27                  * Boot Swap On: boot from external NOR/SRAM
  28                  * 0x02000000-0x03ffffff is a mirror of 0x00000000-0x01ffffff.
  29                  *
  30                  * 0x00000000-0x01efffff, 0x02000000-0x03efffff: memory bank
  31                  * 0x01f00000-0x01ffffff, 0x03f00000-0x03ffffff: peripherals
  32                  */
  33                 writel(0x0000bc01, SBBASE0);
  34         } else {
  35                 /*
  36                  * Boot Swap Off: boot from mask ROM
  37                  * 0x00000000-0x01ffffff: mask ROM
  38                  * 0x02000000-0x3effffff: memory bank (31MB)
  39                  * 0x03f00000-0x3fffffff: peripherals (1MB)
  40                  */
  41                 writel(0x0000be01, SBBASE0); /* dummy */
  42                 writel(0x0200be01, SBBASE1);
  43         }
  44 #elif defined(CONFIG_DCC_MICRO_SUPPORT_CARD)
  45 #if !defined(CONFIG_SPL_BUILD)
  46         /* XECS0: boot/sub memory (boot swap = off/on) */
  47         writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL00);
  48         writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL01);
  49         writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL02);
  50         writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL04);
  51 #endif
  52         /* XECS1: sub/boot memory (boot swap = off/on) */
  53         writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL10);
  54         writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL11);
  55         writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL12);
  56         writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL14);
  57
  58         /* XECS3: peripherals */
  59         writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL30);
  60         writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL31);
  61         writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL32);
  62         writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL34);
  63
  64         writel(0x0000bc01, SBBASE0); /* boot memory */
  65         writel(0x0400bc01, SBBASE1); /* sub memory */
  66         writel(0x0800bf01, SBBASE3); /* peripherals */
  67
  68 #if !defined(CONFIG_SPL_BUILD)
  69         sg_set_pinsel(318, 5); /* PORT22 -> XECS0 */
  70 #endif
  71         sg_set_pinsel(313, 5); /* PORT15 -> XECS3 */
  72         writel(0x00000001, SG_LOADPINCTRL);
  73
  74 #endif /* CONFIG_XXX_MICRO_SUPPORT_CARD */
  75 }