arch/arm/mach-uniphier/sbc/sbc-proxstream2.c

   1 /*
   2  * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <linux/io.h>
   8
   9 #include "../init.h"
  10 #include "../sg-regs.h"
  11 #include "sbc-regs.h"
  12
  13 int proxstream2_sbc_init(const struct uniphier_board_data *bd)
  14 {
  15         /* necessary for ROM boot ?? */
  16         /* system bus output enable */
  17         writel(0x17, PC0CTRL);
  18
  19         /*
  20          * Only CS1 is connected to support card.
  21          * BKSZ[1:0] should be set to "01".
  22          */
  23         writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL10);
  24         writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL11);
  25         writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12);
  26         writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14);
  27
  28         if (boot_is_swapped()) {
  29                 /*
  30                  * Boot Swap On: boot from external NOR/SRAM
  31                  * 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff.
  32                  *
  33                  * 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank
  34                  * 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals
  35                  */
  36                 writel(0x0000bc01, SBBASE0);
  37         } else {
  38                 /*
  39                  * Boot Swap Off: boot from mask ROM
  40                  * 0x40000000-0x41ffffff: mask ROM
  41                  * 0x42000000-0x43efffff: memory bank (31MB)
  42                  * 0x43f00000-0x43ffffff: peripherals (1MB)
  43                  */
  44                 writel(0x0000be01, SBBASE0); /* dummy */
  45                 writel(0x0200be01, SBBASE1);
  46         }
  47
  48         return 0;
  49 }