1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2019 BayLibre, SAS
4 * Author: Jerome Brunet <jbrunet@baylibre.com>
7 #include "meson-g12-common.dtsi"
8 #include <dt-bindings/clock/axg-audio-clkc.h>
9 #include <dt-bindings/power/meson-g12a-power.h>
10 #include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
11 #include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
14 tdmif_a: audio-controller-0 {
15 compatible = "amlogic,axg-tdm-iface";
16 #sound-dai-cells = <0>;
17 sound-name-prefix = "TDM_A";
18 clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,
19 <&clkc_audio AUD_CLKID_MST_A_SCLK>,
20 <&clkc_audio AUD_CLKID_MST_A_LRCLK>;
21 clock-names = "mclk", "sclk", "lrclk";
25 tdmif_b: audio-controller-1 {
26 compatible = "amlogic,axg-tdm-iface";
27 #sound-dai-cells = <0>;
28 sound-name-prefix = "TDM_B";
29 clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
30 <&clkc_audio AUD_CLKID_MST_B_SCLK>,
31 <&clkc_audio AUD_CLKID_MST_B_LRCLK>;
32 clock-names = "mclk", "sclk", "lrclk";
36 tdmif_c: audio-controller-2 {
37 compatible = "amlogic,axg-tdm-iface";
38 #sound-dai-cells = <0>;
39 sound-name-prefix = "TDM_C";
40 clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>,
41 <&clkc_audio AUD_CLKID_MST_C_SCLK>,
42 <&clkc_audio AUD_CLKID_MST_C_LRCLK>;
43 clock-names = "mclk", "sclk", "lrclk";
49 pdm: audio-controller@40000 {
50 compatible = "amlogic,g12a-pdm",
52 reg = <0x0 0x40000 0x0 0x34>;
53 #sound-dai-cells = <0>;
54 sound-name-prefix = "PDM";
55 clocks = <&clkc_audio AUD_CLKID_PDM>,
56 <&clkc_audio AUD_CLKID_PDM_DCLK>,
57 <&clkc_audio AUD_CLKID_PDM_SYSCLK>;
58 clock-names = "pclk", "dclk", "sysclk";
59 resets = <&clkc_audio AUD_RESET_PDM>;
64 compatible = "simple-bus";
65 reg = <0x0 0x42000 0x0 0x2000>;
68 ranges = <0x0 0x0 0x0 0x42000 0x0 0x2000>;
70 clkc_audio: clock-controller@0 {
72 compatible = "amlogic,g12a-audio-clkc";
73 reg = <0x0 0x0 0x0 0xb4>;
77 clocks = <&clkc CLKID_AUDIO>,
82 <&clkc CLKID_HIFI_PLL>,
83 <&clkc CLKID_FCLK_DIV3>,
84 <&clkc CLKID_FCLK_DIV4>,
85 <&clkc CLKID_GP0_PLL>;
96 resets = <&reset RESET_AUDIO>;
99 toddr_a: audio-controller@100 {
100 compatible = "amlogic,g12a-toddr",
102 reg = <0x0 0x100 0x0 0x2c>;
103 #sound-dai-cells = <0>;
104 sound-name-prefix = "TODDR_A";
105 interrupts = <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>;
106 clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
107 resets = <&arb AXG_ARB_TODDR_A>,
108 <&clkc_audio AUD_RESET_TODDR_A>;
109 reset-names = "arb", "rst";
110 amlogic,fifo-depth = <512>;
114 toddr_b: audio-controller@140 {
115 compatible = "amlogic,g12a-toddr",
117 reg = <0x0 0x140 0x0 0x2c>;
118 #sound-dai-cells = <0>;
119 sound-name-prefix = "TODDR_B";
120 interrupts = <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>;
121 clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
122 resets = <&arb AXG_ARB_TODDR_B>,
123 <&clkc_audio AUD_RESET_TODDR_B>;
124 reset-names = "arb", "rst";
125 amlogic,fifo-depth = <256>;
129 toddr_c: audio-controller@180 {
130 compatible = "amlogic,g12a-toddr",
132 reg = <0x0 0x180 0x0 0x2c>;
133 #sound-dai-cells = <0>;
134 sound-name-prefix = "TODDR_C";
135 interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>;
136 clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
137 resets = <&arb AXG_ARB_TODDR_C>,
138 <&clkc_audio AUD_RESET_TODDR_C>;
139 reset-names = "arb", "rst";
140 amlogic,fifo-depth = <256>;
144 frddr_a: audio-controller@1c0 {
145 compatible = "amlogic,g12a-frddr",
147 reg = <0x0 0x1c0 0x0 0x2c>;
148 #sound-dai-cells = <0>;
149 sound-name-prefix = "FRDDR_A";
150 interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
151 clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
152 resets = <&arb AXG_ARB_FRDDR_A>,
153 <&clkc_audio AUD_RESET_FRDDR_A>;
154 reset-names = "arb", "rst";
155 amlogic,fifo-depth = <512>;
159 frddr_b: audio-controller@200 {
160 compatible = "amlogic,g12a-frddr",
162 reg = <0x0 0x200 0x0 0x2c>;
163 #sound-dai-cells = <0>;
164 sound-name-prefix = "FRDDR_B";
165 interrupts = <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>;
166 clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
167 resets = <&arb AXG_ARB_FRDDR_B>,
168 <&clkc_audio AUD_RESET_FRDDR_B>;
169 reset-names = "arb", "rst";
170 amlogic,fifo-depth = <256>;
174 frddr_c: audio-controller@240 {
175 compatible = "amlogic,g12a-frddr",
177 reg = <0x0 0x240 0x0 0x2c>;
178 #sound-dai-cells = <0>;
179 sound-name-prefix = "FRDDR_C";
180 interrupts = <GIC_SPI 154 IRQ_TYPE_EDGE_RISING>;
181 clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
182 resets = <&arb AXG_ARB_FRDDR_C>,
183 <&clkc_audio AUD_RESET_FRDDR_C>;
184 reset-names = "arb", "rst";
185 amlogic,fifo-depth = <256>;
189 arb: reset-controller@280 {
191 compatible = "amlogic,meson-axg-audio-arb";
192 reg = <0x0 0x280 0x0 0x4>;
194 clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
197 tdmin_a: audio-controller@300 {
198 compatible = "amlogic,g12a-tdmin",
200 reg = <0x0 0x300 0x0 0x40>;
201 sound-name-prefix = "TDMIN_A";
202 resets = <&clkc_audio AUD_RESET_TDMIN_A>;
203 clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
204 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
205 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
206 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
207 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
208 clock-names = "pclk", "sclk", "sclk_sel",
209 "lrclk", "lrclk_sel";
213 tdmin_b: audio-controller@340 {
214 compatible = "amlogic,g12a-tdmin",
216 reg = <0x0 0x340 0x0 0x40>;
217 sound-name-prefix = "TDMIN_B";
218 resets = <&clkc_audio AUD_RESET_TDMIN_B>;
219 clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
220 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
221 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
222 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
223 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
224 clock-names = "pclk", "sclk", "sclk_sel",
225 "lrclk", "lrclk_sel";
229 tdmin_c: audio-controller@380 {
230 compatible = "amlogic,g12a-tdmin",
232 reg = <0x0 0x380 0x0 0x40>;
233 sound-name-prefix = "TDMIN_C";
234 resets = <&clkc_audio AUD_RESET_TDMIN_C>;
235 clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
236 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
237 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
238 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
239 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
240 clock-names = "pclk", "sclk", "sclk_sel",
241 "lrclk", "lrclk_sel";
245 tdmin_lb: audio-controller@3c0 {
246 compatible = "amlogic,g12a-tdmin",
248 reg = <0x0 0x3c0 0x0 0x40>;
249 sound-name-prefix = "TDMIN_LB";
250 resets = <&clkc_audio AUD_RESET_TDMIN_LB>;
251 clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
252 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
253 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
254 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
255 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
256 clock-names = "pclk", "sclk", "sclk_sel",
257 "lrclk", "lrclk_sel";
261 spdifin: audio-controller@400 {
262 compatible = "amlogic,g12a-spdifin",
263 "amlogic,axg-spdifin";
264 reg = <0x0 0x400 0x0 0x30>;
265 #sound-dai-cells = <0>;
266 sound-name-prefix = "SPDIFIN";
267 interrupts = <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
268 clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
269 <&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
270 clock-names = "pclk", "refclk";
271 resets = <&clkc_audio AUD_RESET_SPDIFIN>;
275 spdifout: audio-controller@480 {
276 compatible = "amlogic,g12a-spdifout",
277 "amlogic,axg-spdifout";
278 reg = <0x0 0x480 0x0 0x50>;
279 #sound-dai-cells = <0>;
280 sound-name-prefix = "SPDIFOUT";
281 clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
282 <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
283 clock-names = "pclk", "mclk";
284 resets = <&clkc_audio AUD_RESET_SPDIFOUT>;
288 tdmout_a: audio-controller@500 {
289 compatible = "amlogic,g12a-tdmout";
290 reg = <0x0 0x500 0x0 0x40>;
291 sound-name-prefix = "TDMOUT_A";
292 resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
293 clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
294 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
295 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
296 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
297 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
298 clock-names = "pclk", "sclk", "sclk_sel",
299 "lrclk", "lrclk_sel";
303 tdmout_b: audio-controller@540 {
304 compatible = "amlogic,g12a-tdmout";
305 reg = <0x0 0x540 0x0 0x40>;
306 sound-name-prefix = "TDMOUT_B";
307 resets = <&clkc_audio AUD_RESET_TDMOUT_B>;
308 clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
309 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
310 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
311 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
312 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
313 clock-names = "pclk", "sclk", "sclk_sel",
314 "lrclk", "lrclk_sel";
318 tdmout_c: audio-controller@580 {
319 compatible = "amlogic,g12a-tdmout";
320 reg = <0x0 0x580 0x0 0x40>;
321 sound-name-prefix = "TDMOUT_C";
322 resets = <&clkc_audio AUD_RESET_TDMOUT_C>;
323 clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
324 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
325 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
326 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
327 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
328 clock-names = "pclk", "sclk", "sclk_sel",
329 "lrclk", "lrclk_sel";
333 spdifout_b: audio-controller@680 {
334 compatible = "amlogic,g12a-spdifout",
335 "amlogic,axg-spdifout";
336 reg = <0x0 0x680 0x0 0x50>;
337 #sound-dai-cells = <0>;
338 sound-name-prefix = "SPDIFOUT_B";
339 clocks = <&clkc_audio AUD_CLKID_SPDIFOUT_B>,
340 <&clkc_audio AUD_CLKID_SPDIFOUT_B_CLK>;
341 clock-names = "pclk", "mclk";
342 resets = <&clkc_audio AUD_RESET_SPDIFOUT_B>;
346 tohdmitx: audio-controller@744 {
347 compatible = "amlogic,g12a-tohdmitx";
348 reg = <0x0 0x744 0x0 0x4>;
349 #sound-dai-cells = <1>;
350 sound-name-prefix = "TOHDMITX";
351 resets = <&clkc_audio AUD_RESET_TOHDMITX>;
360 trip = <&cpu_passive>;
361 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
362 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
363 <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
364 <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
365 <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
366 <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
370 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
371 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
372 <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
373 <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
374 <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
375 <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
381 power-domains = <&pwrc PWRC_G12A_ETH_ID>;
385 power-domains = <&pwrc PWRC_G12A_VPU_ID>;
389 amlogic,dram-access-quirk;
393 power-domains = <&pwrc PWRC_G12A_VPU_ID>;
397 power-domains = <&pwrc PWRC_G12A_VPU_ID>;