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Merge tag 'io_uring-5.7-2020-05-22' of git://git.kernel.dk/linux-block
[thirdparty/linux.git] / arch / arm64 / boot / dts / qcom / sdm845-db845c.dts
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2019, Linaro Ltd.
4 */
5
6 /dts-v1/;
7
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/sound/qcom,q6afe.h>
12 #include <dt-bindings/sound/qcom,q6asm.h>
13 #include "sdm845.dtsi"
14 #include "pm8998.dtsi"
15 #include "pmi8998.dtsi"
16
17 / {
18 model = "Thundercomm Dragonboard 845c";
19 compatible = "thundercomm,db845c", "qcom,sdm845";
20
21 aliases {
22 serial0 = &uart9;
23 hsuart0 = &uart6;
24 };
25
26 chosen {
27 stdout-path = "serial0:115200n8";
28 };
29
30 dc12v: dc12v-regulator {
31 compatible = "regulator-fixed";
32 regulator-name = "DC12V";
33 regulator-min-microvolt = <12000000>;
34 regulator-max-microvolt = <12000000>;
35 regulator-always-on;
36 };
37
38 gpio_keys {
39 compatible = "gpio-keys";
40 autorepeat;
41
42 pinctrl-names = "default";
43 pinctrl-0 = <&vol_up_pin_a>;
44
45 vol-up {
46 label = "Volume Up";
47 linux,code = <KEY_VOLUMEUP>;
48 gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
49 };
50 };
51
52 leds {
53 compatible = "gpio-leds";
54
55 user4 {
56 label = "green:user4";
57 gpios = <&pm8998_gpio 13 GPIO_ACTIVE_HIGH>;
58 linux,default-trigger = "panic-indicator";
59 default-state = "off";
60 };
61
62 wlan {
63 label = "yellow:wlan";
64 gpios = <&pm8998_gpio 9 GPIO_ACTIVE_HIGH>;
65 linux,default-trigger = "phy0tx";
66 default-state = "off";
67 };
68
69 bt {
70 label = "blue:bt";
71 gpios = <&pm8998_gpio 5 GPIO_ACTIVE_HIGH>;
72 linux,default-trigger = "bluetooth-power";
73 default-state = "off";
74 };
75 };
76
77 lt9611_1v8: lt9611-vdd18-regulator {
78 compatible = "regulator-fixed";
79 regulator-name = "LT9611_1V8";
80
81 vin-supply = <&vdc_5v>;
82 regulator-min-microvolt = <1800000>;
83 regulator-max-microvolt = <1800000>;
84
85 gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
86 enable-active-high;
87 };
88
89 lt9611_3v3: lt9611-3v3 {
90 compatible = "regulator-fixed";
91 regulator-name = "LT9611_3V3";
92
93 vin-supply = <&vdc_3v3>;
94 regulator-min-microvolt = <3300000>;
95 regulator-max-microvolt = <3300000>;
96
97 // TODO: make it possible to drive same GPIO from two clients
98 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
99 // enable-active-high;
100 };
101
102 pcie0_1p05v: pcie-0-1p05v-regulator {
103 compatible = "regulator-fixed";
104 regulator-name = "PCIE0_1.05V";
105
106 vin-supply = <&vbat>;
107 regulator-min-microvolt = <1050000>;
108 regulator-max-microvolt = <1050000>;
109
110 // TODO: make it possible to drive same GPIO from two clients
111 // gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
112 // enable-active-high;
113 };
114
115 pcie0_3p3v_dual: vldo-3v3-regulator {
116 compatible = "regulator-fixed";
117 regulator-name = "VLDO_3V3";
118
119 vin-supply = <&vbat>;
120 regulator-min-microvolt = <3300000>;
121 regulator-max-microvolt = <3300000>;
122
123 gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
124 enable-active-high;
125
126 pinctrl-names = "default";
127 pinctrl-0 = <&pcie0_pwren_state>;
128 };
129
130 v5p0_hdmiout: v5p0-hdmiout-regulator {
131 compatible = "regulator-fixed";
132 regulator-name = "V5P0_HDMIOUT";
133
134 vin-supply = <&vdc_5v>;
135 regulator-min-microvolt = <500000>;
136 regulator-max-microvolt = <500000>;
137
138 // TODO: make it possible to drive same GPIO from two clients
139 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
140 // enable-active-high;
141 };
142
143 vbat: vbat-regulator {
144 compatible = "regulator-fixed";
145 regulator-name = "VBAT";
146
147 vin-supply = <&dc12v>;
148 regulator-min-microvolt = <4200000>;
149 regulator-max-microvolt = <4200000>;
150 regulator-always-on;
151 };
152
153 vbat_som: vbat-som-regulator {
154 compatible = "regulator-fixed";
155 regulator-name = "VBAT_SOM";
156
157 vin-supply = <&dc12v>;
158 regulator-min-microvolt = <4200000>;
159 regulator-max-microvolt = <4200000>;
160 regulator-always-on;
161 };
162
163 vdc_3v3: vdc-3v3-regulator {
164 compatible = "regulator-fixed";
165 regulator-name = "VDC_3V3";
166 vin-supply = <&dc12v>;
167 regulator-min-microvolt = <3300000>;
168 regulator-max-microvolt = <3300000>;
169 regulator-always-on;
170 };
171
172 vdc_5v: vdc-5v-regulator {
173 compatible = "regulator-fixed";
174 regulator-name = "VDC_5V";
175
176 vin-supply = <&dc12v>;
177 regulator-min-microvolt = <500000>;
178 regulator-max-microvolt = <500000>;
179 regulator-always-on;
180 };
181
182 vreg_s4a_1p8: vreg-s4a-1p8 {
183 compatible = "regulator-fixed";
184 regulator-name = "vreg_s4a_1p8";
185
186 regulator-min-microvolt = <1800000>;
187 regulator-max-microvolt = <1800000>;
188 regulator-always-on;
189 };
190
191 vph_pwr: vph-pwr-regulator {
192 compatible = "regulator-fixed";
193 regulator-name = "vph_pwr";
194
195 vin-supply = <&vbat_som>;
196 };
197 };
198
199 &adsp_pas {
200 status = "okay";
201
202 firmware-name = "qcom/sdm845/adsp.mdt";
203 };
204
205 &apps_rsc {
206 pm8998-rpmh-regulators {
207 compatible = "qcom,pm8998-rpmh-regulators";
208 qcom,pmic-id = "a";
209 vdd-s1-supply = <&vph_pwr>;
210 vdd-s2-supply = <&vph_pwr>;
211 vdd-s3-supply = <&vph_pwr>;
212 vdd-s4-supply = <&vph_pwr>;
213 vdd-s5-supply = <&vph_pwr>;
214 vdd-s6-supply = <&vph_pwr>;
215 vdd-s7-supply = <&vph_pwr>;
216 vdd-s8-supply = <&vph_pwr>;
217 vdd-s9-supply = <&vph_pwr>;
218 vdd-s10-supply = <&vph_pwr>;
219 vdd-s11-supply = <&vph_pwr>;
220 vdd-s12-supply = <&vph_pwr>;
221 vdd-s13-supply = <&vph_pwr>;
222 vdd-l1-l27-supply = <&vreg_s7a_1p025>;
223 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
224 vdd-l3-l11-supply = <&vreg_s7a_1p025>;
225 vdd-l4-l5-supply = <&vreg_s7a_1p025>;
226 vdd-l6-supply = <&vph_pwr>;
227 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
228 vdd-l9-supply = <&vreg_bob>;
229 vdd-l10-l23-l25-supply = <&vreg_bob>;
230 vdd-l13-l19-l21-supply = <&vreg_bob>;
231 vdd-l16-l28-supply = <&vreg_bob>;
232 vdd-l18-l22-supply = <&vreg_bob>;
233 vdd-l20-l24-supply = <&vreg_bob>;
234 vdd-l26-supply = <&vreg_s3a_1p35>;
235 vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
236
237 vreg_s3a_1p35: smps3 {
238 regulator-min-microvolt = <1352000>;
239 regulator-max-microvolt = <1352000>;
240 };
241
242 vreg_s5a_2p04: smps5 {
243 regulator-min-microvolt = <1904000>;
244 regulator-max-microvolt = <2040000>;
245 };
246
247 vreg_s7a_1p025: smps7 {
248 regulator-min-microvolt = <900000>;
249 regulator-max-microvolt = <1028000>;
250 };
251
252 vreg_l1a_0p875: ldo1 {
253 regulator-min-microvolt = <880000>;
254 regulator-max-microvolt = <880000>;
255 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
256 };
257
258 vreg_l5a_0p8: ldo5 {
259 regulator-min-microvolt = <800000>;
260 regulator-max-microvolt = <800000>;
261 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
262 };
263
264 vreg_l12a_1p8: ldo12 {
265 regulator-min-microvolt = <1800000>;
266 regulator-max-microvolt = <1800000>;
267 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
268 };
269
270 vreg_l7a_1p8: ldo7 {
271 regulator-min-microvolt = <1800000>;
272 regulator-max-microvolt = <1800000>;
273 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
274 };
275
276 vreg_l13a_2p95: ldo13 {
277 regulator-min-microvolt = <1800000>;
278 regulator-max-microvolt = <2960000>;
279 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
280 };
281
282 vreg_l17a_1p3: ldo17 {
283 regulator-min-microvolt = <1304000>;
284 regulator-max-microvolt = <1304000>;
285 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
286 };
287
288 vreg_l20a_2p95: ldo20 {
289 regulator-min-microvolt = <2960000>;
290 regulator-max-microvolt = <2968000>;
291 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
292 };
293
294 vreg_l21a_2p95: ldo21 {
295 regulator-min-microvolt = <2960000>;
296 regulator-max-microvolt = <2968000>;
297 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
298 };
299
300 vreg_l24a_3p075: ldo24 {
301 regulator-min-microvolt = <3088000>;
302 regulator-max-microvolt = <3088000>;
303 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
304 };
305
306 vreg_l25a_3p3: ldo25 {
307 regulator-min-microvolt = <3300000>;
308 regulator-max-microvolt = <3312000>;
309 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
310 };
311
312 vreg_l26a_1p2: ldo26 {
313 regulator-min-microvolt = <1200000>;
314 regulator-max-microvolt = <1200000>;
315 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
316 };
317
318 vreg_lvs1a_1p8: lvs1 {
319 regulator-min-microvolt = <1800000>;
320 regulator-max-microvolt = <1800000>;
321 regulator-always-on;
322 };
323
324 vreg_lvs2a_1p8: lvs2 {
325 regulator-min-microvolt = <1800000>;
326 regulator-max-microvolt = <1800000>;
327 regulator-always-on;
328 };
329 };
330
331 pmi8998-rpmh-regulators {
332 compatible = "qcom,pmi8998-rpmh-regulators";
333 qcom,pmic-id = "b";
334
335 vdd-bob-supply = <&vph_pwr>;
336
337 vreg_bob: bob {
338 regulator-min-microvolt = <3312000>;
339 regulator-max-microvolt = <3600000>;
340 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
341 regulator-allow-bypass;
342 };
343 };
344 };
345
346 &cdsp_pas {
347 status = "okay";
348 firmware-name = "qcom/sdm845/cdsp.mdt";
349 };
350
351 &gcc {
352 protected-clocks = <GCC_QSPI_CORE_CLK>,
353 <GCC_QSPI_CORE_CLK_SRC>,
354 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>;
355 };
356
357 &gpu {
358 zap-shader {
359 memory-region = <&gpu_mem>;
360 firmware-name = "qcom/sdm845/a630_zap.mbn";
361 };
362 };
363
364 &i2c11 {
365 /* On Low speed expansion */
366 label = "LS-I2C1";
367 status = "okay";
368 };
369
370 &i2c14 {
371 /* On Low speed expansion */
372 label = "LS-I2C0";
373 status = "okay";
374 };
375
376 &mss_pil {
377 status = "okay";
378 firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
379 };
380
381 &pcie0 {
382 status = "okay";
383 perst-gpio = <&tlmm 35 GPIO_ACTIVE_LOW>;
384 enable-gpio = <&tlmm 134 GPIO_ACTIVE_HIGH>;
385
386 vddpe-3v3-supply = <&pcie0_3p3v_dual>;
387
388 pinctrl-names = "default";
389 pinctrl-0 = <&pcie0_default_state>;
390 };
391
392 &pcie0_phy {
393 status = "okay";
394
395 vdda-phy-supply = <&vreg_l1a_0p875>;
396 vdda-pll-supply = <&vreg_l26a_1p2>;
397 };
398
399 &pcie1 {
400 status = "okay";
401 perst-gpio = <&tlmm 102 GPIO_ACTIVE_LOW>;
402
403 pinctrl-names = "default";
404 pinctrl-0 = <&pcie1_default_state>;
405 };
406
407 &pcie1_phy {
408 status = "okay";
409
410 vdda-phy-supply = <&vreg_l1a_0p875>;
411 vdda-pll-supply = <&vreg_l26a_1p2>;
412 };
413
414 &pm8998_gpio {
415 vol_up_pin_a: vol-up-active {
416 pins = "gpio6";
417 function = "normal";
418 input-enable;
419 bias-pull-up;
420 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
421 };
422 };
423
424 &pm8998_pon {
425 resin {
426 compatible = "qcom,pm8941-resin";
427 interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
428 debounce = <15625>;
429 bias-pull-up;
430 linux,code = <KEY_VOLUMEDOWN>;
431 };
432 };
433
434 /* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */
435 &q6afedai {
436 qi2s@22 {
437 reg = <22>;
438 qcom,sd-lines = <0 1 2 3>;
439 };
440 };
441
442 &q6asmdai {
443 dai@0 {
444 reg = <0>;
445 };
446
447 dai@1 {
448 reg = <1>;
449 };
450
451 dai@2 {
452 reg = <2>;
453 };
454
455 dai@3 {
456 reg = <3>;
457 direction = <2>;
458 is-compress-dai;
459 };
460 };
461
462 &qupv3_id_0 {
463 status = "okay";
464 };
465
466 &qupv3_id_1 {
467 status = "okay";
468 };
469
470 &sdhc_2 {
471 status = "okay";
472
473 pinctrl-names = "default";
474 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
475
476 vmmc-supply = <&vreg_l21a_2p95>;
477 vqmmc-supply = <&vreg_l13a_2p95>;
478
479 bus-width = <4>;
480 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
481 };
482
483 &sound {
484 compatible = "qcom,db845c-sndcard";
485 pinctrl-0 = <&quat_mi2s_active
486 &quat_mi2s_sd0_active
487 &quat_mi2s_sd1_active
488 &quat_mi2s_sd2_active
489 &quat_mi2s_sd3_active>;
490 pinctrl-names = "default";
491 model = "DB845c";
492 audio-routing =
493 "RX_BIAS", "MCLK",
494 "AMIC1", "MIC BIAS1",
495 "AMIC2", "MIC BIAS2",
496 "DMIC0", "MIC BIAS1",
497 "DMIC1", "MIC BIAS1",
498 "DMIC2", "MIC BIAS3",
499 "DMIC3", "MIC BIAS3",
500 "SpkrLeft IN", "SPK1 OUT",
501 "SpkrRight IN", "SPK2 OUT",
502 "MM_DL1", "MultiMedia1 Playback",
503 "MM_DL2", "MultiMedia2 Playback",
504 "MM_DL4", "MultiMedia4 Playback",
505 "MultiMedia3 Capture", "MM_UL3";
506
507 mm1-dai-link {
508 link-name = "MultiMedia1";
509 cpu {
510 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>;
511 };
512 };
513
514 mm2-dai-link {
515 link-name = "MultiMedia2";
516 cpu {
517 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>;
518 };
519 };
520
521 mm3-dai-link {
522 link-name = "MultiMedia3";
523 cpu {
524 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>;
525 };
526 };
527
528 mm4-dai-link {
529 link-name = "MultiMedia4";
530 cpu {
531 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>;
532 };
533 };
534
535 slim-dai-link {
536 link-name = "SLIM Playback";
537 cpu {
538 sound-dai = <&q6afedai SLIMBUS_0_RX>;
539 };
540
541 platform {
542 sound-dai = <&q6routing>;
543 };
544
545 codec {
546 sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
547 };
548 };
549
550 slimcap-dai-link {
551 link-name = "SLIM Capture";
552 cpu {
553 sound-dai = <&q6afedai SLIMBUS_0_TX>;
554 };
555
556 platform {
557 sound-dai = <&q6routing>;
558 };
559
560 codec {
561 sound-dai = <&wcd9340 1>;
562 };
563 };
564 };
565
566 &spi2 {
567 /* On Low speed expansion */
568 label = "LS-SPI0";
569 status = "okay";
570 };
571
572 &tlmm {
573 pcie0_default_state: pcie0-default {
574 clkreq {
575 pins = "gpio36";
576 function = "pci_e0";
577 bias-pull-up;
578 };
579
580 reset-n {
581 pins = "gpio35";
582 function = "gpio";
583
584 drive-strength = <2>;
585 output-low;
586 bias-pull-down;
587 };
588
589 wake-n {
590 pins = "gpio37";
591 function = "gpio";
592
593 drive-strength = <2>;
594 bias-pull-up;
595 };
596 };
597
598 pcie0_pwren_state: pcie0-pwren {
599 pins = "gpio90";
600 function = "gpio";
601
602 drive-strength = <2>;
603 bias-disable;
604 };
605
606 pcie1_default_state: pcie1-default {
607 perst-n {
608 pins = "gpio102";
609 function = "gpio";
610
611 drive-strength = <16>;
612 bias-disable;
613 };
614
615 clkreq {
616 pins = "gpio103";
617 function = "pci_e1";
618 bias-pull-up;
619 };
620
621 wake-n {
622 pins = "gpio11";
623 function = "gpio";
624
625 drive-strength = <2>;
626 bias-pull-up;
627 };
628
629 reset-n {
630 pins = "gpio75";
631 function = "gpio";
632
633 drive-strength = <16>;
634 bias-pull-up;
635 output-high;
636 };
637 };
638
639 sdc2_default_state: sdc2-default {
640 clk {
641 pins = "sdc2_clk";
642 bias-disable;
643
644 /*
645 * It seems that mmc_test reports errors if drive
646 * strength is not 16 on clk, cmd, and data pins.
647 */
648 drive-strength = <16>;
649 };
650
651 cmd {
652 pins = "sdc2_cmd";
653 bias-pull-up;
654 drive-strength = <10>;
655 };
656
657 data {
658 pins = "sdc2_data";
659 bias-pull-up;
660 drive-strength = <10>;
661 };
662 };
663
664 sdc2_card_det_n: sd-card-det-n {
665 pins = "gpio126";
666 function = "gpio";
667 bias-pull-up;
668 };
669
670 wcd_intr_default: wcd_intr_default {
671 pins = <54>;
672 function = "gpio";
673
674 input-enable;
675 bias-pull-down;
676 drive-strength = <2>;
677 };
678 };
679
680 &uart3 {
681 label = "LS-UART0";
682 status = "disabled";
683 };
684
685 &uart6 {
686 status = "okay";
687
688 bluetooth {
689 compatible = "qcom,wcn3990-bt";
690
691 vddio-supply = <&vreg_s4a_1p8>;
692 vddxo-supply = <&vreg_l7a_1p8>;
693 vddrf-supply = <&vreg_l17a_1p3>;
694 vddch0-supply = <&vreg_l25a_3p3>;
695 max-speed = <3200000>;
696 };
697 };
698
699 &uart9 {
700 label = "LS-UART1";
701 status = "okay";
702 };
703
704 &usb_1 {
705 status = "okay";
706 };
707
708 &usb_1_dwc3 {
709 dr_mode = "peripheral";
710 };
711
712 &usb_1_hsphy {
713 status = "okay";
714
715 vdd-supply = <&vreg_l1a_0p875>;
716 vdda-pll-supply = <&vreg_l12a_1p8>;
717 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
718
719 qcom,imp-res-offset-value = <8>;
720 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
721 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
722 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
723 };
724
725 &usb_1_qmpphy {
726 status = "okay";
727
728 vdda-phy-supply = <&vreg_l26a_1p2>;
729 vdda-pll-supply = <&vreg_l1a_0p875>;
730 };
731
732 &usb_2 {
733 status = "okay";
734 };
735
736 &usb_2_dwc3 {
737 dr_mode = "host";
738 };
739
740 &usb_2_hsphy {
741 status = "okay";
742
743 vdd-supply = <&vreg_l1a_0p875>;
744 vdda-pll-supply = <&vreg_l12a_1p8>;
745 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
746
747 qcom,imp-res-offset-value = <8>;
748 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
749 };
750
751 &usb_2_qmpphy {
752 status = "okay";
753
754 vdda-phy-supply = <&vreg_l26a_1p2>;
755 vdda-pll-supply = <&vreg_l1a_0p875>;
756 };
757
758 &ufs_mem_hc {
759 status = "okay";
760
761 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
762
763 vcc-supply = <&vreg_l20a_2p95>;
764 vcc-max-microamp = <800000>;
765 };
766
767 &ufs_mem_phy {
768 status = "okay";
769
770 vdda-phy-supply = <&vreg_l1a_0p875>;
771 vdda-pll-supply = <&vreg_l26a_1p2>;
772 };
773
774 &wcd9340{
775 pinctrl-0 = <&wcd_intr_default>;
776 pinctrl-names = "default";
777 clock-names = "extclk";
778 clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
779 reset-gpios = <&tlmm 64 0>;
780 vdd-buck-supply = <&vreg_s4a_1p8>;
781 vdd-buck-sido-supply = <&vreg_s4a_1p8>;
782 vdd-tx-supply = <&vreg_s4a_1p8>;
783 vdd-rx-supply = <&vreg_s4a_1p8>;
784 vdd-io-supply = <&vreg_s4a_1p8>;
785
786 swm: swm@c85 {
787 left_spkr: wsa8810-left{
788 compatible = "sdw10217201000";
789 reg = <0 1>;
790 powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_HIGH>;
791 #thermal-sensor-cells = <0>;
792 sound-name-prefix = "SpkrLeft";
793 #sound-dai-cells = <0>;
794 };
795
796 right_spkr: wsa8810-right{
797 compatible = "sdw10217201000";
798 powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_HIGH>;
799 reg = <0 2>;
800 #thermal-sensor-cells = <0>;
801 sound-name-prefix = "SpkrRight";
802 #sound-dai-cells = <0>;
803 };
804 };
805 };
806
807 &wifi {
808 status = "okay";
809
810 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
811 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
812 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
813 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
814
815 qcom,snoc-host-cap-8bit-quirk;
816 };
817
818 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
819 &qup_spi2_default {
820 drive-strength = <16>;
821 };
822
823 &qup_uart3_default{
824 pinmux {
825 pins = "gpio41", "gpio42", "gpio43", "gpio44";
826 function = "qup3";
827 };
828 };
829
830 &qup_uart6_default {
831 pinmux {
832 pins = "gpio45", "gpio46", "gpio47", "gpio48";
833 function = "qup6";
834 };
835
836 cts {
837 pins = "gpio45";
838 bias-disable;
839 };
840
841 rts-tx {
842 pins = "gpio46", "gpio47";
843 drive-strength = <2>;
844 bias-disable;
845 };
846
847 rx {
848 pins = "gpio48";
849 bias-pull-up;
850 };
851 };
852
853 &qup_uart9_default {
854 pinconf-tx {
855 pins = "gpio4";
856 drive-strength = <2>;
857 bias-disable;
858 };
859
860 pinconf-rx {
861 pins = "gpio5";
862 drive-strength = <2>;
863 bias-pull-up;
864 };
865 };