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io_uring: reset -EBUSY error when io sq thread is waken up
[thirdparty/linux.git] / arch / arm64 / boot / dts / qcom / sdm845-db845c.dts
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2019, Linaro Ltd.
4 */
5
6 /dts-v1/;
7
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/sound/qcom,q6afe.h>
12 #include <dt-bindings/sound/qcom,q6asm.h>
13 #include "sdm845.dtsi"
14 #include "pm8998.dtsi"
15 #include "pmi8998.dtsi"
16
17 / {
18 model = "Thundercomm Dragonboard 845c";
19 compatible = "thundercomm,db845c", "qcom,sdm845";
20
21 aliases {
22 serial0 = &uart9;
23 hsuart0 = &uart6;
24 };
25
26 chosen {
27 stdout-path = "serial0:115200n8";
28 };
29
30 dc12v: dc12v-regulator {
31 compatible = "regulator-fixed";
32 regulator-name = "DC12V";
33 regulator-min-microvolt = <12000000>;
34 regulator-max-microvolt = <12000000>;
35 regulator-always-on;
36 };
37
38 gpio_keys {
39 compatible = "gpio-keys";
40 autorepeat;
41
42 pinctrl-names = "default";
43 pinctrl-0 = <&vol_up_pin_a>;
44
45 vol-up {
46 label = "Volume Up";
47 linux,code = <KEY_VOLUMEUP>;
48 gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
49 };
50 };
51
52 leds {
53 compatible = "gpio-leds";
54
55 user4 {
56 label = "green:user4";
57 gpios = <&pm8998_gpio 13 GPIO_ACTIVE_HIGH>;
58 linux,default-trigger = "panic-indicator";
59 default-state = "off";
60 };
61
62 wlan {
63 label = "yellow:wlan";
64 gpios = <&pm8998_gpio 9 GPIO_ACTIVE_HIGH>;
65 linux,default-trigger = "phy0tx";
66 default-state = "off";
67 };
68
69 bt {
70 label = "blue:bt";
71 gpios = <&pm8998_gpio 5 GPIO_ACTIVE_HIGH>;
72 linux,default-trigger = "bluetooth-power";
73 default-state = "off";
74 };
75 };
76
77 lt9611_1v8: lt9611-vdd18-regulator {
78 compatible = "regulator-fixed";
79 regulator-name = "LT9611_1V8";
80
81 vin-supply = <&vdc_5v>;
82 regulator-min-microvolt = <1800000>;
83 regulator-max-microvolt = <1800000>;
84
85 gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
86 enable-active-high;
87 };
88
89 lt9611_3v3: lt9611-3v3 {
90 compatible = "regulator-fixed";
91 regulator-name = "LT9611_3V3";
92
93 vin-supply = <&vdc_3v3>;
94 regulator-min-microvolt = <3300000>;
95 regulator-max-microvolt = <3300000>;
96
97 // TODO: make it possible to drive same GPIO from two clients
98 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
99 // enable-active-high;
100 };
101
102 pcie0_1p05v: pcie-0-1p05v-regulator {
103 compatible = "regulator-fixed";
104 regulator-name = "PCIE0_1.05V";
105
106 vin-supply = <&vbat>;
107 regulator-min-microvolt = <1050000>;
108 regulator-max-microvolt = <1050000>;
109
110 // TODO: make it possible to drive same GPIO from two clients
111 // gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
112 // enable-active-high;
113 };
114
115 pcie0_3p3v_dual: vldo-3v3-regulator {
116 compatible = "regulator-fixed";
117 regulator-name = "VLDO_3V3";
118
119 vin-supply = <&vbat>;
120 regulator-min-microvolt = <3300000>;
121 regulator-max-microvolt = <3300000>;
122
123 gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
124 enable-active-high;
125
126 pinctrl-names = "default";
127 pinctrl-0 = <&pcie0_pwren_state>;
128 };
129
130 v5p0_hdmiout: v5p0-hdmiout-regulator {
131 compatible = "regulator-fixed";
132 regulator-name = "V5P0_HDMIOUT";
133
134 vin-supply = <&vdc_5v>;
135 regulator-min-microvolt = <500000>;
136 regulator-max-microvolt = <500000>;
137
138 // TODO: make it possible to drive same GPIO from two clients
139 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
140 // enable-active-high;
141 };
142
143 vbat: vbat-regulator {
144 compatible = "regulator-fixed";
145 regulator-name = "VBAT";
146
147 vin-supply = <&dc12v>;
148 regulator-min-microvolt = <4200000>;
149 regulator-max-microvolt = <4200000>;
150 regulator-always-on;
151 };
152
153 vbat_som: vbat-som-regulator {
154 compatible = "regulator-fixed";
155 regulator-name = "VBAT_SOM";
156
157 vin-supply = <&dc12v>;
158 regulator-min-microvolt = <4200000>;
159 regulator-max-microvolt = <4200000>;
160 regulator-always-on;
161 };
162
163 vdc_3v3: vdc-3v3-regulator {
164 compatible = "regulator-fixed";
165 regulator-name = "VDC_3V3";
166 vin-supply = <&dc12v>;
167 regulator-min-microvolt = <3300000>;
168 regulator-max-microvolt = <3300000>;
169 regulator-always-on;
170 };
171
172 vdc_5v: vdc-5v-regulator {
173 compatible = "regulator-fixed";
174 regulator-name = "VDC_5V";
175
176 vin-supply = <&dc12v>;
177 regulator-min-microvolt = <500000>;
178 regulator-max-microvolt = <500000>;
179 regulator-always-on;
180 };
181
182 vreg_s4a_1p8: vreg-s4a-1p8 {
183 compatible = "regulator-fixed";
184 regulator-name = "vreg_s4a_1p8";
185
186 regulator-min-microvolt = <1800000>;
187 regulator-max-microvolt = <1800000>;
188 regulator-always-on;
189 };
190
191 vph_pwr: vph-pwr-regulator {
192 compatible = "regulator-fixed";
193 regulator-name = "vph_pwr";
194
195 vin-supply = <&vbat_som>;
196 };
197 };
198
199 &adsp_pas {
200 status = "okay";
201
202 firmware-name = "qcom/sdm845/adsp.mdt";
203 };
204
205 &apps_rsc {
206 pm8998-rpmh-regulators {
207 compatible = "qcom,pm8998-rpmh-regulators";
208 qcom,pmic-id = "a";
209 vdd-s1-supply = <&vph_pwr>;
210 vdd-s2-supply = <&vph_pwr>;
211 vdd-s3-supply = <&vph_pwr>;
212 vdd-s4-supply = <&vph_pwr>;
213 vdd-s5-supply = <&vph_pwr>;
214 vdd-s6-supply = <&vph_pwr>;
215 vdd-s7-supply = <&vph_pwr>;
216 vdd-s8-supply = <&vph_pwr>;
217 vdd-s9-supply = <&vph_pwr>;
218 vdd-s10-supply = <&vph_pwr>;
219 vdd-s11-supply = <&vph_pwr>;
220 vdd-s12-supply = <&vph_pwr>;
221 vdd-s13-supply = <&vph_pwr>;
222 vdd-l1-l27-supply = <&vreg_s7a_1p025>;
223 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
224 vdd-l3-l11-supply = <&vreg_s7a_1p025>;
225 vdd-l4-l5-supply = <&vreg_s7a_1p025>;
226 vdd-l6-supply = <&vph_pwr>;
227 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
228 vdd-l9-supply = <&vreg_bob>;
229 vdd-l10-l23-l25-supply = <&vreg_bob>;
230 vdd-l13-l19-l21-supply = <&vreg_bob>;
231 vdd-l16-l28-supply = <&vreg_bob>;
232 vdd-l18-l22-supply = <&vreg_bob>;
233 vdd-l20-l24-supply = <&vreg_bob>;
234 vdd-l26-supply = <&vreg_s3a_1p35>;
235 vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
236
237 vreg_s3a_1p35: smps3 {
238 regulator-min-microvolt = <1352000>;
239 regulator-max-microvolt = <1352000>;
240 };
241
242 vreg_s5a_2p04: smps5 {
243 regulator-min-microvolt = <1904000>;
244 regulator-max-microvolt = <2040000>;
245 };
246
247 vreg_s7a_1p025: smps7 {
248 regulator-min-microvolt = <900000>;
249 regulator-max-microvolt = <1028000>;
250 };
251
252 vreg_l1a_0p875: ldo1 {
253 regulator-min-microvolt = <880000>;
254 regulator-max-microvolt = <880000>;
255 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
256 };
257
258 vreg_l5a_0p8: ldo5 {
259 regulator-min-microvolt = <800000>;
260 regulator-max-microvolt = <800000>;
261 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
262 };
263
264 vreg_l12a_1p8: ldo12 {
265 regulator-min-microvolt = <1800000>;
266 regulator-max-microvolt = <1800000>;
267 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
268 };
269
270 vreg_l7a_1p8: ldo7 {
271 regulator-min-microvolt = <1800000>;
272 regulator-max-microvolt = <1800000>;
273 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
274 };
275
276 vreg_l13a_2p95: ldo13 {
277 regulator-min-microvolt = <1800000>;
278 regulator-max-microvolt = <2960000>;
279 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
280 };
281
282 vreg_l17a_1p3: ldo17 {
283 regulator-min-microvolt = <1304000>;
284 regulator-max-microvolt = <1304000>;
285 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
286 };
287
288 vreg_l20a_2p95: ldo20 {
289 regulator-min-microvolt = <2960000>;
290 regulator-max-microvolt = <2968000>;
291 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
292 };
293
294 vreg_l21a_2p95: ldo21 {
295 regulator-min-microvolt = <2960000>;
296 regulator-max-microvolt = <2968000>;
297 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
298 };
299
300 vreg_l24a_3p075: ldo24 {
301 regulator-min-microvolt = <3088000>;
302 regulator-max-microvolt = <3088000>;
303 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
304 };
305
306 vreg_l25a_3p3: ldo25 {
307 regulator-min-microvolt = <3300000>;
308 regulator-max-microvolt = <3312000>;
309 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
310 };
311
312 vreg_l26a_1p2: ldo26 {
313 regulator-min-microvolt = <1200000>;
314 regulator-max-microvolt = <1200000>;
315 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
316 };
317
318 vreg_lvs1a_1p8: lvs1 {
319 regulator-min-microvolt = <1800000>;
320 regulator-max-microvolt = <1800000>;
321 regulator-always-on;
322 };
323
324 vreg_lvs2a_1p8: lvs2 {
325 regulator-min-microvolt = <1800000>;
326 regulator-max-microvolt = <1800000>;
327 regulator-always-on;
328 };
329 };
330
331 pmi8998-rpmh-regulators {
332 compatible = "qcom,pmi8998-rpmh-regulators";
333 qcom,pmic-id = "b";
334
335 vdd-bob-supply = <&vph_pwr>;
336
337 vreg_bob: bob {
338 regulator-min-microvolt = <3312000>;
339 regulator-max-microvolt = <3600000>;
340 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
341 regulator-allow-bypass;
342 };
343 };
344 };
345
346 &cdsp_pas {
347 status = "okay";
348 firmware-name = "qcom/sdm845/cdsp.mdt";
349 };
350
351 &gcc {
352 protected-clocks = <GCC_QSPI_CORE_CLK>,
353 <GCC_QSPI_CORE_CLK_SRC>,
354 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>;
355 };
356
357 &gpu {
358 zap-shader {
359 memory-region = <&gpu_mem>;
360 firmware-name = "qcom/sdm845/a630_zap.mbn";
361 };
362 };
363
364 &i2c11 {
365 /* On Low speed expansion */
366 label = "LS-I2C1";
367 status = "okay";
368 };
369
370 &i2c14 {
371 /* On Low speed expansion */
372 label = "LS-I2C0";
373 status = "okay";
374 };
375
376 &mss_pil {
377 status = "okay";
378 firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
379 };
380
381 &pcie0 {
382 status = "okay";
383 perst-gpio = <&tlmm 35 GPIO_ACTIVE_LOW>;
384 enable-gpio = <&tlmm 134 GPIO_ACTIVE_HIGH>;
385
386 vddpe-3v3-supply = <&pcie0_3p3v_dual>;
387
388 pinctrl-names = "default";
389 pinctrl-0 = <&pcie0_default_state>;
390 };
391
392 &pcie0_phy {
393 status = "okay";
394
395 vdda-phy-supply = <&vreg_l1a_0p875>;
396 vdda-pll-supply = <&vreg_l26a_1p2>;
397 };
398
399 &pcie1 {
400 status = "okay";
401 perst-gpio = <&tlmm 102 GPIO_ACTIVE_LOW>;
402
403 pinctrl-names = "default";
404 pinctrl-0 = <&pcie1_default_state>;
405 };
406
407 &pcie1_phy {
408 status = "okay";
409
410 vdda-phy-supply = <&vreg_l1a_0p875>;
411 vdda-pll-supply = <&vreg_l26a_1p2>;
412 };
413
414 &pm8998_gpio {
415 vol_up_pin_a: vol-up-active {
416 pins = "gpio6";
417 function = "normal";
418 input-enable;
419 bias-pull-up;
420 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
421 };
422 };
423
424 &pm8998_pon {
425 resin {
426 compatible = "qcom,pm8941-resin";
427 interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
428 debounce = <15625>;
429 bias-pull-up;
430 linux,code = <KEY_VOLUMEDOWN>;
431 };
432 };
433
434 /* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */
435 &q6afedai {
436 qi2s@22 {
437 reg = <22>;
438 qcom,sd-lines = <0 1 2 3>;
439 };
440 };
441
442 &q6asmdai {
443 dai@0 {
444 reg = <0>;
445 direction = <2>;
446 };
447
448 dai@1 {
449 reg = <1>;
450 direction = <2>;
451 };
452
453 dai@2 {
454 reg = <2>;
455 direction = <1>;
456 };
457
458 dai@3 {
459 reg = <3>;
460 direction = <2>;
461 is-compress-dai;
462 };
463 };
464
465 &qupv3_id_0 {
466 status = "okay";
467 };
468
469 &qupv3_id_1 {
470 status = "okay";
471 };
472
473 &sdhc_2 {
474 status = "okay";
475
476 pinctrl-names = "default";
477 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
478
479 vmmc-supply = <&vreg_l21a_2p95>;
480 vqmmc-supply = <&vreg_l13a_2p95>;
481
482 bus-width = <4>;
483 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
484 };
485
486 &sound {
487 compatible = "qcom,db845c-sndcard";
488 pinctrl-0 = <&quat_mi2s_active
489 &quat_mi2s_sd0_active
490 &quat_mi2s_sd1_active
491 &quat_mi2s_sd2_active
492 &quat_mi2s_sd3_active>;
493 pinctrl-names = "default";
494 model = "DB845c";
495 audio-routing =
496 "RX_BIAS", "MCLK",
497 "AMIC1", "MIC BIAS1",
498 "AMIC2", "MIC BIAS2",
499 "DMIC0", "MIC BIAS1",
500 "DMIC1", "MIC BIAS1",
501 "DMIC2", "MIC BIAS3",
502 "DMIC3", "MIC BIAS3",
503 "SpkrLeft IN", "SPK1 OUT",
504 "SpkrRight IN", "SPK2 OUT",
505 "MM_DL1", "MultiMedia1 Playback",
506 "MM_DL2", "MultiMedia2 Playback",
507 "MM_DL4", "MultiMedia4 Playback",
508 "MultiMedia3 Capture", "MM_UL3";
509
510 mm1-dai-link {
511 link-name = "MultiMedia1";
512 cpu {
513 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>;
514 };
515 };
516
517 mm2-dai-link {
518 link-name = "MultiMedia2";
519 cpu {
520 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>;
521 };
522 };
523
524 mm3-dai-link {
525 link-name = "MultiMedia3";
526 cpu {
527 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>;
528 };
529 };
530
531 mm4-dai-link {
532 link-name = "MultiMedia4";
533 cpu {
534 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>;
535 };
536 };
537
538 slim-dai-link {
539 link-name = "SLIM Playback";
540 cpu {
541 sound-dai = <&q6afedai SLIMBUS_0_RX>;
542 };
543
544 platform {
545 sound-dai = <&q6routing>;
546 };
547
548 codec {
549 sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
550 };
551 };
552
553 slimcap-dai-link {
554 link-name = "SLIM Capture";
555 cpu {
556 sound-dai = <&q6afedai SLIMBUS_0_TX>;
557 };
558
559 platform {
560 sound-dai = <&q6routing>;
561 };
562
563 codec {
564 sound-dai = <&wcd9340 1>;
565 };
566 };
567 };
568
569 &spi2 {
570 /* On Low speed expansion */
571 label = "LS-SPI0";
572 status = "okay";
573 };
574
575 &tlmm {
576 pcie0_default_state: pcie0-default {
577 clkreq {
578 pins = "gpio36";
579 function = "pci_e0";
580 bias-pull-up;
581 };
582
583 reset-n {
584 pins = "gpio35";
585 function = "gpio";
586
587 drive-strength = <2>;
588 output-low;
589 bias-pull-down;
590 };
591
592 wake-n {
593 pins = "gpio37";
594 function = "gpio";
595
596 drive-strength = <2>;
597 bias-pull-up;
598 };
599 };
600
601 pcie0_pwren_state: pcie0-pwren {
602 pins = "gpio90";
603 function = "gpio";
604
605 drive-strength = <2>;
606 bias-disable;
607 };
608
609 pcie1_default_state: pcie1-default {
610 perst-n {
611 pins = "gpio102";
612 function = "gpio";
613
614 drive-strength = <16>;
615 bias-disable;
616 };
617
618 clkreq {
619 pins = "gpio103";
620 function = "pci_e1";
621 bias-pull-up;
622 };
623
624 wake-n {
625 pins = "gpio11";
626 function = "gpio";
627
628 drive-strength = <2>;
629 bias-pull-up;
630 };
631
632 reset-n {
633 pins = "gpio75";
634 function = "gpio";
635
636 drive-strength = <16>;
637 bias-pull-up;
638 output-high;
639 };
640 };
641
642 sdc2_default_state: sdc2-default {
643 clk {
644 pins = "sdc2_clk";
645 bias-disable;
646
647 /*
648 * It seems that mmc_test reports errors if drive
649 * strength is not 16 on clk, cmd, and data pins.
650 */
651 drive-strength = <16>;
652 };
653
654 cmd {
655 pins = "sdc2_cmd";
656 bias-pull-up;
657 drive-strength = <10>;
658 };
659
660 data {
661 pins = "sdc2_data";
662 bias-pull-up;
663 drive-strength = <10>;
664 };
665 };
666
667 sdc2_card_det_n: sd-card-det-n {
668 pins = "gpio126";
669 function = "gpio";
670 bias-pull-up;
671 };
672
673 wcd_intr_default: wcd_intr_default {
674 pins = <54>;
675 function = "gpio";
676
677 input-enable;
678 bias-pull-down;
679 drive-strength = <2>;
680 };
681 };
682
683 &uart3 {
684 label = "LS-UART0";
685 status = "disabled";
686 };
687
688 &uart6 {
689 status = "okay";
690
691 bluetooth {
692 compatible = "qcom,wcn3990-bt";
693
694 vddio-supply = <&vreg_s4a_1p8>;
695 vddxo-supply = <&vreg_l7a_1p8>;
696 vddrf-supply = <&vreg_l17a_1p3>;
697 vddch0-supply = <&vreg_l25a_3p3>;
698 max-speed = <3200000>;
699 };
700 };
701
702 &uart9 {
703 label = "LS-UART1";
704 status = "okay";
705 };
706
707 &usb_1 {
708 status = "okay";
709 };
710
711 &usb_1_dwc3 {
712 dr_mode = "peripheral";
713 };
714
715 &usb_1_hsphy {
716 status = "okay";
717
718 vdd-supply = <&vreg_l1a_0p875>;
719 vdda-pll-supply = <&vreg_l12a_1p8>;
720 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
721
722 qcom,imp-res-offset-value = <8>;
723 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
724 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
725 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
726 };
727
728 &usb_1_qmpphy {
729 status = "okay";
730
731 vdda-phy-supply = <&vreg_l26a_1p2>;
732 vdda-pll-supply = <&vreg_l1a_0p875>;
733 };
734
735 &usb_2 {
736 status = "okay";
737 };
738
739 &usb_2_dwc3 {
740 dr_mode = "host";
741 };
742
743 &usb_2_hsphy {
744 status = "okay";
745
746 vdd-supply = <&vreg_l1a_0p875>;
747 vdda-pll-supply = <&vreg_l12a_1p8>;
748 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
749
750 qcom,imp-res-offset-value = <8>;
751 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
752 };
753
754 &usb_2_qmpphy {
755 status = "okay";
756
757 vdda-phy-supply = <&vreg_l26a_1p2>;
758 vdda-pll-supply = <&vreg_l1a_0p875>;
759 };
760
761 &ufs_mem_hc {
762 status = "okay";
763
764 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
765
766 vcc-supply = <&vreg_l20a_2p95>;
767 vcc-max-microamp = <800000>;
768 };
769
770 &ufs_mem_phy {
771 status = "okay";
772
773 vdda-phy-supply = <&vreg_l1a_0p875>;
774 vdda-pll-supply = <&vreg_l26a_1p2>;
775 };
776
777 &wcd9340{
778 pinctrl-0 = <&wcd_intr_default>;
779 pinctrl-names = "default";
780 clock-names = "extclk";
781 clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
782 reset-gpios = <&tlmm 64 0>;
783 vdd-buck-supply = <&vreg_s4a_1p8>;
784 vdd-buck-sido-supply = <&vreg_s4a_1p8>;
785 vdd-tx-supply = <&vreg_s4a_1p8>;
786 vdd-rx-supply = <&vreg_s4a_1p8>;
787 vdd-io-supply = <&vreg_s4a_1p8>;
788
789 swm: swm@c85 {
790 left_spkr: wsa8810-left{
791 compatible = "sdw10217201000";
792 reg = <0 1>;
793 powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_HIGH>;
794 #thermal-sensor-cells = <0>;
795 sound-name-prefix = "SpkrLeft";
796 #sound-dai-cells = <0>;
797 };
798
799 right_spkr: wsa8810-right{
800 compatible = "sdw10217201000";
801 powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_HIGH>;
802 reg = <0 2>;
803 #thermal-sensor-cells = <0>;
804 sound-name-prefix = "SpkrRight";
805 #sound-dai-cells = <0>;
806 };
807 };
808 };
809
810 &wifi {
811 status = "okay";
812
813 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
814 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
815 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
816 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
817
818 qcom,snoc-host-cap-8bit-quirk;
819 };
820
821 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
822 &qup_spi2_default {
823 drive-strength = <16>;
824 };
825
826 &qup_uart3_default{
827 pinmux {
828 pins = "gpio41", "gpio42", "gpio43", "gpio44";
829 function = "qup3";
830 };
831 };
832
833 &qup_uart6_default {
834 pinmux {
835 pins = "gpio45", "gpio46", "gpio47", "gpio48";
836 function = "qup6";
837 };
838
839 cts {
840 pins = "gpio45";
841 bias-disable;
842 };
843
844 rts-tx {
845 pins = "gpio46", "gpio47";
846 drive-strength = <2>;
847 bias-disable;
848 };
849
850 rx {
851 pins = "gpio48";
852 bias-pull-up;
853 };
854 };
855
856 &qup_uart9_default {
857 pinconf-tx {
858 pins = "gpio4";
859 drive-strength = <2>;
860 bias-disable;
861 };
862
863 pinconf-rx {
864 pins = "gpio5";
865 drive-strength = <2>;
866 bias-pull-up;
867 };
868 };