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[thirdparty/kernel/stable.git] / arch / arm64 / boot / dts / rockchip / rk3399-rock-pi-4.dtsi
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (c) 2019 Akash Gajjar <Akash_Gajjar@mentor.com>
4 * Copyright (c) 2019 Pragnesh Patel <Pragnesh_Patel@mentor.com>
5 */
6
7 /dts-v1/;
8 #include <dt-bindings/input/linux-event-codes.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/pwm/pwm.h>
11 #include "rk3399.dtsi"
12
13 / {
14 aliases {
15 mmc0 = &sdhci;
16 mmc1 = &sdmmc;
17 };
18
19 chosen {
20 stdout-path = "serial2:1500000n8";
21 };
22
23 clkin_gmac: external-gmac-clock {
24 compatible = "fixed-clock";
25 clock-frequency = <125000000>;
26 clock-output-names = "clkin_gmac";
27 #clock-cells = <0>;
28 };
29
30 leds {
31 compatible = "gpio-leds";
32 pinctrl-names = "default";
33 pinctrl-0 = <&user_led2>;
34
35 /* USER_LED2 */
36 led-0 {
37 function = LED_FUNCTION_STATUS;
38 color = <LED_COLOR_ID_BLUE>;
39 gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
40 linux,default-trigger = "heartbeat";
41 };
42 };
43
44 sdio_pwrseq: sdio-pwrseq {
45 compatible = "mmc-pwrseq-simple";
46 clocks = <&rk808 1>;
47 clock-names = "lpo";
48 pinctrl-names = "default";
49 pinctrl-0 = <&wifi_enable_h>;
50 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
51 };
52
53 sound: sound {
54 compatible = "audio-graph-card";
55 label = "Analog";
56 dais = <&i2s0_p0>;
57 };
58
59 sound-dit {
60 compatible = "audio-graph-card";
61 label = "SPDIF";
62 dais = <&spdif_p0>;
63 };
64
65 spdif-dit {
66 compatible = "linux,spdif-dit";
67 #sound-dai-cells = <0>;
68
69 port {
70 dit_p0_0: endpoint {
71 remote-endpoint = <&spdif_p0_0>;
72 };
73 };
74 };
75
76 vbus_typec: vbus-typec-regulator {
77 compatible = "regulator-fixed";
78 enable-active-high;
79 gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
80 pinctrl-names = "default";
81 pinctrl-0 = <&vcc5v0_typec_en>;
82 regulator-name = "vbus_typec";
83 regulator-always-on;
84 vin-supply = <&vcc5v0_sys>;
85 };
86
87 vcc12v_dcin: dc-12v {
88 compatible = "regulator-fixed";
89 regulator-name = "vcc12v_dcin";
90 regulator-always-on;
91 regulator-boot-on;
92 regulator-min-microvolt = <12000000>;
93 regulator-max-microvolt = <12000000>;
94 };
95
96 vcc3v3_lan: vcc3v3-lan-regulator {
97 compatible = "regulator-fixed";
98 regulator-name = "vcc3v3_lan";
99 regulator-always-on;
100 regulator-boot-on;
101 regulator-min-microvolt = <3300000>;
102 regulator-max-microvolt = <3300000>;
103 vin-supply = <&vcc3v3_sys>;
104 };
105
106 vcc3v3_pcie: vcc3v3-pcie-regulator {
107 compatible = "regulator-fixed";
108 enable-active-high;
109 gpio = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
110 pinctrl-names = "default";
111 pinctrl-0 = <&pcie_pwr_en>;
112 regulator-name = "vcc3v3_pcie";
113 regulator-always-on;
114 regulator-boot-on;
115 vin-supply = <&vcc5v0_sys>;
116 };
117
118 vcc3v3_sys: vcc3v3-sys {
119 compatible = "regulator-fixed";
120 regulator-name = "vcc3v3_sys";
121 regulator-always-on;
122 regulator-boot-on;
123 regulator-min-microvolt = <3300000>;
124 regulator-max-microvolt = <3300000>;
125 vin-supply = <&vcc5v0_sys>;
126 };
127
128 vcc5v0_host: vcc5v0-host-regulator {
129 compatible = "regulator-fixed";
130 enable-active-high;
131 gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
132 pinctrl-names = "default";
133 pinctrl-0 = <&vcc5v0_host_en>;
134 regulator-name = "vcc5v0_host";
135 regulator-always-on;
136 vin-supply = <&vcc5v0_sys>;
137 };
138
139 vcc5v0_sys: vcc-sys {
140 compatible = "regulator-fixed";
141 regulator-name = "vcc5v0_sys";
142 regulator-always-on;
143 regulator-boot-on;
144 regulator-min-microvolt = <5000000>;
145 regulator-max-microvolt = <5000000>;
146 vin-supply = <&vcc12v_dcin>;
147 };
148
149 vcc_0v9: vcc-0v9 {
150 compatible = "regulator-fixed";
151 regulator-name = "vcc_0v9";
152 regulator-always-on;
153 regulator-boot-on;
154 regulator-min-microvolt = <900000>;
155 regulator-max-microvolt = <900000>;
156 vin-supply = <&vcc3v3_sys>;
157 };
158
159 vdd_log: vdd-log {
160 compatible = "pwm-regulator";
161 pwms = <&pwm2 0 25000 1>;
162 pwm-supply = <&vcc5v0_sys>;
163 regulator-name = "vdd_log";
164 regulator-always-on;
165 regulator-boot-on;
166 regulator-min-microvolt = <800000>;
167 regulator-max-microvolt = <1400000>;
168 };
169 };
170
171 &cpu_l0 {
172 cpu-supply = <&vdd_cpu_l>;
173 };
174
175 &cpu_l1 {
176 cpu-supply = <&vdd_cpu_l>;
177 };
178
179 &cpu_l2 {
180 cpu-supply = <&vdd_cpu_l>;
181 };
182
183 &cpu_l3 {
184 cpu-supply = <&vdd_cpu_l>;
185 };
186
187 &cpu_b0 {
188 cpu-supply = <&vdd_cpu_b>;
189 };
190
191 &cpu_b1 {
192 cpu-supply = <&vdd_cpu_b>;
193 };
194
195 &emmc_phy {
196 status = "okay";
197 };
198
199 &gmac {
200 assigned-clocks = <&cru SCLK_RMII_SRC>;
201 assigned-clock-parents = <&clkin_gmac>;
202 clock_in_out = "input";
203 phy-supply = <&vcc3v3_lan>;
204 phy-mode = "rgmii";
205 pinctrl-names = "default";
206 pinctrl-0 = <&rgmii_pins>;
207 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
208 snps,reset-active-low;
209 snps,reset-delays-us = <0 10000 50000>;
210 tx_delay = <0x28>;
211 rx_delay = <0x11>;
212 status = "okay";
213 };
214
215 &gpu {
216 mali-supply = <&vdd_gpu>;
217 status = "okay";
218 };
219
220 &hdmi {
221 avdd-0v9-supply = <&vcca0v9_hdmi>;
222 avdd-1v8-supply = <&vcca1v8_hdmi>;
223 ddc-i2c-bus = <&i2c3>;
224 pinctrl-names = "default";
225 pinctrl-0 = <&hdmi_cec>;
226 status = "okay";
227 };
228
229 &hdmi_sound {
230 status = "okay";
231 };
232
233 &i2c0 {
234 clock-frequency = <400000>;
235 i2c-scl-rising-time-ns = <168>;
236 i2c-scl-falling-time-ns = <4>;
237 status = "okay";
238
239 rk808: pmic@1b {
240 compatible = "rockchip,rk808";
241 reg = <0x1b>;
242 interrupt-parent = <&gpio1>;
243 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
244 #clock-cells = <1>;
245 clock-output-names = "xin32k", "rk808-clkout2";
246 pinctrl-names = "default";
247 pinctrl-0 = <&pmic_int_l>;
248 rockchip,system-power-controller;
249 wakeup-source;
250
251 vcc1-supply = <&vcc5v0_sys>;
252 vcc2-supply = <&vcc5v0_sys>;
253 vcc3-supply = <&vcc5v0_sys>;
254 vcc4-supply = <&vcc5v0_sys>;
255 vcc6-supply = <&vcc5v0_sys>;
256 vcc7-supply = <&vcc5v0_sys>;
257 vcc8-supply = <&vcc3v3_sys>;
258 vcc9-supply = <&vcc5v0_sys>;
259 vcc10-supply = <&vcc5v0_sys>;
260 vcc11-supply = <&vcc5v0_sys>;
261 vcc12-supply = <&vcc3v3_sys>;
262 vddio-supply = <&vcc_1v8>;
263
264 regulators {
265 vdd_center: DCDC_REG1 {
266 regulator-name = "vdd_center";
267 regulator-always-on;
268 regulator-boot-on;
269 regulator-min-microvolt = <750000>;
270 regulator-max-microvolt = <1350000>;
271 regulator-ramp-delay = <6001>;
272 regulator-state-mem {
273 regulator-off-in-suspend;
274 };
275 };
276
277 vdd_cpu_l: DCDC_REG2 {
278 regulator-name = "vdd_cpu_l";
279 regulator-always-on;
280 regulator-boot-on;
281 regulator-min-microvolt = <750000>;
282 regulator-max-microvolt = <1350000>;
283 regulator-ramp-delay = <6001>;
284 regulator-state-mem {
285 regulator-off-in-suspend;
286 };
287 };
288
289 vcc_ddr: DCDC_REG3 {
290 regulator-name = "vcc_ddr";
291 regulator-always-on;
292 regulator-boot-on;
293 regulator-state-mem {
294 regulator-on-in-suspend;
295 };
296 };
297
298 vcc_1v8: DCDC_REG4 {
299 regulator-name = "vcc_1v8";
300 regulator-always-on;
301 regulator-boot-on;
302 regulator-min-microvolt = <1800000>;
303 regulator-max-microvolt = <1800000>;
304 regulator-state-mem {
305 regulator-on-in-suspend;
306 regulator-suspend-microvolt = <1800000>;
307 };
308 };
309
310 vcca1v8_codec: LDO_REG1 {
311 regulator-name = "vcca1v8_codec";
312 regulator-always-on;
313 regulator-boot-on;
314 regulator-min-microvolt = <1800000>;
315 regulator-max-microvolt = <1800000>;
316 regulator-state-mem {
317 regulator-off-in-suspend;
318 };
319 };
320
321 vcca1v8_hdmi: LDO_REG2 {
322 regulator-name = "vcca1v8_hdmi";
323 regulator-always-on;
324 regulator-boot-on;
325 regulator-min-microvolt = <1800000>;
326 regulator-max-microvolt = <1800000>;
327 regulator-state-mem {
328 regulator-off-in-suspend;
329 };
330 };
331
332 vcca_1v8: LDO_REG3 {
333 regulator-name = "vcca_1v8";
334 regulator-always-on;
335 regulator-boot-on;
336 regulator-min-microvolt = <1800000>;
337 regulator-max-microvolt = <1800000>;
338 regulator-state-mem {
339 regulator-on-in-suspend;
340 regulator-suspend-microvolt = <1800000>;
341 };
342 };
343
344 vcc_sdio: LDO_REG4 {
345 regulator-name = "vcc_sdio";
346 regulator-always-on;
347 regulator-boot-on;
348 regulator-min-microvolt = <3000000>;
349 regulator-max-microvolt = <3000000>;
350 regulator-state-mem {
351 regulator-on-in-suspend;
352 regulator-suspend-microvolt = <3000000>;
353 };
354 };
355
356 vcca3v0_codec: LDO_REG5 {
357 regulator-name = "vcca3v0_codec";
358 regulator-always-on;
359 regulator-boot-on;
360 regulator-min-microvolt = <3000000>;
361 regulator-max-microvolt = <3000000>;
362 regulator-state-mem {
363 regulator-off-in-suspend;
364 };
365 };
366
367 vcc_1v5: LDO_REG6 {
368 regulator-name = "vcc_1v5";
369 regulator-always-on;
370 regulator-boot-on;
371 regulator-min-microvolt = <1500000>;
372 regulator-max-microvolt = <1500000>;
373 regulator-state-mem {
374 regulator-on-in-suspend;
375 regulator-suspend-microvolt = <1500000>;
376 };
377 };
378
379 vcca0v9_hdmi: LDO_REG7 {
380 regulator-name = "vcca0v9_hdmi";
381 regulator-always-on;
382 regulator-boot-on;
383 regulator-min-microvolt = <900000>;
384 regulator-max-microvolt = <900000>;
385 regulator-state-mem {
386 regulator-off-in-suspend;
387 };
388 };
389
390 vcc_3v0: LDO_REG8 {
391 regulator-name = "vcc_3v0";
392 regulator-always-on;
393 regulator-boot-on;
394 regulator-min-microvolt = <3000000>;
395 regulator-max-microvolt = <3000000>;
396 regulator-state-mem {
397 regulator-on-in-suspend;
398 regulator-suspend-microvolt = <3000000>;
399 };
400 };
401
402 vcc_cam: SWITCH_REG1 {
403 regulator-name = "vcc_cam";
404 regulator-always-on;
405 regulator-boot-on;
406 regulator-state-mem {
407 regulator-off-in-suspend;
408 };
409 };
410
411 vcc_mipi: SWITCH_REG2 {
412 regulator-name = "vcc_mipi";
413 regulator-always-on;
414 regulator-boot-on;
415 regulator-state-mem {
416 regulator-off-in-suspend;
417 };
418 };
419 };
420 };
421
422 vdd_cpu_b: regulator@40 {
423 compatible = "silergy,syr827";
424 reg = <0x40>;
425 fcs,suspend-voltage-selector = <1>;
426 pinctrl-names = "default";
427 pinctrl-0 = <&vsel1_pin>;
428 regulator-name = "vdd_cpu_b";
429 regulator-min-microvolt = <712500>;
430 regulator-max-microvolt = <1500000>;
431 regulator-ramp-delay = <1000>;
432 regulator-always-on;
433 regulator-boot-on;
434 vin-supply = <&vcc5v0_sys>;
435
436 regulator-state-mem {
437 regulator-off-in-suspend;
438 };
439 };
440
441 vdd_gpu: regulator@41 {
442 compatible = "silergy,syr828";
443 reg = <0x41>;
444 fcs,suspend-voltage-selector = <1>;
445 pinctrl-names = "default";
446 pinctrl-0 = <&vsel2_pin>;
447 regulator-name = "vdd_gpu";
448 regulator-min-microvolt = <712500>;
449 regulator-max-microvolt = <1500000>;
450 regulator-ramp-delay = <1000>;
451 regulator-always-on;
452 regulator-boot-on;
453 vin-supply = <&vcc5v0_sys>;
454
455 regulator-state-mem {
456 regulator-off-in-suspend;
457 };
458 };
459 };
460
461 &i2c1 {
462 i2c-scl-rising-time-ns = <300>;
463 i2c-scl-falling-time-ns = <15>;
464 status = "okay";
465
466 es8316: codec@11 {
467 compatible = "everest,es8316";
468 reg = <0x11>;
469 clocks = <&cru SCLK_I2S_8CH_OUT>;
470 clock-names = "mclk";
471 #sound-dai-cells = <0>;
472
473 port {
474 es8316_p0_0: endpoint {
475 remote-endpoint = <&i2s0_p0_0>;
476 };
477 };
478 };
479 };
480
481 &i2c3 {
482 i2c-scl-rising-time-ns = <450>;
483 i2c-scl-falling-time-ns = <15>;
484 status = "okay";
485 };
486
487 &i2c4 {
488 i2c-scl-rising-time-ns = <600>;
489 i2c-scl-falling-time-ns = <20>;
490 status = "okay";
491 };
492
493 &i2s0 {
494 pinctrl-0 = <&i2s0_2ch_bus>;
495 rockchip,capture-channels = <2>;
496 rockchip,playback-channels = <2>;
497 status = "okay";
498
499 i2s0_p0: port {
500 i2s0_p0_0: endpoint {
501 dai-format = "i2s";
502 mclk-fs = <256>;
503 remote-endpoint = <&es8316_p0_0>;
504 };
505 };
506 };
507
508 &i2s1 {
509 rockchip,playback-channels = <2>;
510 rockchip,capture-channels = <2>;
511 };
512
513 &i2s2 {
514 status = "okay";
515 };
516
517 &io_domains {
518 audio-supply = <&vcca1v8_codec>;
519 bt656-supply = <&vcc_3v0>;
520 gpio1830-supply = <&vcc_3v0>;
521 sdmmc-supply = <&vcc_sdio>;
522 status = "okay";
523 };
524
525 &pcie0 {
526 ep-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>;
527 num-lanes = <4>;
528 pinctrl-0 = <&pcie_clkreqnb_cpm>;
529 pinctrl-names = "default";
530 vpcie0v9-supply = <&vcc_0v9>;
531 vpcie1v8-supply = <&vcc_1v8>;
532 vpcie3v3-supply = <&vcc3v3_pcie>;
533 status = "okay";
534 };
535
536 &pcie_phy {
537 status = "okay";
538 };
539
540 &pinctrl {
541 bt {
542 bt_enable_h: bt-enable-h {
543 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
544 };
545
546 bt_host_wake_l: bt-host-wake-l {
547 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
548 };
549
550 bt_wake_l: bt-wake-l {
551 rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
552 };
553 };
554
555 es8316 {
556 hp_detect: hp-detect {
557 rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
558 };
559
560 hp_int: hp-int {
561 rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
562 };
563 };
564
565 leds {
566 user_led2: user-led2 {
567 rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
568 };
569 };
570
571 pcie {
572 pcie_pwr_en: pcie-pwr-en {
573 rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
574 };
575 };
576
577 pmic {
578 pmic_int_l: pmic-int-l {
579 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
580 };
581
582 vsel1_pin: vsel1-pin {
583 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
584 };
585
586 vsel2_pin: vsel2-pin {
587 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
588 };
589 };
590
591 sdio0 {
592 sdio0_bus4: sdio0-bus4 {
593 rockchip,pins = <2 RK_PC4 1 &pcfg_pull_up_20ma>,
594 <2 RK_PC5 1 &pcfg_pull_up_20ma>,
595 <2 RK_PC6 1 &pcfg_pull_up_20ma>,
596 <2 RK_PC7 1 &pcfg_pull_up_20ma>;
597 };
598
599 sdio0_cmd: sdio0-cmd {
600 rockchip,pins = <2 RK_PD0 1 &pcfg_pull_up_20ma>;
601 };
602
603 sdio0_clk: sdio0-clk {
604 rockchip,pins = <2 RK_PD1 1 &pcfg_pull_none_20ma>;
605 };
606 };
607
608 usb-typec {
609 vcc5v0_typec_en: vcc5v0-typec-en {
610 rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
611 };
612 };
613
614 usb2 {
615 vcc5v0_host_en: vcc5v0-host-en {
616 rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
617 };
618 };
619
620 wifi {
621 wifi_enable_h: wifi-enable-h {
622 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
623 };
624
625 wifi_host_wake_l: wifi-host-wake-l {
626 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
627 };
628 };
629 };
630
631 &pmu_io_domains {
632 pmu1830-supply = <&vcc_3v0>;
633 status = "okay";
634 };
635
636 &pwm2 {
637 status = "okay";
638 };
639
640 &saradc {
641 status = "okay";
642
643 vref-supply = <&vcc_1v8>;
644 };
645
646 &sdhci {
647 max-frequency = <150000000>;
648 bus-width = <8>;
649 mmc-hs200-1_8v;
650 non-removable;
651 status = "okay";
652 };
653
654 &sdio0 {
655 #address-cells = <1>;
656 #size-cells = <0>;
657 bus-width = <4>;
658 clock-frequency = <50000000>;
659 cap-sdio-irq;
660 cap-sd-highspeed;
661 keep-power-in-suspend;
662 mmc-pwrseq = <&sdio_pwrseq>;
663 non-removable;
664 pinctrl-names = "default";
665 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
666 sd-uhs-sdr104;
667 };
668
669 &sdmmc {
670 bus-width = <4>;
671 cap-mmc-highspeed;
672 cap-sd-highspeed;
673 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
674 disable-wp;
675 max-frequency = <150000000>;
676 pinctrl-names = "default";
677 pinctrl-0 = <&sdmmc_clk &sdmmc_cd &sdmmc_cmd &sdmmc_bus4>;
678 status = "okay";
679 };
680
681 &spdif {
682
683 spdif_p0: port {
684 spdif_p0_0: endpoint {
685 remote-endpoint = <&dit_p0_0>;
686 };
687 };
688 };
689
690 &tcphy0 {
691 status = "okay";
692 };
693
694 &tcphy1 {
695 status = "okay";
696 };
697
698 &tsadc {
699 status = "okay";
700
701 /* tshut mode 0:CRU 1:GPIO */
702 rockchip,hw-tshut-mode = <1>;
703 /* tshut polarity 0:LOW 1:HIGH */
704 rockchip,hw-tshut-polarity = <1>;
705 };
706
707 &u2phy0 {
708 status = "okay";
709
710 u2phy0_otg: otg-port {
711 status = "okay";
712 };
713
714 u2phy0_host: host-port {
715 phy-supply = <&vcc5v0_host>;
716 status = "okay";
717 };
718 };
719
720 &u2phy1 {
721 status = "okay";
722
723 u2phy1_otg: otg-port {
724 status = "okay";
725 };
726
727 u2phy1_host: host-port {
728 phy-supply = <&vcc5v0_host>;
729 status = "okay";
730 };
731 };
732
733 &uart0 {
734 pinctrl-names = "default";
735 pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
736 };
737
738 &uart2 {
739 status = "okay";
740 };
741
742 &usb_host0_ehci {
743 status = "okay";
744 };
745
746 &usb_host0_ohci {
747 status = "okay";
748 };
749
750 &usb_host1_ehci {
751 status = "okay";
752 };
753
754 &usb_host1_ohci {
755 status = "okay";
756 };
757
758 &usbdrd3_0 {
759 status = "okay";
760 };
761
762 &usbdrd3_1 {
763 status = "okay";
764 };
765
766 &usbdrd_dwc3_0 {
767 status = "okay";
768 dr_mode = "host";
769 };
770
771 &usbdrd_dwc3_1 {
772 status = "okay";
773 dr_mode = "host";
774 };
775
776 &vopb {
777 status = "okay";
778 };
779
780 &vopb_mmu {
781 status = "okay";
782 };
783
784 &vopl {
785 status = "okay";
786 };
787
788 &vopl_mmu {
789 status = "okay";
790 };