arch/arm64/include/asm/acpi.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  *  Copyright (C) 2013-2014, Linaro Ltd.
   4  *      Author: Al Stone <al.stone@linaro.org>
   5  *      Author: Graeme Gregory <graeme.gregory@linaro.org>
   6  *      Author: Hanjun Guo <hanjun.guo@linaro.org>
   7  */
   8
   9 #ifndef _ASM_ACPI_H
  10 #define _ASM_ACPI_H
  11
  12 #include <linux/efi.h>
  13 #include <linux/memblock.h>
  14 #include <linux/psci.h>
  15 #include <linux/stddef.h>
  16
  17 #include <asm/cputype.h>
  18 #include <asm/io.h>
  19 #include <asm/ptrace.h>
  20 #include <asm/smp_plat.h>
  21 #include <asm/tlbflush.h>
  22
  23 /* Macros for consistency checks of the GICC subtable of MADT */
  24
  25 /*
  26  * MADT GICC minimum length refers to the MADT GICC structure table length as
  27  * defined in the earliest ACPI version supported on arm64, ie ACPI 5.1.
  28  *
  29  * The efficiency_class member was added to the
  30  * struct acpi_madt_generic_interrupt to represent the MADT GICC structure
  31  * "Processor Power Efficiency Class" field, added in ACPI 6.0 whose offset
  32  * is therefore used to delimit the MADT GICC structure minimum length
  33  * appropriately.
  34  */
  35 #define ACPI_MADT_GICC_MIN_LENGTH   offsetof(  \
  36         struct acpi_madt_generic_interrupt, efficiency_class)
  37
  38 #define BAD_MADT_GICC_ENTRY(entry, end)                                 \
  39         (!(entry) || (entry)->header.length < ACPI_MADT_GICC_MIN_LENGTH || \
  40         (unsigned long)(entry) + (entry)->header.length > (end))
  41
  42 #define ACPI_MADT_GICC_SPE  (offsetof(struct acpi_madt_generic_interrupt, \
  43         spe_interrupt) + sizeof(u16))
  44
  45 #define ACPI_MADT_GICC_TRBE  (offsetof(struct acpi_madt_generic_interrupt, \
  46         trbe_interrupt) + sizeof(u16))
  47
  48 /* Basic configuration for ACPI */
  49 #ifdef  CONFIG_ACPI
  50 pgprot_t __acpi_get_mem_attribute(phys_addr_t addr);
  51
  52 /* ACPI table mapping after acpi_permanent_mmap is set */
  53 void __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size);
  54 #define acpi_os_ioremap acpi_os_ioremap
  55
  56 typedef u64 phys_cpuid_t;
  57 #define PHYS_CPUID_INVALID INVALID_HWID
  58
  59 #define acpi_strict 1   /* No out-of-spec workarounds on ARM64 */
  60 extern int acpi_disabled;
  61 extern int acpi_noirq;
  62 extern int acpi_pci_disabled;
  63
  64 static inline void disable_acpi(void)
  65 {
  66         acpi_disabled = 1;
  67         acpi_pci_disabled = 1;
  68         acpi_noirq = 1;
  69 }
  70
  71 static inline void enable_acpi(void)
  72 {
  73         acpi_disabled = 0;
  74         acpi_pci_disabled = 0;
  75         acpi_noirq = 0;
  76 }
  77
  78 /*
  79  * The ACPI processor driver for ACPI core code needs this macro
  80  * to find out this cpu was already mapped (mapping from CPU hardware
  81  * ID to CPU logical ID) or not.
  82  */
  83 #define cpu_physical_id(cpu) cpu_logical_map(cpu)
  84
  85 /*
  86  * It's used from ACPI core in kdump to boot UP system with SMP kernel,
  87  * with this check the ACPI core will not override the CPU index
  88  * obtained from GICC with 0 and not print some error message as well.
  89  * Since MADT must provide at least one GICC structure for GIC
  90  * initialization, CPU will be always available in MADT on ARM64.
  91  */
  92 static inline bool acpi_has_cpu_in_madt(void)
  93 {
  94         return true;
  95 }
  96
  97 struct acpi_madt_generic_interrupt *acpi_cpu_get_madt_gicc(int cpu);
  98 static inline u32 get_acpi_id_for_cpu(unsigned int cpu)
  99 {
 100         return  acpi_cpu_get_madt_gicc(cpu)->uid;
 101 }
 102
 103 static inline void arch_fix_phys_package_id(int num, u32 slot) { }
 104 void __init acpi_init_cpus(void);
 105 int apei_claim_sea(struct pt_regs *regs);
 106 #else
 107 static inline void acpi_init_cpus(void) { }
 108 static inline int apei_claim_sea(struct pt_regs *regs) { return -ENOENT; }
 109 #endif /* CONFIG_ACPI */
 110
 111 #ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
 112 bool acpi_parking_protocol_valid(int cpu);
 113 void __init
 114 acpi_set_mailbox_entry(int cpu, struct acpi_madt_generic_interrupt *processor);
 115 #else
 116 static inline bool acpi_parking_protocol_valid(int cpu) { return false; }
 117 static inline void
 118 acpi_set_mailbox_entry(int cpu, struct acpi_madt_generic_interrupt *processor)
 119 {}
 120 #endif
 121
 122 static inline const char *acpi_get_enable_method(int cpu)
 123 {
 124         if (acpi_psci_present())
 125                 return "psci";
 126
 127         if (acpi_parking_protocol_valid(cpu))
 128                 return "parking-protocol";
 129
 130         return NULL;
 131 }
 132
 133 #ifdef  CONFIG_ACPI_APEI
 134 /*
 135  * acpi_disable_cmcff is used in drivers/acpi/apei/hest.c for disabling
 136  * IA-32 Architecture Corrected Machine Check (CMC) Firmware-First mode
 137  * with a kernel command line parameter "acpi=nocmcoff". But we don't
 138  * have this IA-32 specific feature on ARM64, this definition is only
 139  * for compatibility.
 140  */
 141 #define acpi_disable_cmcff 1
 142 static inline pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr)
 143 {
 144         return __acpi_get_mem_attribute(addr);
 145 }
 146 #endif /* CONFIG_ACPI_APEI */
 147
 148 #ifdef CONFIG_ACPI_NUMA
 149 int arm64_acpi_numa_init(void);
 150 int acpi_numa_get_nid(unsigned int cpu);
 151 void acpi_map_cpus_to_nodes(void);
 152 #else
 153 static inline int arm64_acpi_numa_init(void) { return -ENOSYS; }
 154 static inline int acpi_numa_get_nid(unsigned int cpu) { return NUMA_NO_NODE; }
 155 static inline void acpi_map_cpus_to_nodes(void) { }
 156 #endif /* CONFIG_ACPI_NUMA */
 157
 158 #define ACPI_TABLE_UPGRADE_MAX_PHYS MEMBLOCK_ALLOC_ACCESSIBLE
 159
 160 #endif /*_ASM_ACPI_H*/