arch/arm64/include/asm/pgtable.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Copyright (C) 2012 ARM Ltd.
   4  */
   5 #ifndef __ASM_PGTABLE_H
   6 #define __ASM_PGTABLE_H
   7
   8 #include <asm/bug.h>
   9 #include <asm/proc-fns.h>
  10
  11 #include <asm/memory.h>
  12 #include <asm/pgtable-hwdef.h>
  13 #include <asm/pgtable-prot.h>
  14 #include <asm/tlbflush.h>
  15
  16 /*
  17  * VMALLOC range.
  18  *
  19  * VMALLOC_START: beginning of the kernel vmalloc space
  20  * VMALLOC_END: extends to the available space below vmmemmap, PCI I/O space
  21  *      and fixed mappings
  22  */
  23 #define VMALLOC_START           (MODULES_END)
  24 #define VMALLOC_END             (PAGE_OFFSET - PUD_SIZE - VMEMMAP_SIZE - SZ_64K)
  25
  26 #define vmemmap                 ((struct page *)VMEMMAP_START - (memstart_addr >> PAGE_SHIFT))
  27
  28 #define FIRST_USER_ADDRESS      0UL
  29
  30 #ifndef __ASSEMBLY__
  31
  32 #include <asm/cmpxchg.h>
  33 #include <asm/fixmap.h>
  34 #include <linux/mmdebug.h>
  35 #include <linux/mm_types.h>
  36 #include <linux/sched.h>
  37
  38 extern void __pte_error(const char *file, int line, unsigned long val);
  39 extern void __pmd_error(const char *file, int line, unsigned long val);
  40 extern void __pud_error(const char *file, int line, unsigned long val);
  41 extern void __pgd_error(const char *file, int line, unsigned long val);
  42
  43 /*
  44  * ZERO_PAGE is a global shared page that is always zero: used
  45  * for zero-mapped memory areas etc..
  46  */
  47 extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
  48 #define ZERO_PAGE(vaddr)        phys_to_page(__pa_symbol(empty_zero_page))
  49
  50 #define pte_ERROR(pte)          __pte_error(__FILE__, __LINE__, pte_val(pte))
  51
  52 /*
  53  * Macros to convert between a physical address and its placement in a
  54  * page table entry, taking care of 52-bit addresses.
  55  */
  56 #ifdef CONFIG_ARM64_PA_BITS_52
  57 #define __pte_to_phys(pte)      \
  58         ((pte_val(pte) & PTE_ADDR_LOW) | ((pte_val(pte) & PTE_ADDR_HIGH) << 36))
  59 #define __phys_to_pte_val(phys) (((phys) | ((phys) >> 36)) & PTE_ADDR_MASK)
  60 #else
  61 #define __pte_to_phys(pte)      (pte_val(pte) & PTE_ADDR_MASK)
  62 #define __phys_to_pte_val(phys) (phys)
  63 #endif
  64
  65 #define pte_pfn(pte)            (__pte_to_phys(pte) >> PAGE_SHIFT)
  66 #define pfn_pte(pfn,prot)       \
  67         __pte(__phys_to_pte_val((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot))
  68
  69 #define pte_none(pte)           (!pte_val(pte))
  70 #define pte_clear(mm,addr,ptep) set_pte(ptep, __pte(0))
  71 #define pte_page(pte)           (pfn_to_page(pte_pfn(pte)))
  72
  73 /*
  74  * The following only work if pte_present(). Undefined behaviour otherwise.
  75  */
  76 #define pte_present(pte)        (!!(pte_val(pte) & (PTE_VALID | PTE_PROT_NONE)))
  77 #define pte_young(pte)          (!!(pte_val(pte) & PTE_AF))
  78 #define pte_special(pte)        (!!(pte_val(pte) & PTE_SPECIAL))
  79 #define pte_write(pte)          (!!(pte_val(pte) & PTE_WRITE))
  80 #define pte_user_exec(pte)      (!(pte_val(pte) & PTE_UXN))
  81 #define pte_cont(pte)           (!!(pte_val(pte) & PTE_CONT))
  82
  83 #define pte_cont_addr_end(addr, end)                                            \
  84 ({      unsigned long __boundary = ((addr) + CONT_PTE_SIZE) & CONT_PTE_MASK;    \
  85         (__boundary - 1 < (end) - 1) ? __boundary : (end);                      \
  86 })
  87
  88 #define pmd_cont_addr_end(addr, end)                                            \
  89 ({      unsigned long __boundary = ((addr) + CONT_PMD_SIZE) & CONT_PMD_MASK;    \
  90         (__boundary - 1 < (end) - 1) ? __boundary : (end);                      \
  91 })
  92
  93 #define pte_hw_dirty(pte)       (pte_write(pte) && !(pte_val(pte) & PTE_RDONLY))
  94 #define pte_sw_dirty(pte)       (!!(pte_val(pte) & PTE_DIRTY))
  95 #define pte_dirty(pte)          (pte_sw_dirty(pte) || pte_hw_dirty(pte))
  96
  97 #define pte_valid(pte)          (!!(pte_val(pte) & PTE_VALID))
  98 /*
  99  * Execute-only user mappings do not have the PTE_USER bit set. All valid
 100  * kernel mappings have the PTE_UXN bit set.
 101  */
 102 #define pte_valid_not_user(pte) \
 103         ((pte_val(pte) & (PTE_VALID | PTE_USER | PTE_UXN)) == (PTE_VALID | PTE_UXN))
 104 #define pte_valid_young(pte) \
 105         ((pte_val(pte) & (PTE_VALID | PTE_AF)) == (PTE_VALID | PTE_AF))
 106 #define pte_valid_user(pte) \
 107         ((pte_val(pte) & (PTE_VALID | PTE_USER)) == (PTE_VALID | PTE_USER))
 108
 109 /*
 110  * Could the pte be present in the TLB? We must check mm_tlb_flush_pending
 111  * so that we don't erroneously return false for pages that have been
 112  * remapped as PROT_NONE but are yet to be flushed from the TLB.
 113  */
 114 #define pte_accessible(mm, pte) \
 115         (mm_tlb_flush_pending(mm) ? pte_present(pte) : pte_valid_young(pte))
 116
 117 /*
 118  * p??_access_permitted() is true for valid user mappings (subject to the
 119  * write permission check) other than user execute-only which do not have the
 120  * PTE_USER bit set. PROT_NONE mappings do not have the PTE_VALID bit set.
 121  */
 122 #define pte_access_permitted(pte, write) \
 123         (pte_valid_user(pte) && (!(write) || pte_write(pte)))
 124 #define pmd_access_permitted(pmd, write) \
 125         (pte_access_permitted(pmd_pte(pmd), (write)))
 126 #define pud_access_permitted(pud, write) \
 127         (pte_access_permitted(pud_pte(pud), (write)))
 128
 129 static inline pte_t clear_pte_bit(pte_t pte, pgprot_t prot)
 130 {
 131         pte_val(pte) &= ~pgprot_val(prot);
 132         return pte;
 133 }
 134
 135 static inline pte_t set_pte_bit(pte_t pte, pgprot_t prot)
 136 {
 137         pte_val(pte) |= pgprot_val(prot);
 138         return pte;
 139 }
 140
 141 static inline pte_t pte_wrprotect(pte_t pte)
 142 {
 143         pte = clear_pte_bit(pte, __pgprot(PTE_WRITE));
 144         pte = set_pte_bit(pte, __pgprot(PTE_RDONLY));
 145         return pte;
 146 }
 147
 148 static inline pte_t pte_mkwrite(pte_t pte)
 149 {
 150         pte = set_pte_bit(pte, __pgprot(PTE_WRITE));
 151         pte = clear_pte_bit(pte, __pgprot(PTE_RDONLY));
 152         return pte;
 153 }
 154
 155 static inline pte_t pte_mkclean(pte_t pte)
 156 {
 157         pte = clear_pte_bit(pte, __pgprot(PTE_DIRTY));
 158         pte = set_pte_bit(pte, __pgprot(PTE_RDONLY));
 159
 160         return pte;
 161 }
 162
 163 static inline pte_t pte_mkdirty(pte_t pte)
 164 {
 165         pte = set_pte_bit(pte, __pgprot(PTE_DIRTY));
 166
 167         if (pte_write(pte))
 168                 pte = clear_pte_bit(pte, __pgprot(PTE_RDONLY));
 169
 170         return pte;
 171 }
 172
 173 static inline pte_t pte_mkold(pte_t pte)
 174 {
 175         return clear_pte_bit(pte, __pgprot(PTE_AF));
 176 }
 177
 178 static inline pte_t pte_mkyoung(pte_t pte)
 179 {
 180         return set_pte_bit(pte, __pgprot(PTE_AF));
 181 }
 182
 183 static inline pte_t pte_mkspecial(pte_t pte)
 184 {
 185         return set_pte_bit(pte, __pgprot(PTE_SPECIAL));
 186 }
 187
 188 static inline pte_t pte_mkcont(pte_t pte)
 189 {
 190         pte = set_pte_bit(pte, __pgprot(PTE_CONT));
 191         return set_pte_bit(pte, __pgprot(PTE_TYPE_PAGE));
 192 }
 193
 194 static inline pte_t pte_mknoncont(pte_t pte)
 195 {
 196         return clear_pte_bit(pte, __pgprot(PTE_CONT));
 197 }
 198
 199 static inline pte_t pte_mkpresent(pte_t pte)
 200 {
 201         return set_pte_bit(pte, __pgprot(PTE_VALID));
 202 }
 203
 204 static inline pmd_t pmd_mkcont(pmd_t pmd)
 205 {
 206         return __pmd(pmd_val(pmd) | PMD_SECT_CONT);
 207 }
 208
 209 static inline void set_pte(pte_t *ptep, pte_t pte)
 210 {
 211         WRITE_ONCE(*ptep, pte);
 212
 213         /*
 214          * Only if the new pte is valid and kernel, otherwise TLB maintenance
 215          * or update_mmu_cache() have the necessary barriers.
 216          */
 217         if (pte_valid_not_user(pte))
 218                 dsb(ishst);
 219 }
 220
 221 extern void __sync_icache_dcache(pte_t pteval);
 222
 223 /*
 224  * PTE bits configuration in the presence of hardware Dirty Bit Management
 225  * (PTE_WRITE == PTE_DBM):
 226  *
 227  * Dirty  Writable | PTE_RDONLY  PTE_WRITE  PTE_DIRTY (sw)
 228  *   0      0      |   1           0          0
 229  *   0      1      |   1           1          0
 230  *   1      0      |   1           0          1
 231  *   1      1      |   0           1          x
 232  *
 233  * When hardware DBM is not present, the sofware PTE_DIRTY bit is updated via
 234  * the page fault mechanism. Checking the dirty status of a pte becomes:
 235  *
 236  *   PTE_DIRTY || (PTE_WRITE && !PTE_RDONLY)
 237  */
 238 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
 239                               pte_t *ptep, pte_t pte)
 240 {
 241         pte_t old_pte;
 242
 243         if (pte_present(pte) && pte_user_exec(pte) && !pte_special(pte))
 244                 __sync_icache_dcache(pte);
 245
 246         /*
 247          * If the existing pte is valid, check for potential race with
 248          * hardware updates of the pte (ptep_set_access_flags safely changes
 249          * valid ptes without going through an invalid entry).
 250          */
 251         old_pte = READ_ONCE(*ptep);
 252         if (IS_ENABLED(CONFIG_DEBUG_VM) && pte_valid(old_pte) && pte_valid(pte) &&
 253            (mm == current->active_mm || atomic_read(&mm->mm_users) > 1)) {
 254                 VM_WARN_ONCE(!pte_young(pte),
 255                              "%s: racy access flag clearing: 0x%016llx -> 0x%016llx",
 256                              __func__, pte_val(old_pte), pte_val(pte));
 257                 VM_WARN_ONCE(pte_write(old_pte) && !pte_dirty(pte),
 258                              "%s: racy dirty state clearing: 0x%016llx -> 0x%016llx",
 259                              __func__, pte_val(old_pte), pte_val(pte));
 260         }
 261
 262         set_pte(ptep, pte);
 263 }
 264
 265 #define __HAVE_ARCH_PTE_SAME
 266 static inline int pte_same(pte_t pte_a, pte_t pte_b)
 267 {
 268         pteval_t lhs, rhs;
 269
 270         lhs = pte_val(pte_a);
 271         rhs = pte_val(pte_b);
 272
 273         if (pte_present(pte_a))
 274                 lhs &= ~PTE_RDONLY;
 275
 276         if (pte_present(pte_b))
 277                 rhs &= ~PTE_RDONLY;
 278
 279         return (lhs == rhs);
 280 }
 281
 282 /*
 283  * Huge pte definitions.
 284  */
 285 #define pte_huge(pte)           (!(pte_val(pte) & PTE_TABLE_BIT))
 286 #define pte_mkhuge(pte)         (__pte(pte_val(pte) & ~PTE_TABLE_BIT))
 287
 288 /*
 289  * Hugetlb definitions.
 290  */
 291 #define HUGE_MAX_HSTATE         4
 292 #define HPAGE_SHIFT             PMD_SHIFT
 293 #define HPAGE_SIZE              (_AC(1, UL) << HPAGE_SHIFT)
 294 #define HPAGE_MASK              (~(HPAGE_SIZE - 1))
 295 #define HUGETLB_PAGE_ORDER      (HPAGE_SHIFT - PAGE_SHIFT)
 296
 297 static inline pte_t pgd_pte(pgd_t pgd)
 298 {
 299         return __pte(pgd_val(pgd));
 300 }
 301
 302 static inline pte_t pud_pte(pud_t pud)
 303 {
 304         return __pte(pud_val(pud));
 305 }
 306
 307 static inline pud_t pte_pud(pte_t pte)
 308 {
 309         return __pud(pte_val(pte));
 310 }
 311
 312 static inline pmd_t pud_pmd(pud_t pud)
 313 {
 314         return __pmd(pud_val(pud));
 315 }
 316
 317 static inline pte_t pmd_pte(pmd_t pmd)
 318 {
 319         return __pte(pmd_val(pmd));
 320 }
 321
 322 static inline pmd_t pte_pmd(pte_t pte)
 323 {
 324         return __pmd(pte_val(pte));
 325 }
 326
 327 static inline pgprot_t mk_sect_prot(pgprot_t prot)
 328 {
 329         return __pgprot(pgprot_val(prot) & ~PTE_TABLE_BIT);
 330 }
 331
 332 #ifdef CONFIG_NUMA_BALANCING
 333 /*
 334  * See the comment in include/asm-generic/pgtable.h
 335  */
 336 static inline int pte_protnone(pte_t pte)
 337 {
 338         return (pte_val(pte) & (PTE_VALID | PTE_PROT_NONE)) == PTE_PROT_NONE;
 339 }
 340
 341 static inline int pmd_protnone(pmd_t pmd)
 342 {
 343         return pte_protnone(pmd_pte(pmd));
 344 }
 345 #endif
 346
 347 /*
 348  * THP definitions.
 349  */
 350
 351 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 352 #define pmd_trans_huge(pmd)     (pmd_val(pmd) && !(pmd_val(pmd) & PMD_TABLE_BIT))
 353 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
 354
 355 #define pmd_present(pmd)        pte_present(pmd_pte(pmd))
 356 #define pmd_dirty(pmd)          pte_dirty(pmd_pte(pmd))
 357 #define pmd_young(pmd)          pte_young(pmd_pte(pmd))
 358 #define pmd_valid(pmd)          pte_valid(pmd_pte(pmd))
 359 #define pmd_wrprotect(pmd)      pte_pmd(pte_wrprotect(pmd_pte(pmd)))
 360 #define pmd_mkold(pmd)          pte_pmd(pte_mkold(pmd_pte(pmd)))
 361 #define pmd_mkwrite(pmd)        pte_pmd(pte_mkwrite(pmd_pte(pmd)))
 362 #define pmd_mkclean(pmd)        pte_pmd(pte_mkclean(pmd_pte(pmd)))
 363 #define pmd_mkdirty(pmd)        pte_pmd(pte_mkdirty(pmd_pte(pmd)))
 364 #define pmd_mkyoung(pmd)        pte_pmd(pte_mkyoung(pmd_pte(pmd)))
 365 #define pmd_mknotpresent(pmd)   (__pmd(pmd_val(pmd) & ~PMD_SECT_VALID))
 366
 367 #define pmd_thp_or_huge(pmd)    (pmd_huge(pmd) || pmd_trans_huge(pmd))
 368
 369 #define pmd_write(pmd)          pte_write(pmd_pte(pmd))
 370
 371 #define pmd_mkhuge(pmd)         (__pmd(pmd_val(pmd) & ~PMD_TABLE_BIT))
 372
 373 #define __pmd_to_phys(pmd)      __pte_to_phys(pmd_pte(pmd))
 374 #define __phys_to_pmd_val(phys) __phys_to_pte_val(phys)
 375 #define pmd_pfn(pmd)            ((__pmd_to_phys(pmd) & PMD_MASK) >> PAGE_SHIFT)
 376 #define pfn_pmd(pfn,prot)       __pmd(__phys_to_pmd_val((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot))
 377 #define mk_pmd(page,prot)       pfn_pmd(page_to_pfn(page),prot)
 378
 379 #define pud_young(pud)          pte_young(pud_pte(pud))
 380 #define pud_mkyoung(pud)        pte_pud(pte_mkyoung(pud_pte(pud)))
 381 #define pud_write(pud)          pte_write(pud_pte(pud))
 382
 383 #define pud_mkhuge(pud)         (__pud(pud_val(pud) & ~PUD_TABLE_BIT))
 384
 385 #define __pud_to_phys(pud)      __pte_to_phys(pud_pte(pud))
 386 #define __phys_to_pud_val(phys) __phys_to_pte_val(phys)
 387 #define pud_pfn(pud)            ((__pud_to_phys(pud) & PUD_MASK) >> PAGE_SHIFT)
 388 #define pfn_pud(pfn,prot)       __pud(__phys_to_pud_val((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot))
 389
 390 #define set_pmd_at(mm, addr, pmdp, pmd) set_pte_at(mm, addr, (pte_t *)pmdp, pmd_pte(pmd))
 391
 392 #define __pgd_to_phys(pgd)      __pte_to_phys(pgd_pte(pgd))
 393 #define __phys_to_pgd_val(phys) __phys_to_pte_val(phys)
 394
 395 #define __pgprot_modify(prot,mask,bits) \
 396         __pgprot((pgprot_val(prot) & ~(mask)) | (bits))
 397
 398 /*
 399  * Mark the prot value as uncacheable and unbufferable.
 400  */
 401 #define pgprot_noncached(prot) \
 402         __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRnE) | PTE_PXN | PTE_UXN)
 403 #define pgprot_writecombine(prot) \
 404         __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL_NC) | PTE_PXN | PTE_UXN)
 405 #define pgprot_device(prot) \
 406         __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRE) | PTE_PXN | PTE_UXN)
 407 #define __HAVE_PHYS_MEM_ACCESS_PROT
 408 struct file;
 409 extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
 410                                      unsigned long size, pgprot_t vma_prot);
 411
 412 #define pmd_none(pmd)           (!pmd_val(pmd))
 413
 414 #define pmd_bad(pmd)            (!(pmd_val(pmd) & PMD_TABLE_BIT))
 415
 416 #define pmd_table(pmd)          ((pmd_val(pmd) & PMD_TYPE_MASK) == \
 417                                  PMD_TYPE_TABLE)
 418 #define pmd_sect(pmd)           ((pmd_val(pmd) & PMD_TYPE_MASK) == \
 419                                  PMD_TYPE_SECT)
 420
 421 #if defined(CONFIG_ARM64_64K_PAGES) || CONFIG_PGTABLE_LEVELS < 3
 422 #define pud_sect(pud)           (0)
 423 #define pud_table(pud)          (1)
 424 #else
 425 #define pud_sect(pud)           ((pud_val(pud) & PUD_TYPE_MASK) == \
 426                                  PUD_TYPE_SECT)
 427 #define pud_table(pud)          ((pud_val(pud) & PUD_TYPE_MASK) == \
 428                                  PUD_TYPE_TABLE)
 429 #endif
 430
 431 extern pgd_t init_pg_dir[PTRS_PER_PGD];
 432 extern pgd_t init_pg_end[];
 433 extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
 434 extern pgd_t idmap_pg_dir[PTRS_PER_PGD];
 435 extern pgd_t tramp_pg_dir[PTRS_PER_PGD];
 436
 437 extern void set_swapper_pgd(pgd_t *pgdp, pgd_t pgd);
 438
 439 static inline bool in_swapper_pgdir(void *addr)
 440 {
 441         return ((unsigned long)addr & PAGE_MASK) ==
 442                 ((unsigned long)swapper_pg_dir & PAGE_MASK);
 443 }
 444
 445 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
 446 {
 447 #ifdef __PAGETABLE_PMD_FOLDED
 448         if (in_swapper_pgdir(pmdp)) {
 449                 set_swapper_pgd((pgd_t *)pmdp, __pgd(pmd_val(pmd)));
 450                 return;
 451         }
 452 #endif /* __PAGETABLE_PMD_FOLDED */
 453
 454         WRITE_ONCE(*pmdp, pmd);
 455
 456         if (pmd_valid(pmd))
 457                 dsb(ishst);
 458 }
 459
 460 static inline void pmd_clear(pmd_t *pmdp)
 461 {
 462         set_pmd(pmdp, __pmd(0));
 463 }
 464
 465 static inline phys_addr_t pmd_page_paddr(pmd_t pmd)
 466 {
 467         return __pmd_to_phys(pmd);
 468 }
 469
 470 static inline void pte_unmap(pte_t *pte) { }
 471
 472 /* Find an entry in the third-level page table. */
 473 #define pte_index(addr)         (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
 474
 475 #define pte_offset_phys(dir,addr)       (pmd_page_paddr(READ_ONCE(*(dir))) + pte_index(addr) * sizeof(pte_t))
 476 #define pte_offset_kernel(dir,addr)     ((pte_t *)__va(pte_offset_phys((dir), (addr))))
 477
 478 #define pte_offset_map(dir,addr)        pte_offset_kernel((dir), (addr))
 479
 480 #define pte_set_fixmap(addr)            ((pte_t *)set_fixmap_offset(FIX_PTE, addr))
 481 #define pte_set_fixmap_offset(pmd, addr)        pte_set_fixmap(pte_offset_phys(pmd, addr))
 482 #define pte_clear_fixmap()              clear_fixmap(FIX_PTE)
 483
 484 #define pmd_page(pmd)           pfn_to_page(__phys_to_pfn(__pmd_to_phys(pmd)))
 485
 486 /* use ONLY for statically allocated translation tables */
 487 #define pte_offset_kimg(dir,addr)       ((pte_t *)__phys_to_kimg(pte_offset_phys((dir), (addr))))
 488
 489 /*
 490  * Conversion functions: convert a page and protection to a page entry,
 491  * and a page entry and page directory to the page they refer to.
 492  */
 493 #define mk_pte(page,prot)       pfn_pte(page_to_pfn(page),prot)
 494
 495 #if CONFIG_PGTABLE_LEVELS > 2
 496
 497 #define pmd_ERROR(pmd)          __pmd_error(__FILE__, __LINE__, pmd_val(pmd))
 498
 499 #define pud_none(pud)           (!pud_val(pud))
 500 #define pud_bad(pud)            (!(pud_val(pud) & PUD_TABLE_BIT))
 501 #define pud_present(pud)        pte_present(pud_pte(pud))
 502 #define pud_valid(pud)          pte_valid(pud_pte(pud))
 503
 504 static inline void set_pud(pud_t *pudp, pud_t pud)
 505 {
 506 #ifdef __PAGETABLE_PUD_FOLDED
 507         if (in_swapper_pgdir(pudp)) {
 508                 set_swapper_pgd((pgd_t *)pudp, __pgd(pud_val(pud)));
 509                 return;
 510         }
 511 #endif /* __PAGETABLE_PUD_FOLDED */
 512
 513         WRITE_ONCE(*pudp, pud);
 514
 515         if (pud_valid(pud))
 516                 dsb(ishst);
 517 }
 518
 519 static inline void pud_clear(pud_t *pudp)
 520 {
 521         set_pud(pudp, __pud(0));
 522 }
 523
 524 static inline phys_addr_t pud_page_paddr(pud_t pud)
 525 {
 526         return __pud_to_phys(pud);
 527 }
 528
 529 /* Find an entry in the second-level page table. */
 530 #define pmd_index(addr)         (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
 531
 532 #define pmd_offset_phys(dir, addr)      (pud_page_paddr(READ_ONCE(*(dir))) + pmd_index(addr) * sizeof(pmd_t))
 533 #define pmd_offset(dir, addr)           ((pmd_t *)__va(pmd_offset_phys((dir), (addr))))
 534
 535 #define pmd_set_fixmap(addr)            ((pmd_t *)set_fixmap_offset(FIX_PMD, addr))
 536 #define pmd_set_fixmap_offset(pud, addr)        pmd_set_fixmap(pmd_offset_phys(pud, addr))
 537 #define pmd_clear_fixmap()              clear_fixmap(FIX_PMD)
 538
 539 #define pud_page(pud)           pfn_to_page(__phys_to_pfn(__pud_to_phys(pud)))
 540
 541 /* use ONLY for statically allocated translation tables */
 542 #define pmd_offset_kimg(dir,addr)       ((pmd_t *)__phys_to_kimg(pmd_offset_phys((dir), (addr))))
 543
 544 #else
 545
 546 #define pud_page_paddr(pud)     ({ BUILD_BUG(); 0; })
 547
 548 /* Match pmd_offset folding in <asm/generic/pgtable-nopmd.h> */
 549 #define pmd_set_fixmap(addr)            NULL
 550 #define pmd_set_fixmap_offset(pudp, addr)       ((pmd_t *)pudp)
 551 #define pmd_clear_fixmap()
 552
 553 #define pmd_offset_kimg(dir,addr)       ((pmd_t *)dir)
 554
 555 #endif  /* CONFIG_PGTABLE_LEVELS > 2 */
 556
 557 #if CONFIG_PGTABLE_LEVELS > 3
 558
 559 #define pud_ERROR(pud)          __pud_error(__FILE__, __LINE__, pud_val(pud))
 560
 561 #define pgd_none(pgd)           (!pgd_val(pgd))
 562 #define pgd_bad(pgd)            (!(pgd_val(pgd) & 2))
 563 #define pgd_present(pgd)        (pgd_val(pgd))
 564
 565 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
 566 {
 567         if (in_swapper_pgdir(pgdp)) {
 568                 set_swapper_pgd(pgdp, pgd);
 569                 return;
 570         }
 571
 572         WRITE_ONCE(*pgdp, pgd);
 573         dsb(ishst);
 574 }
 575
 576 static inline void pgd_clear(pgd_t *pgdp)
 577 {
 578         set_pgd(pgdp, __pgd(0));
 579 }
 580
 581 static inline phys_addr_t pgd_page_paddr(pgd_t pgd)
 582 {
 583         return __pgd_to_phys(pgd);
 584 }
 585
 586 /* Find an entry in the frst-level page table. */
 587 #define pud_index(addr)         (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))
 588
 589 #define pud_offset_phys(dir, addr)      (pgd_page_paddr(READ_ONCE(*(dir))) + pud_index(addr) * sizeof(pud_t))
 590 #define pud_offset(dir, addr)           ((pud_t *)__va(pud_offset_phys((dir), (addr))))
 591
 592 #define pud_set_fixmap(addr)            ((pud_t *)set_fixmap_offset(FIX_PUD, addr))
 593 #define pud_set_fixmap_offset(pgd, addr)        pud_set_fixmap(pud_offset_phys(pgd, addr))
 594 #define pud_clear_fixmap()              clear_fixmap(FIX_PUD)
 595
 596 #define pgd_page(pgd)           pfn_to_page(__phys_to_pfn(__pgd_to_phys(pgd)))
 597
 598 /* use ONLY for statically allocated translation tables */
 599 #define pud_offset_kimg(dir,addr)       ((pud_t *)__phys_to_kimg(pud_offset_phys((dir), (addr))))
 600
 601 #else
 602
 603 #define pgd_page_paddr(pgd)     ({ BUILD_BUG(); 0;})
 604
 605 /* Match pud_offset folding in <asm/generic/pgtable-nopud.h> */
 606 #define pud_set_fixmap(addr)            NULL
 607 #define pud_set_fixmap_offset(pgdp, addr)       ((pud_t *)pgdp)
 608 #define pud_clear_fixmap()
 609
 610 #define pud_offset_kimg(dir,addr)       ((pud_t *)dir)
 611
 612 #endif  /* CONFIG_PGTABLE_LEVELS > 3 */
 613
 614 #define pgd_ERROR(pgd)          __pgd_error(__FILE__, __LINE__, pgd_val(pgd))
 615
 616 /* to find an entry in a page-table-directory */
 617 #define pgd_index(addr)         (((addr) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
 618
 619 #define pgd_offset_raw(pgd, addr)       ((pgd) + pgd_index(addr))
 620
 621 #define pgd_offset(mm, addr)    (pgd_offset_raw((mm)->pgd, (addr)))
 622
 623 /* to find an entry in a kernel page-table-directory */
 624 #define pgd_offset_k(addr)      pgd_offset(&init_mm, addr)
 625
 626 #define pgd_set_fixmap(addr)    ((pgd_t *)set_fixmap_offset(FIX_PGD, addr))
 627 #define pgd_clear_fixmap()      clear_fixmap(FIX_PGD)
 628
 629 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 630 {
 631         const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY |
 632                               PTE_PROT_NONE | PTE_VALID | PTE_WRITE;
 633         /* preserve the hardware dirty information */
 634         if (pte_hw_dirty(pte))
 635                 pte = pte_mkdirty(pte);
 636         pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
 637         return pte;
 638 }
 639
 640 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
 641 {
 642         return pte_pmd(pte_modify(pmd_pte(pmd), newprot));
 643 }
 644
 645 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
 646 extern int ptep_set_access_flags(struct vm_area_struct *vma,
 647                                  unsigned long address, pte_t *ptep,
 648                                  pte_t entry, int dirty);
 649
 650 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 651 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
 652 static inline int pmdp_set_access_flags(struct vm_area_struct *vma,
 653                                         unsigned long address, pmd_t *pmdp,
 654                                         pmd_t entry, int dirty)
 655 {
 656         return ptep_set_access_flags(vma, address, (pte_t *)pmdp, pmd_pte(entry), dirty);
 657 }
 658 #endif
 659
 660 /*
 661  * Atomic pte/pmd modifications.
 662  */
 663 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
 664 static inline int __ptep_test_and_clear_young(pte_t *ptep)
 665 {
 666         pte_t old_pte, pte;
 667
 668         pte = READ_ONCE(*ptep);
 669         do {
 670                 old_pte = pte;
 671                 pte = pte_mkold(pte);
 672                 pte_val(pte) = cmpxchg_relaxed(&pte_val(*ptep),
 673                                                pte_val(old_pte), pte_val(pte));
 674         } while (pte_val(pte) != pte_val(old_pte));
 675
 676         return pte_young(pte);
 677 }
 678
 679 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
 680                                             unsigned long address,
 681                                             pte_t *ptep)
 682 {
 683         return __ptep_test_and_clear_young(ptep);
 684 }
 685
 686 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
 687 static inline int ptep_clear_flush_young(struct vm_area_struct *vma,
 688                                          unsigned long address, pte_t *ptep)
 689 {
 690         int young = ptep_test_and_clear_young(vma, address, ptep);
 691
 692         if (young) {
 693                 /*
 694                  * We can elide the trailing DSB here since the worst that can
 695                  * happen is that a CPU continues to use the young entry in its
 696                  * TLB and we mistakenly reclaim the associated page. The
 697                  * window for such an event is bounded by the next
 698                  * context-switch, which provides a DSB to complete the TLB
 699                  * invalidation.
 700                  */
 701                 flush_tlb_page_nosync(vma, address);
 702         }
 703
 704         return young;
 705 }
 706
 707 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 708 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
 709 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
 710                                             unsigned long address,
 711                                             pmd_t *pmdp)
 712 {
 713         return ptep_test_and_clear_young(vma, address, (pte_t *)pmdp);
 714 }
 715 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
 716
 717 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
 718 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
 719                                        unsigned long address, pte_t *ptep)
 720 {
 721         return __pte(xchg_relaxed(&pte_val(*ptep), 0));
 722 }
 723
 724 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 725 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
 726 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
 727                                             unsigned long address, pmd_t *pmdp)
 728 {
 729         return pte_pmd(ptep_get_and_clear(mm, address, (pte_t *)pmdp));
 730 }
 731 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
 732
 733 /*
 734  * ptep_set_wrprotect - mark read-only while trasferring potential hardware
 735  * dirty status (PTE_DBM && !PTE_RDONLY) to the software PTE_DIRTY bit.
 736  */
 737 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
 738 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
 739 {
 740         pte_t old_pte, pte;
 741
 742         pte = READ_ONCE(*ptep);
 743         do {
 744                 old_pte = pte;
 745                 /*
 746                  * If hardware-dirty (PTE_WRITE/DBM bit set and PTE_RDONLY
 747                  * clear), set the PTE_DIRTY bit.
 748                  */
 749                 if (pte_hw_dirty(pte))
 750                         pte = pte_mkdirty(pte);
 751                 pte = pte_wrprotect(pte);
 752                 pte_val(pte) = cmpxchg_relaxed(&pte_val(*ptep),
 753                                                pte_val(old_pte), pte_val(pte));
 754         } while (pte_val(pte) != pte_val(old_pte));
 755 }
 756
 757 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 758 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
 759 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
 760                                       unsigned long address, pmd_t *pmdp)
 761 {
 762         ptep_set_wrprotect(mm, address, (pte_t *)pmdp);
 763 }
 764
 765 #define pmdp_establish pmdp_establish
 766 static inline pmd_t pmdp_establish(struct vm_area_struct *vma,
 767                 unsigned long address, pmd_t *pmdp, pmd_t pmd)
 768 {
 769         return __pmd(xchg_relaxed(&pmd_val(*pmdp), pmd_val(pmd)));
 770 }
 771 #endif
 772
 773 /*
 774  * Encode and decode a swap entry:
 775  *      bits 0-1:       present (must be zero)
 776  *      bits 2-7:       swap type
 777  *      bits 8-57:      swap offset
 778  *      bit  58:        PTE_PROT_NONE (must be zero)
 779  */
 780 #define __SWP_TYPE_SHIFT        2
 781 #define __SWP_TYPE_BITS         6
 782 #define __SWP_OFFSET_BITS       50
 783 #define __SWP_TYPE_MASK         ((1 << __SWP_TYPE_BITS) - 1)
 784 #define __SWP_OFFSET_SHIFT      (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
 785 #define __SWP_OFFSET_MASK       ((1UL << __SWP_OFFSET_BITS) - 1)
 786
 787 #define __swp_type(x)           (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK)
 788 #define __swp_offset(x)         (((x).val >> __SWP_OFFSET_SHIFT) & __SWP_OFFSET_MASK)
 789 #define __swp_entry(type,offset) ((swp_entry_t) { ((type) << __SWP_TYPE_SHIFT) | ((offset) << __SWP_OFFSET_SHIFT) })
 790
 791 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
 792 #define __swp_entry_to_pte(swp) ((pte_t) { (swp).val })
 793
 794 /*
 795  * Ensure that there are not more swap files than can be encoded in the kernel
 796  * PTEs.
 797  */
 798 #define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS)
 799
 800 extern int kern_addr_valid(unsigned long addr);
 801
 802 #include <asm-generic/pgtable.h>
 803
 804 void pgd_cache_init(void);
 805 #define pgtable_cache_init      pgd_cache_init
 806
 807 /*
 808  * On AArch64, the cache coherency is handled via the set_pte_at() function.
 809  */
 810 static inline void update_mmu_cache(struct vm_area_struct *vma,
 811                                     unsigned long addr, pte_t *ptep)
 812 {
 813         /*
 814          * We don't do anything here, so there's a very small chance of
 815          * us retaking a user fault which we just fixed up. The alternative
 816          * is doing a dsb(ishst), but that penalises the fastpath.
 817          */
 818 }
 819
 820 #define update_mmu_cache_pmd(vma, address, pmd) do { } while (0)
 821
 822 #define kc_vaddr_to_offset(v)   ((v) & ~VA_START)
 823 #define kc_offset_to_vaddr(o)   ((o) | VA_START)
 824
 825 #ifdef CONFIG_ARM64_PA_BITS_52
 826 #define phys_to_ttbr(addr)      (((addr) | ((addr) >> 46)) & TTBR_BADDR_MASK_52)
 827 #else
 828 #define phys_to_ttbr(addr)      (addr)
 829 #endif
 830
 831 #endif /* !__ASSEMBLY__ */
 832
 833 #endif /* __ASM_PGTABLE_H */