arch/arm64/kernel/process.c

   1 /*
   2  * Based on arch/arm/kernel/process.c
   3  *
   4  * Original Copyright (C) 1995  Linus Torvalds
   5  * Copyright (C) 1996-2000 Russell King - Converted to ARM.
   6  * Copyright (C) 2012 ARM Ltd.
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #include <stdarg.h>
  22
  23 #include <linux/compat.h>
  24 #include <linux/efi.h>
  25 #include <linux/export.h>
  26 #include <linux/sched.h>
  27 #include <linux/sched/debug.h>
  28 #include <linux/sched/task.h>
  29 #include <linux/sched/task_stack.h>
  30 #include <linux/kernel.h>
  31 #include <linux/mm.h>
  32 #include <linux/stddef.h>
  33 #include <linux/unistd.h>
  34 #include <linux/user.h>
  35 #include <linux/delay.h>
  36 #include <linux/reboot.h>
  37 #include <linux/interrupt.h>
  38 #include <linux/kallsyms.h>
  39 #include <linux/init.h>
  40 #include <linux/cpu.h>
  41 #include <linux/elfcore.h>
  42 #include <linux/pm.h>
  43 #include <linux/tick.h>
  44 #include <linux/utsname.h>
  45 #include <linux/uaccess.h>
  46 #include <linux/random.h>
  47 #include <linux/hw_breakpoint.h>
  48 #include <linux/personality.h>
  49 #include <linux/notifier.h>
  50 #include <trace/events/power.h>
  51 #include <linux/percpu.h>
  52
  53 #include <asm/alternative.h>
  54 #include <asm/compat.h>
  55 #include <asm/cacheflush.h>
  56 #include <asm/exec.h>
  57 #include <asm/fpsimd.h>
  58 #include <asm/mmu_context.h>
  59 #include <asm/processor.h>
  60 #include <asm/stacktrace.h>
  61
  62 #ifdef CONFIG_CC_STACKPROTECTOR
  63 #include <linux/stackprotector.h>
  64 unsigned long __stack_chk_guard __read_mostly;
  65 EXPORT_SYMBOL(__stack_chk_guard);
  66 #endif
  67
  68 /*
  69  * Function pointers to optional machine specific functions
  70  */
  71 void (*pm_power_off)(void);
  72 EXPORT_SYMBOL_GPL(pm_power_off);
  73
  74 void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd);
  75
  76 /*
  77  * This is our default idle handler.
  78  */
  79 void arch_cpu_idle(void)
  80 {
  81         /*
  82          * This should do all the clock switching and wait for interrupt
  83          * tricks
  84          */
  85         trace_cpu_idle_rcuidle(1, smp_processor_id());
  86         cpu_do_idle();
  87         local_irq_enable();
  88         trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
  89 }
  90
  91 #ifdef CONFIG_HOTPLUG_CPU
  92 void arch_cpu_idle_dead(void)
  93 {
  94        cpu_die();
  95 }
  96 #endif
  97
  98 /*
  99  * Called by kexec, immediately prior to machine_kexec().
 100  *
 101  * This must completely disable all secondary CPUs; simply causing those CPUs
 102  * to execute e.g. a RAM-based pin loop is not sufficient. This allows the
 103  * kexec'd kernel to use any and all RAM as it sees fit, without having to
 104  * avoid any code or data used by any SW CPU pin loop. The CPU hotplug
 105  * functionality embodied in disable_nonboot_cpus() to achieve this.
 106  */
 107 void machine_shutdown(void)
 108 {
 109         disable_nonboot_cpus();
 110 }
 111
 112 /*
 113  * Halting simply requires that the secondary CPUs stop performing any
 114  * activity (executing tasks, handling interrupts). smp_send_stop()
 115  * achieves this.
 116  */
 117 void machine_halt(void)
 118 {
 119         local_irq_disable();
 120         smp_send_stop();
 121         while (1);
 122 }
 123
 124 /*
 125  * Power-off simply requires that the secondary CPUs stop performing any
 126  * activity (executing tasks, handling interrupts). smp_send_stop()
 127  * achieves this. When the system power is turned off, it will take all CPUs
 128  * with it.
 129  */
 130 void machine_power_off(void)
 131 {
 132         local_irq_disable();
 133         smp_send_stop();
 134         if (pm_power_off)
 135                 pm_power_off();
 136 }
 137
 138 /*
 139  * Restart requires that the secondary CPUs stop performing any activity
 140  * while the primary CPU resets the system. Systems with multiple CPUs must
 141  * provide a HW restart implementation, to ensure that all CPUs reset at once.
 142  * This is required so that any code running after reset on the primary CPU
 143  * doesn't have to co-ordinate with other CPUs to ensure they aren't still
 144  * executing pre-reset code, and using RAM that the primary CPU's code wishes
 145  * to use. Implementing such co-ordination would be essentially impossible.
 146  */
 147 void machine_restart(char *cmd)
 148 {
 149         /* Disable interrupts first */
 150         local_irq_disable();
 151         smp_send_stop();
 152
 153         /*
 154          * UpdateCapsule() depends on the system being reset via
 155          * ResetSystem().
 156          */
 157         if (efi_enabled(EFI_RUNTIME_SERVICES))
 158                 efi_reboot(reboot_mode, NULL);
 159
 160         /* Now call the architecture specific reboot code. */
 161         if (arm_pm_restart)
 162                 arm_pm_restart(reboot_mode, cmd);
 163         else
 164                 do_kernel_restart(cmd);
 165
 166         /*
 167          * Whoops - the architecture was unable to reboot.
 168          */
 169         printk("Reboot failed -- System halted\n");
 170         while (1);
 171 }
 172
 173 static void print_pstate(struct pt_regs *regs)
 174 {
 175         u64 pstate = regs->pstate;
 176
 177         if (compat_user_mode(regs)) {
 178                 printk("pstate: %08llx (%c%c%c%c %c %s %s %c%c%c)\n",
 179                         pstate,
 180                         pstate & COMPAT_PSR_N_BIT ? 'N' : 'n',
 181                         pstate & COMPAT_PSR_Z_BIT ? 'Z' : 'z',
 182                         pstate & COMPAT_PSR_C_BIT ? 'C' : 'c',
 183                         pstate & COMPAT_PSR_V_BIT ? 'V' : 'v',
 184                         pstate & COMPAT_PSR_Q_BIT ? 'Q' : 'q',
 185                         pstate & COMPAT_PSR_T_BIT ? "T32" : "A32",
 186                         pstate & COMPAT_PSR_E_BIT ? "BE" : "LE",
 187                         pstate & COMPAT_PSR_A_BIT ? 'A' : 'a',
 188                         pstate & COMPAT_PSR_I_BIT ? 'I' : 'i',
 189                         pstate & COMPAT_PSR_F_BIT ? 'F' : 'f');
 190         } else {
 191                 printk("pstate: %08llx (%c%c%c%c %c%c%c%c %cPAN %cUAO)\n",
 192                         pstate,
 193                         pstate & PSR_N_BIT ? 'N' : 'n',
 194                         pstate & PSR_Z_BIT ? 'Z' : 'z',
 195                         pstate & PSR_C_BIT ? 'C' : 'c',
 196                         pstate & PSR_V_BIT ? 'V' : 'v',
 197                         pstate & PSR_D_BIT ? 'D' : 'd',
 198                         pstate & PSR_A_BIT ? 'A' : 'a',
 199                         pstate & PSR_I_BIT ? 'I' : 'i',
 200                         pstate & PSR_F_BIT ? 'F' : 'f',
 201                         pstate & PSR_PAN_BIT ? '+' : '-',
 202                         pstate & PSR_UAO_BIT ? '+' : '-');
 203         }
 204 }
 205
 206 void __show_regs(struct pt_regs *regs)
 207 {
 208         int i, top_reg;
 209         u64 lr, sp;
 210
 211         if (compat_user_mode(regs)) {
 212                 lr = regs->compat_lr;
 213                 sp = regs->compat_sp;
 214                 top_reg = 12;
 215         } else {
 216                 lr = regs->regs[30];
 217                 sp = regs->sp;
 218                 top_reg = 29;
 219         }
 220
 221         show_regs_print_info(KERN_DEFAULT);
 222         print_pstate(regs);
 223         print_symbol("pc : %s\n", regs->pc);
 224         print_symbol("lr : %s\n", lr);
 225         printk("sp : %016llx\n", sp);
 226
 227         i = top_reg;
 228
 229         while (i >= 0) {
 230                 printk("x%-2d: %016llx ", i, regs->regs[i]);
 231                 i--;
 232
 233                 if (i % 2 == 0) {
 234                         pr_cont("x%-2d: %016llx ", i, regs->regs[i]);
 235                         i--;
 236                 }
 237
 238                 pr_cont("\n");
 239         }
 240 }
 241
 242 void show_regs(struct pt_regs * regs)
 243 {
 244         __show_regs(regs);
 245         dump_backtrace(regs, NULL);
 246 }
 247
 248 static void tls_thread_flush(void)
 249 {
 250         write_sysreg(0, tpidr_el0);
 251
 252         if (is_compat_task()) {
 253                 current->thread.tp_value = 0;
 254
 255                 /*
 256                  * We need to ensure ordering between the shadow state and the
 257                  * hardware state, so that we don't corrupt the hardware state
 258                  * with a stale shadow state during context switch.
 259                  */
 260                 barrier();
 261                 write_sysreg(0, tpidrro_el0);
 262         }
 263 }
 264
 265 void flush_thread(void)
 266 {
 267         fpsimd_flush_thread();
 268         tls_thread_flush();
 269         flush_ptrace_hw_breakpoint(current);
 270 }
 271
 272 void release_thread(struct task_struct *dead_task)
 273 {
 274 }
 275
 276 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
 277 {
 278         if (current->mm)
 279                 fpsimd_preserve_current_state();
 280         *dst = *src;
 281         return 0;
 282 }
 283
 284 asmlinkage void ret_from_fork(void) asm("ret_from_fork");
 285
 286 int copy_thread(unsigned long clone_flags, unsigned long stack_start,
 287                 unsigned long stk_sz, struct task_struct *p)
 288 {
 289         struct pt_regs *childregs = task_pt_regs(p);
 290
 291         memset(&p->thread.cpu_context, 0, sizeof(struct cpu_context));
 292
 293         if (likely(!(p->flags & PF_KTHREAD))) {
 294                 *childregs = *current_pt_regs();
 295                 childregs->regs[0] = 0;
 296
 297                 /*
 298                  * Read the current TLS pointer from tpidr_el0 as it may be
 299                  * out-of-sync with the saved value.
 300                  */
 301                 *task_user_tls(p) = read_sysreg(tpidr_el0);
 302
 303                 if (stack_start) {
 304                         if (is_compat_thread(task_thread_info(p)))
 305                                 childregs->compat_sp = stack_start;
 306                         else
 307                                 childregs->sp = stack_start;
 308                 }
 309
 310                 /*
 311                  * If a TLS pointer was passed to clone (4th argument), use it
 312                  * for the new thread.
 313                  */
 314                 if (clone_flags & CLONE_SETTLS)
 315                         p->thread.tp_value = childregs->regs[3];
 316         } else {
 317                 memset(childregs, 0, sizeof(struct pt_regs));
 318                 childregs->pstate = PSR_MODE_EL1h;
 319                 if (IS_ENABLED(CONFIG_ARM64_UAO) &&
 320                     cpus_have_const_cap(ARM64_HAS_UAO))
 321                         childregs->pstate |= PSR_UAO_BIT;
 322                 p->thread.cpu_context.x19 = stack_start;
 323                 p->thread.cpu_context.x20 = stk_sz;
 324         }
 325         p->thread.cpu_context.pc = (unsigned long)ret_from_fork;
 326         p->thread.cpu_context.sp = (unsigned long)childregs;
 327
 328         ptrace_hw_copy_thread(p);
 329
 330         return 0;
 331 }
 332
 333 void tls_preserve_current_state(void)
 334 {
 335         *task_user_tls(current) = read_sysreg(tpidr_el0);
 336 }
 337
 338 static void tls_thread_switch(struct task_struct *next)
 339 {
 340         unsigned long tpidr, tpidrro;
 341
 342         tls_preserve_current_state();
 343
 344         tpidr = *task_user_tls(next);
 345         tpidrro = is_compat_thread(task_thread_info(next)) ?
 346                   next->thread.tp_value : 0;
 347
 348         write_sysreg(tpidr, tpidr_el0);
 349         write_sysreg(tpidrro, tpidrro_el0);
 350 }
 351
 352 /* Restore the UAO state depending on next's addr_limit */
 353 void uao_thread_switch(struct task_struct *next)
 354 {
 355         if (IS_ENABLED(CONFIG_ARM64_UAO)) {
 356                 if (task_thread_info(next)->addr_limit == KERNEL_DS)
 357                         asm(ALTERNATIVE("nop", SET_PSTATE_UAO(1), ARM64_HAS_UAO));
 358                 else
 359                         asm(ALTERNATIVE("nop", SET_PSTATE_UAO(0), ARM64_HAS_UAO));
 360         }
 361 }
 362
 363 /*
 364  * We store our current task in sp_el0, which is clobbered by userspace. Keep a
 365  * shadow copy so that we can restore this upon entry from userspace.
 366  *
 367  * This is *only* for exception entry from EL0, and is not valid until we
 368  * __switch_to() a user task.
 369  */
 370 DEFINE_PER_CPU(struct task_struct *, __entry_task);
 371
 372 static void entry_task_switch(struct task_struct *next)
 373 {
 374         __this_cpu_write(__entry_task, next);
 375 }
 376
 377 /*
 378  * Thread switching.
 379  */
 380 __notrace_funcgraph struct task_struct *__switch_to(struct task_struct *prev,
 381                                 struct task_struct *next)
 382 {
 383         struct task_struct *last;
 384
 385         fpsimd_thread_switch(next);
 386         tls_thread_switch(next);
 387         hw_breakpoint_thread_switch(next);
 388         contextidr_thread_switch(next);
 389         entry_task_switch(next);
 390         uao_thread_switch(next);
 391
 392         /*
 393          * Complete any pending TLB or cache maintenance on this CPU in case
 394          * the thread migrates to a different CPU.
 395          * This full barrier is also required by the membarrier system
 396          * call.
 397          */
 398         dsb(ish);
 399
 400         /* the actual thread switch */
 401         last = cpu_switch_to(prev, next);
 402
 403         return last;
 404 }
 405
 406 unsigned long get_wchan(struct task_struct *p)
 407 {
 408         struct stackframe frame;
 409         unsigned long stack_page, ret = 0;
 410         int count = 0;
 411         if (!p || p == current || p->state == TASK_RUNNING)
 412                 return 0;
 413
 414         stack_page = (unsigned long)try_get_task_stack(p);
 415         if (!stack_page)
 416                 return 0;
 417
 418         frame.fp = thread_saved_fp(p);
 419         frame.pc = thread_saved_pc(p);
 420 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
 421         frame.graph = p->curr_ret_stack;
 422 #endif
 423         do {
 424                 if (unwind_frame(p, &frame))
 425                         goto out;
 426                 if (!in_sched_functions(frame.pc)) {
 427                         ret = frame.pc;
 428                         goto out;
 429                 }
 430         } while (count ++ < 16);
 431
 432 out:
 433         put_task_stack(p);
 434         return ret;
 435 }
 436
 437 unsigned long arch_align_stack(unsigned long sp)
 438 {
 439         if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
 440                 sp -= get_random_int() & ~PAGE_MASK;
 441         return sp & ~0xf;
 442 }
 443
 444 unsigned long arch_randomize_brk(struct mm_struct *mm)
 445 {
 446         if (is_compat_task())
 447                 return randomize_page(mm->brk, SZ_32M);
 448         else
 449                 return randomize_page(mm->brk, SZ_1G);
 450 }
 451
 452 /*
 453  * Called from setup_new_exec() after (COMPAT_)SET_PERSONALITY.
 454  */
 455 void arch_setup_new_exec(void)
 456 {
 457         current->mm->context.flags = is_compat_task() ? MMCF_AARCH32 : 0;
 458 }