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arm64: traps: Don't print stack or raw PC/LR values in backtraces
[thirdparty/kernel/stable.git] / arch / arm64 / kernel / traps.c
1 /*
2 * Based on arch/arm/kernel/traps.c
3 *
4 * Copyright (C) 1995-2009 Russell King
5 * Copyright (C) 2012 ARM Ltd.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20 #include <linux/bug.h>
21 #include <linux/signal.h>
22 #include <linux/personality.h>
23 #include <linux/kallsyms.h>
24 #include <linux/spinlock.h>
25 #include <linux/uaccess.h>
26 #include <linux/hardirq.h>
27 #include <linux/kdebug.h>
28 #include <linux/module.h>
29 #include <linux/kexec.h>
30 #include <linux/delay.h>
31 #include <linux/init.h>
32 #include <linux/sched/signal.h>
33 #include <linux/sched/debug.h>
34 #include <linux/sched/task_stack.h>
35 #include <linux/sizes.h>
36 #include <linux/syscalls.h>
37 #include <linux/mm_types.h>
38
39 #include <asm/atomic.h>
40 #include <asm/bug.h>
41 #include <asm/debug-monitors.h>
42 #include <asm/esr.h>
43 #include <asm/insn.h>
44 #include <asm/traps.h>
45 #include <asm/smp.h>
46 #include <asm/stack_pointer.h>
47 #include <asm/stacktrace.h>
48 #include <asm/exception.h>
49 #include <asm/system_misc.h>
50 #include <asm/sysreg.h>
51
52 static const char *handler[]= {
53 "Synchronous Abort",
54 "IRQ",
55 "FIQ",
56 "Error"
57 };
58
59 int show_unhandled_signals = 1;
60
61 static void dump_backtrace_entry(unsigned long where)
62 {
63 printk(" %pS\n", (void *)where);
64 }
65
66 static void __dump_instr(const char *lvl, struct pt_regs *regs)
67 {
68 unsigned long addr = instruction_pointer(regs);
69 char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str;
70 int i;
71
72 for (i = -4; i < 1; i++) {
73 unsigned int val, bad;
74
75 bad = __get_user(val, &((u32 *)addr)[i]);
76
77 if (!bad)
78 p += sprintf(p, i == 0 ? "(%08x) " : "%08x ", val);
79 else {
80 p += sprintf(p, "bad PC value");
81 break;
82 }
83 }
84 printk("%sCode: %s\n", lvl, str);
85 }
86
87 static void dump_instr(const char *lvl, struct pt_regs *regs)
88 {
89 if (!user_mode(regs)) {
90 mm_segment_t fs = get_fs();
91 set_fs(KERNEL_DS);
92 __dump_instr(lvl, regs);
93 set_fs(fs);
94 } else {
95 __dump_instr(lvl, regs);
96 }
97 }
98
99 void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk)
100 {
101 struct stackframe frame;
102 int skip;
103
104 pr_debug("%s(regs = %p tsk = %p)\n", __func__, regs, tsk);
105
106 if (!tsk)
107 tsk = current;
108
109 if (!try_get_task_stack(tsk))
110 return;
111
112 if (tsk == current) {
113 frame.fp = (unsigned long)__builtin_frame_address(0);
114 frame.pc = (unsigned long)dump_backtrace;
115 } else {
116 /*
117 * task blocked in __switch_to
118 */
119 frame.fp = thread_saved_fp(tsk);
120 frame.pc = thread_saved_pc(tsk);
121 }
122 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
123 frame.graph = tsk->curr_ret_stack;
124 #endif
125
126 skip = !!regs;
127 printk("Call trace:\n");
128 do {
129 /* skip until specified stack frame */
130 if (!skip) {
131 dump_backtrace_entry(frame.pc);
132 } else if (frame.fp == regs->regs[29]) {
133 skip = 0;
134 /*
135 * Mostly, this is the case where this function is
136 * called in panic/abort. As exception handler's
137 * stack frame does not contain the corresponding pc
138 * at which an exception has taken place, use regs->pc
139 * instead.
140 */
141 dump_backtrace_entry(regs->pc);
142 }
143 } while (!unwind_frame(tsk, &frame));
144
145 put_task_stack(tsk);
146 }
147
148 void show_stack(struct task_struct *tsk, unsigned long *sp)
149 {
150 dump_backtrace(NULL, tsk);
151 barrier();
152 }
153
154 #ifdef CONFIG_PREEMPT
155 #define S_PREEMPT " PREEMPT"
156 #else
157 #define S_PREEMPT ""
158 #endif
159 #define S_SMP " SMP"
160
161 static int __die(const char *str, int err, struct pt_regs *regs)
162 {
163 struct task_struct *tsk = current;
164 static int die_counter;
165 int ret;
166
167 pr_emerg("Internal error: %s: %x [#%d]" S_PREEMPT S_SMP "\n",
168 str, err, ++die_counter);
169
170 /* trap and error numbers are mostly meaningless on ARM */
171 ret = notify_die(DIE_OOPS, str, regs, err, 0, SIGSEGV);
172 if (ret == NOTIFY_STOP)
173 return ret;
174
175 print_modules();
176 __show_regs(regs);
177 pr_emerg("Process %.*s (pid: %d, stack limit = 0x%p)\n",
178 TASK_COMM_LEN, tsk->comm, task_pid_nr(tsk),
179 end_of_stack(tsk));
180
181 if (!user_mode(regs)) {
182 dump_backtrace(regs, tsk);
183 dump_instr(KERN_EMERG, regs);
184 }
185
186 return ret;
187 }
188
189 static DEFINE_RAW_SPINLOCK(die_lock);
190
191 /*
192 * This function is protected against re-entrancy.
193 */
194 void die(const char *str, struct pt_regs *regs, int err)
195 {
196 int ret;
197 unsigned long flags;
198
199 raw_spin_lock_irqsave(&die_lock, flags);
200
201 oops_enter();
202
203 console_verbose();
204 bust_spinlocks(1);
205 ret = __die(str, err, regs);
206
207 if (regs && kexec_should_crash(current))
208 crash_kexec(regs);
209
210 bust_spinlocks(0);
211 add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
212 oops_exit();
213
214 if (in_interrupt())
215 panic("Fatal exception in interrupt");
216 if (panic_on_oops)
217 panic("Fatal exception");
218
219 raw_spin_unlock_irqrestore(&die_lock, flags);
220
221 if (ret != NOTIFY_STOP)
222 do_exit(SIGSEGV);
223 }
224
225 void arm64_notify_die(const char *str, struct pt_regs *regs,
226 struct siginfo *info, int err)
227 {
228 if (user_mode(regs)) {
229 current->thread.fault_address = 0;
230 current->thread.fault_code = err;
231 force_sig_info(info->si_signo, info, current);
232 } else {
233 die(str, regs, err);
234 }
235 }
236
237 void arm64_skip_faulting_instruction(struct pt_regs *regs, unsigned long size)
238 {
239 regs->pc += size;
240
241 /*
242 * If we were single stepping, we want to get the step exception after
243 * we return from the trap.
244 */
245 user_fastforward_single_step(current);
246 }
247
248 static LIST_HEAD(undef_hook);
249 static DEFINE_RAW_SPINLOCK(undef_lock);
250
251 void register_undef_hook(struct undef_hook *hook)
252 {
253 unsigned long flags;
254
255 raw_spin_lock_irqsave(&undef_lock, flags);
256 list_add(&hook->node, &undef_hook);
257 raw_spin_unlock_irqrestore(&undef_lock, flags);
258 }
259
260 void unregister_undef_hook(struct undef_hook *hook)
261 {
262 unsigned long flags;
263
264 raw_spin_lock_irqsave(&undef_lock, flags);
265 list_del(&hook->node);
266 raw_spin_unlock_irqrestore(&undef_lock, flags);
267 }
268
269 static int call_undef_hook(struct pt_regs *regs)
270 {
271 struct undef_hook *hook;
272 unsigned long flags;
273 u32 instr;
274 int (*fn)(struct pt_regs *regs, u32 instr) = NULL;
275 void __user *pc = (void __user *)instruction_pointer(regs);
276
277 if (!user_mode(regs))
278 return 1;
279
280 if (compat_thumb_mode(regs)) {
281 /* 16-bit Thumb instruction */
282 __le16 instr_le;
283 if (get_user(instr_le, (__le16 __user *)pc))
284 goto exit;
285 instr = le16_to_cpu(instr_le);
286 if (aarch32_insn_is_wide(instr)) {
287 u32 instr2;
288
289 if (get_user(instr_le, (__le16 __user *)(pc + 2)))
290 goto exit;
291 instr2 = le16_to_cpu(instr_le);
292 instr = (instr << 16) | instr2;
293 }
294 } else {
295 /* 32-bit ARM instruction */
296 __le32 instr_le;
297 if (get_user(instr_le, (__le32 __user *)pc))
298 goto exit;
299 instr = le32_to_cpu(instr_le);
300 }
301
302 raw_spin_lock_irqsave(&undef_lock, flags);
303 list_for_each_entry(hook, &undef_hook, node)
304 if ((instr & hook->instr_mask) == hook->instr_val &&
305 (regs->pstate & hook->pstate_mask) == hook->pstate_val)
306 fn = hook->fn;
307
308 raw_spin_unlock_irqrestore(&undef_lock, flags);
309 exit:
310 return fn ? fn(regs, instr) : 1;
311 }
312
313 static void force_signal_inject(int signal, int code, struct pt_regs *regs,
314 unsigned long address)
315 {
316 siginfo_t info;
317 void __user *pc = (void __user *)instruction_pointer(regs);
318 const char *desc;
319
320 switch (signal) {
321 case SIGILL:
322 desc = "undefined instruction";
323 break;
324 case SIGSEGV:
325 desc = "illegal memory access";
326 break;
327 default:
328 desc = "bad mode";
329 break;
330 }
331
332 if (unhandled_signal(current, signal) &&
333 show_unhandled_signals_ratelimited()) {
334 pr_info("%s[%d]: %s: pc=%p\n",
335 current->comm, task_pid_nr(current), desc, pc);
336 dump_instr(KERN_INFO, regs);
337 }
338
339 info.si_signo = signal;
340 info.si_errno = 0;
341 info.si_code = code;
342 info.si_addr = pc;
343
344 arm64_notify_die(desc, regs, &info, 0);
345 }
346
347 /*
348 * Set up process info to signal segmentation fault - called on access error.
349 */
350 void arm64_notify_segfault(struct pt_regs *regs, unsigned long addr)
351 {
352 int code;
353
354 down_read(&current->mm->mmap_sem);
355 if (find_vma(current->mm, addr) == NULL)
356 code = SEGV_MAPERR;
357 else
358 code = SEGV_ACCERR;
359 up_read(&current->mm->mmap_sem);
360
361 force_signal_inject(SIGSEGV, code, regs, addr);
362 }
363
364 asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
365 {
366 /* check for AArch32 breakpoint instructions */
367 if (!aarch32_break_handler(regs))
368 return;
369
370 if (call_undef_hook(regs) == 0)
371 return;
372
373 force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0);
374 }
375
376 int cpu_enable_cache_maint_trap(void *__unused)
377 {
378 config_sctlr_el1(SCTLR_EL1_UCI, 0);
379 return 0;
380 }
381
382 #define __user_cache_maint(insn, address, res) \
383 if (address >= user_addr_max()) { \
384 res = -EFAULT; \
385 } else { \
386 uaccess_ttbr0_enable(); \
387 asm volatile ( \
388 "1: " insn ", %1\n" \
389 " mov %w0, #0\n" \
390 "2:\n" \
391 " .pushsection .fixup,\"ax\"\n" \
392 " .align 2\n" \
393 "3: mov %w0, %w2\n" \
394 " b 2b\n" \
395 " .popsection\n" \
396 _ASM_EXTABLE(1b, 3b) \
397 : "=r" (res) \
398 : "r" (address), "i" (-EFAULT)); \
399 uaccess_ttbr0_disable(); \
400 }
401
402 static void user_cache_maint_handler(unsigned int esr, struct pt_regs *regs)
403 {
404 unsigned long address;
405 int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
406 int crm = (esr & ESR_ELx_SYS64_ISS_CRM_MASK) >> ESR_ELx_SYS64_ISS_CRM_SHIFT;
407 int ret = 0;
408
409 address = untagged_addr(pt_regs_read_reg(regs, rt));
410
411 switch (crm) {
412 case ESR_ELx_SYS64_ISS_CRM_DC_CVAU: /* DC CVAU, gets promoted */
413 __user_cache_maint("dc civac", address, ret);
414 break;
415 case ESR_ELx_SYS64_ISS_CRM_DC_CVAC: /* DC CVAC, gets promoted */
416 __user_cache_maint("dc civac", address, ret);
417 break;
418 case ESR_ELx_SYS64_ISS_CRM_DC_CVAP: /* DC CVAP */
419 __user_cache_maint("sys 3, c7, c12, 1", address, ret);
420 break;
421 case ESR_ELx_SYS64_ISS_CRM_DC_CIVAC: /* DC CIVAC */
422 __user_cache_maint("dc civac", address, ret);
423 break;
424 case ESR_ELx_SYS64_ISS_CRM_IC_IVAU: /* IC IVAU */
425 __user_cache_maint("ic ivau", address, ret);
426 break;
427 default:
428 force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0);
429 return;
430 }
431
432 if (ret)
433 arm64_notify_segfault(regs, address);
434 else
435 arm64_skip_faulting_instruction(regs, AARCH64_INSN_SIZE);
436 }
437
438 static void ctr_read_handler(unsigned int esr, struct pt_regs *regs)
439 {
440 int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
441 unsigned long val = arm64_ftr_reg_user_value(&arm64_ftr_reg_ctrel0);
442
443 pt_regs_write_reg(regs, rt, val);
444
445 arm64_skip_faulting_instruction(regs, AARCH64_INSN_SIZE);
446 }
447
448 static void cntvct_read_handler(unsigned int esr, struct pt_regs *regs)
449 {
450 int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
451
452 pt_regs_write_reg(regs, rt, arch_counter_get_cntvct());
453 arm64_skip_faulting_instruction(regs, AARCH64_INSN_SIZE);
454 }
455
456 static void cntfrq_read_handler(unsigned int esr, struct pt_regs *regs)
457 {
458 int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
459
460 pt_regs_write_reg(regs, rt, arch_timer_get_rate());
461 arm64_skip_faulting_instruction(regs, AARCH64_INSN_SIZE);
462 }
463
464 struct sys64_hook {
465 unsigned int esr_mask;
466 unsigned int esr_val;
467 void (*handler)(unsigned int esr, struct pt_regs *regs);
468 };
469
470 static struct sys64_hook sys64_hooks[] = {
471 {
472 .esr_mask = ESR_ELx_SYS64_ISS_EL0_CACHE_OP_MASK,
473 .esr_val = ESR_ELx_SYS64_ISS_EL0_CACHE_OP_VAL,
474 .handler = user_cache_maint_handler,
475 },
476 {
477 /* Trap read access to CTR_EL0 */
478 .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
479 .esr_val = ESR_ELx_SYS64_ISS_SYS_CTR_READ,
480 .handler = ctr_read_handler,
481 },
482 {
483 /* Trap read access to CNTVCT_EL0 */
484 .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
485 .esr_val = ESR_ELx_SYS64_ISS_SYS_CNTVCT,
486 .handler = cntvct_read_handler,
487 },
488 {
489 /* Trap read access to CNTFRQ_EL0 */
490 .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
491 .esr_val = ESR_ELx_SYS64_ISS_SYS_CNTFRQ,
492 .handler = cntfrq_read_handler,
493 },
494 {},
495 };
496
497 asmlinkage void __exception do_sysinstr(unsigned int esr, struct pt_regs *regs)
498 {
499 struct sys64_hook *hook;
500
501 for (hook = sys64_hooks; hook->handler; hook++)
502 if ((hook->esr_mask & esr) == hook->esr_val) {
503 hook->handler(esr, regs);
504 return;
505 }
506
507 /*
508 * New SYS instructions may previously have been undefined at EL0. Fall
509 * back to our usual undefined instruction handler so that we handle
510 * these consistently.
511 */
512 do_undefinstr(regs);
513 }
514
515 long compat_arm_syscall(struct pt_regs *regs);
516
517 asmlinkage long do_ni_syscall(struct pt_regs *regs)
518 {
519 #ifdef CONFIG_COMPAT
520 long ret;
521 if (is_compat_task()) {
522 ret = compat_arm_syscall(regs);
523 if (ret != -ENOSYS)
524 return ret;
525 }
526 #endif
527
528 if (show_unhandled_signals_ratelimited()) {
529 pr_info("%s[%d]: syscall %d\n", current->comm,
530 task_pid_nr(current), regs->syscallno);
531 dump_instr("", regs);
532 if (user_mode(regs))
533 __show_regs(regs);
534 }
535
536 return sys_ni_syscall();
537 }
538
539 static const char *esr_class_str[] = {
540 [0 ... ESR_ELx_EC_MAX] = "UNRECOGNIZED EC",
541 [ESR_ELx_EC_UNKNOWN] = "Unknown/Uncategorized",
542 [ESR_ELx_EC_WFx] = "WFI/WFE",
543 [ESR_ELx_EC_CP15_32] = "CP15 MCR/MRC",
544 [ESR_ELx_EC_CP15_64] = "CP15 MCRR/MRRC",
545 [ESR_ELx_EC_CP14_MR] = "CP14 MCR/MRC",
546 [ESR_ELx_EC_CP14_LS] = "CP14 LDC/STC",
547 [ESR_ELx_EC_FP_ASIMD] = "ASIMD",
548 [ESR_ELx_EC_CP10_ID] = "CP10 MRC/VMRS",
549 [ESR_ELx_EC_CP14_64] = "CP14 MCRR/MRRC",
550 [ESR_ELx_EC_ILL] = "PSTATE.IL",
551 [ESR_ELx_EC_SVC32] = "SVC (AArch32)",
552 [ESR_ELx_EC_HVC32] = "HVC (AArch32)",
553 [ESR_ELx_EC_SMC32] = "SMC (AArch32)",
554 [ESR_ELx_EC_SVC64] = "SVC (AArch64)",
555 [ESR_ELx_EC_HVC64] = "HVC (AArch64)",
556 [ESR_ELx_EC_SMC64] = "SMC (AArch64)",
557 [ESR_ELx_EC_SYS64] = "MSR/MRS (AArch64)",
558 [ESR_ELx_EC_IMP_DEF] = "EL3 IMP DEF",
559 [ESR_ELx_EC_IABT_LOW] = "IABT (lower EL)",
560 [ESR_ELx_EC_IABT_CUR] = "IABT (current EL)",
561 [ESR_ELx_EC_PC_ALIGN] = "PC Alignment",
562 [ESR_ELx_EC_DABT_LOW] = "DABT (lower EL)",
563 [ESR_ELx_EC_DABT_CUR] = "DABT (current EL)",
564 [ESR_ELx_EC_SP_ALIGN] = "SP Alignment",
565 [ESR_ELx_EC_FP_EXC32] = "FP (AArch32)",
566 [ESR_ELx_EC_FP_EXC64] = "FP (AArch64)",
567 [ESR_ELx_EC_SERROR] = "SError",
568 [ESR_ELx_EC_BREAKPT_LOW] = "Breakpoint (lower EL)",
569 [ESR_ELx_EC_BREAKPT_CUR] = "Breakpoint (current EL)",
570 [ESR_ELx_EC_SOFTSTP_LOW] = "Software Step (lower EL)",
571 [ESR_ELx_EC_SOFTSTP_CUR] = "Software Step (current EL)",
572 [ESR_ELx_EC_WATCHPT_LOW] = "Watchpoint (lower EL)",
573 [ESR_ELx_EC_WATCHPT_CUR] = "Watchpoint (current EL)",
574 [ESR_ELx_EC_BKPT32] = "BKPT (AArch32)",
575 [ESR_ELx_EC_VECTOR32] = "Vector catch (AArch32)",
576 [ESR_ELx_EC_BRK64] = "BRK (AArch64)",
577 };
578
579 const char *esr_get_class_string(u32 esr)
580 {
581 return esr_class_str[ESR_ELx_EC(esr)];
582 }
583
584 /*
585 * bad_mode handles the impossible case in the exception vector. This is always
586 * fatal.
587 */
588 asmlinkage void bad_mode(struct pt_regs *regs, int reason, unsigned int esr)
589 {
590 console_verbose();
591
592 pr_crit("Bad mode in %s handler detected on CPU%d, code 0x%08x -- %s\n",
593 handler[reason], smp_processor_id(), esr,
594 esr_get_class_string(esr));
595
596 die("Oops - bad mode", regs, 0);
597 local_irq_disable();
598 panic("bad mode");
599 }
600
601 /*
602 * bad_el0_sync handles unexpected, but potentially recoverable synchronous
603 * exceptions taken from EL0. Unlike bad_mode, this returns.
604 */
605 asmlinkage void bad_el0_sync(struct pt_regs *regs, int reason, unsigned int esr)
606 {
607 siginfo_t info;
608 void __user *pc = (void __user *)instruction_pointer(regs);
609 console_verbose();
610
611 pr_crit("Bad EL0 synchronous exception detected on CPU%d, code 0x%08x -- %s\n",
612 smp_processor_id(), esr, esr_get_class_string(esr));
613 __show_regs(regs);
614
615 info.si_signo = SIGILL;
616 info.si_errno = 0;
617 info.si_code = ILL_ILLOPC;
618 info.si_addr = pc;
619
620 current->thread.fault_address = 0;
621 current->thread.fault_code = 0;
622
623 force_sig_info(info.si_signo, &info, current);
624 }
625
626 #ifdef CONFIG_VMAP_STACK
627
628 DEFINE_PER_CPU(unsigned long [OVERFLOW_STACK_SIZE/sizeof(long)], overflow_stack)
629 __aligned(16);
630
631 asmlinkage void handle_bad_stack(struct pt_regs *regs)
632 {
633 unsigned long tsk_stk = (unsigned long)current->stack;
634 unsigned long irq_stk = (unsigned long)this_cpu_read(irq_stack_ptr);
635 unsigned long ovf_stk = (unsigned long)this_cpu_ptr(overflow_stack);
636 unsigned int esr = read_sysreg(esr_el1);
637 unsigned long far = read_sysreg(far_el1);
638
639 console_verbose();
640 pr_emerg("Insufficient stack space to handle exception!");
641
642 pr_emerg("ESR: 0x%08x -- %s\n", esr, esr_get_class_string(esr));
643 pr_emerg("FAR: 0x%016lx\n", far);
644
645 pr_emerg("Task stack: [0x%016lx..0x%016lx]\n",
646 tsk_stk, tsk_stk + THREAD_SIZE);
647 pr_emerg("IRQ stack: [0x%016lx..0x%016lx]\n",
648 irq_stk, irq_stk + THREAD_SIZE);
649 pr_emerg("Overflow stack: [0x%016lx..0x%016lx]\n",
650 ovf_stk, ovf_stk + OVERFLOW_STACK_SIZE);
651
652 __show_regs(regs);
653
654 /*
655 * We use nmi_panic to limit the potential for recusive overflows, and
656 * to get a better stack trace.
657 */
658 nmi_panic(NULL, "kernel stack overflow");
659 cpu_park_loop();
660 }
661 #endif
662
663 void __pte_error(const char *file, int line, unsigned long val)
664 {
665 pr_err("%s:%d: bad pte %016lx.\n", file, line, val);
666 }
667
668 void __pmd_error(const char *file, int line, unsigned long val)
669 {
670 pr_err("%s:%d: bad pmd %016lx.\n", file, line, val);
671 }
672
673 void __pud_error(const char *file, int line, unsigned long val)
674 {
675 pr_err("%s:%d: bad pud %016lx.\n", file, line, val);
676 }
677
678 void __pgd_error(const char *file, int line, unsigned long val)
679 {
680 pr_err("%s:%d: bad pgd %016lx.\n", file, line, val);
681 }
682
683 /* GENERIC_BUG traps */
684
685 int is_valid_bugaddr(unsigned long addr)
686 {
687 /*
688 * bug_handler() only called for BRK #BUG_BRK_IMM.
689 * So the answer is trivial -- any spurious instances with no
690 * bug table entry will be rejected by report_bug() and passed
691 * back to the debug-monitors code and handled as a fatal
692 * unexpected debug exception.
693 */
694 return 1;
695 }
696
697 static int bug_handler(struct pt_regs *regs, unsigned int esr)
698 {
699 if (user_mode(regs))
700 return DBG_HOOK_ERROR;
701
702 switch (report_bug(regs->pc, regs)) {
703 case BUG_TRAP_TYPE_BUG:
704 die("Oops - BUG", regs, 0);
705 break;
706
707 case BUG_TRAP_TYPE_WARN:
708 break;
709
710 default:
711 /* unknown/unrecognised bug trap type */
712 return DBG_HOOK_ERROR;
713 }
714
715 /* If thread survives, skip over the BUG instruction and continue: */
716 arm64_skip_faulting_instruction(regs, AARCH64_INSN_SIZE);
717 return DBG_HOOK_HANDLED;
718 }
719
720 static struct break_hook bug_break_hook = {
721 .esr_val = 0xf2000000 | BUG_BRK_IMM,
722 .esr_mask = 0xffffffff,
723 .fn = bug_handler,
724 };
725
726 /*
727 * Initial handler for AArch64 BRK exceptions
728 * This handler only used until debug_traps_init().
729 */
730 int __init early_brk64(unsigned long addr, unsigned int esr,
731 struct pt_regs *regs)
732 {
733 return bug_handler(regs, esr) != DBG_HOOK_HANDLED;
734 }
735
736 /* This registration must happen early, before debug_traps_init(). */
737 void __init trap_init(void)
738 {
739 register_break_hook(&bug_break_hook);
740 }
Mirror https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git