arch/cris/include/arch-v32/arch/hwregs/strcop_defs.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef __strcop_defs_h
   3 #define __strcop_defs_h
   4
   5 /*
   6  * This file is autogenerated from
   7  *   file:           ../../inst/strcop/rtl/strcop_regs.r
   8  *     id:           strcop_regs.r,v 1.5 2003/10/15 12:09:45 kriskn Exp
   9  *     last modfied: Mon Apr 11 16:09:38 2005
  10  *
  11  *   by /n/asic/design/tools/rdesc/src/rdes2c --outfile strcop_defs.h ../../inst/strcop/rtl/strcop_regs.r
  12  *      id: $Id: strcop_defs.h,v 1.7 2005/04/24 18:30:58 starvik Exp $
  13  * Any changes here will be lost.
  14  *
  15  * -*- buffer-read-only: t -*-
  16  */
  17 /* Main access macros */
  18 #ifndef REG_RD
  19 #define REG_RD( scope, inst, reg ) \
  20   REG_READ( reg_##scope##_##reg, \
  21             (inst) + REG_RD_ADDR_##scope##_##reg )
  22 #endif
  23
  24 #ifndef REG_WR
  25 #define REG_WR( scope, inst, reg, val ) \
  26   REG_WRITE( reg_##scope##_##reg, \
  27              (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
  28 #endif
  29
  30 #ifndef REG_RD_VECT
  31 #define REG_RD_VECT( scope, inst, reg, index ) \
  32   REG_READ( reg_##scope##_##reg, \
  33             (inst) + REG_RD_ADDR_##scope##_##reg + \
  34             (index) * STRIDE_##scope##_##reg )
  35 #endif
  36
  37 #ifndef REG_WR_VECT
  38 #define REG_WR_VECT( scope, inst, reg, index, val ) \
  39   REG_WRITE( reg_##scope##_##reg, \
  40              (inst) + REG_WR_ADDR_##scope##_##reg + \
  41              (index) * STRIDE_##scope##_##reg, (val) )
  42 #endif
  43
  44 #ifndef REG_RD_INT
  45 #define REG_RD_INT( scope, inst, reg ) \
  46   REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
  47 #endif
  48
  49 #ifndef REG_WR_INT
  50 #define REG_WR_INT( scope, inst, reg, val ) \
  51   REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
  52 #endif
  53
  54 #ifndef REG_RD_INT_VECT
  55 #define REG_RD_INT_VECT( scope, inst, reg, index ) \
  56   REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
  57             (index) * STRIDE_##scope##_##reg )
  58 #endif
  59
  60 #ifndef REG_WR_INT_VECT
  61 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
  62   REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
  63              (index) * STRIDE_##scope##_##reg, (val) )
  64 #endif
  65
  66 #ifndef REG_TYPE_CONV
  67 #define REG_TYPE_CONV( type, orgtype, val ) \
  68   ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
  69 #endif
  70
  71 #ifndef reg_page_size
  72 #define reg_page_size 8192
  73 #endif
  74
  75 #ifndef REG_ADDR
  76 #define REG_ADDR( scope, inst, reg ) \
  77   ( (inst) + REG_RD_ADDR_##scope##_##reg )
  78 #endif
  79
  80 #ifndef REG_ADDR_VECT
  81 #define REG_ADDR_VECT( scope, inst, reg, index ) \
  82   ( (inst) + REG_RD_ADDR_##scope##_##reg + \
  83     (index) * STRIDE_##scope##_##reg )
  84 #endif
  85
  86 /* C-code for register scope strcop */
  87
  88 /* Register rw_cfg, scope strcop, type rw */
  89 typedef struct {
  90   unsigned int td3         : 1;
  91   unsigned int td2         : 1;
  92   unsigned int td1         : 1;
  93   unsigned int ipend       : 1;
  94   unsigned int ignore_sync : 1;
  95   unsigned int en          : 1;
  96   unsigned int dummy1      : 26;
  97 } reg_strcop_rw_cfg;
  98 #define REG_RD_ADDR_strcop_rw_cfg 0
  99 #define REG_WR_ADDR_strcop_rw_cfg 0
 100
 101
 102 /* Constants */
 103 enum {
 104   regk_strcop_big                          = 0x00000001,
 105   regk_strcop_d                            = 0x00000001,
 106   regk_strcop_e                            = 0x00000000,
 107   regk_strcop_little                       = 0x00000000,
 108   regk_strcop_rw_cfg_default               = 0x00000002
 109 };
 110 #endif /* __strcop_defs_h */