arch/cris/include/arch-v32/mach-fs/mach/hwregs/bif_slave_defs.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef __bif_slave_defs_h
   3 #define __bif_slave_defs_h
   4
   5 /*
   6  * This file is autogenerated from
   7  *   file:           ../../inst/bif/rtl/bif_slave_regs.r
   8  *     id:           bif_slave_regs.r,v 1.5 2005/02/04 13:55:28 perz Exp
   9  *     last modfied: Mon Apr 11 16:06:34 2005
  10  *
  11  *   by /n/asic/design/tools/rdesc/src/rdes2c --outfile bif_slave_defs.h ../../inst/bif/rtl/bif_slave_regs.r
  12  *      id: $Id: bif_slave_defs.h,v 1.1 2007/02/13 11:55:30 starvik Exp $
  13  * Any changes here will be lost.
  14  *
  15  * -*- buffer-read-only: t -*-
  16  */
  17 /* Main access macros */
  18 #ifndef REG_RD
  19 #define REG_RD( scope, inst, reg ) \
  20   REG_READ( reg_##scope##_##reg, \
  21             (inst) + REG_RD_ADDR_##scope##_##reg )
  22 #endif
  23
  24 #ifndef REG_WR
  25 #define REG_WR( scope, inst, reg, val ) \
  26   REG_WRITE( reg_##scope##_##reg, \
  27              (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
  28 #endif
  29
  30 #ifndef REG_RD_VECT
  31 #define REG_RD_VECT( scope, inst, reg, index ) \
  32   REG_READ( reg_##scope##_##reg, \
  33             (inst) + REG_RD_ADDR_##scope##_##reg + \
  34             (index) * STRIDE_##scope##_##reg )
  35 #endif
  36
  37 #ifndef REG_WR_VECT
  38 #define REG_WR_VECT( scope, inst, reg, index, val ) \
  39   REG_WRITE( reg_##scope##_##reg, \
  40              (inst) + REG_WR_ADDR_##scope##_##reg + \
  41              (index) * STRIDE_##scope##_##reg, (val) )
  42 #endif
  43
  44 #ifndef REG_RD_INT
  45 #define REG_RD_INT( scope, inst, reg ) \
  46   REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
  47 #endif
  48
  49 #ifndef REG_WR_INT
  50 #define REG_WR_INT( scope, inst, reg, val ) \
  51   REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
  52 #endif
  53
  54 #ifndef REG_RD_INT_VECT
  55 #define REG_RD_INT_VECT( scope, inst, reg, index ) \
  56   REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
  57             (index) * STRIDE_##scope##_##reg )
  58 #endif
  59
  60 #ifndef REG_WR_INT_VECT
  61 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
  62   REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
  63              (index) * STRIDE_##scope##_##reg, (val) )
  64 #endif
  65
  66 #ifndef REG_TYPE_CONV
  67 #define REG_TYPE_CONV( type, orgtype, val ) \
  68   ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
  69 #endif
  70
  71 #ifndef reg_page_size
  72 #define reg_page_size 8192
  73 #endif
  74
  75 #ifndef REG_ADDR
  76 #define REG_ADDR( scope, inst, reg ) \
  77   ( (inst) + REG_RD_ADDR_##scope##_##reg )
  78 #endif
  79
  80 #ifndef REG_ADDR_VECT
  81 #define REG_ADDR_VECT( scope, inst, reg, index ) \
  82   ( (inst) + REG_RD_ADDR_##scope##_##reg + \
  83     (index) * STRIDE_##scope##_##reg )
  84 #endif
  85
  86 /* C-code for register scope bif_slave */
  87
  88 /* Register rw_slave_cfg, scope bif_slave, type rw */
  89 typedef struct {
  90   unsigned int slave_id     : 3;
  91   unsigned int use_slave_id : 1;
  92   unsigned int boot_rdy     : 1;
  93   unsigned int loopback     : 1;
  94   unsigned int dis          : 1;
  95   unsigned int dummy1       : 25;
  96 } reg_bif_slave_rw_slave_cfg;
  97 #define REG_RD_ADDR_bif_slave_rw_slave_cfg 0
  98 #define REG_WR_ADDR_bif_slave_rw_slave_cfg 0
  99
 100 /* Register r_slave_mode, scope bif_slave, type r */
 101 typedef struct {
 102   unsigned int ch0_mode : 1;
 103   unsigned int ch1_mode : 1;
 104   unsigned int ch2_mode : 1;
 105   unsigned int ch3_mode : 1;
 106   unsigned int dummy1   : 28;
 107 } reg_bif_slave_r_slave_mode;
 108 #define REG_RD_ADDR_bif_slave_r_slave_mode 4
 109
 110 /* Register rw_ch0_cfg, scope bif_slave, type rw */
 111 typedef struct {
 112   unsigned int rd_hold     : 2;
 113   unsigned int access_mode : 1;
 114   unsigned int access_ctrl : 1;
 115   unsigned int data_cs     : 2;
 116   unsigned int dummy1      : 26;
 117 } reg_bif_slave_rw_ch0_cfg;
 118 #define REG_RD_ADDR_bif_slave_rw_ch0_cfg 16
 119 #define REG_WR_ADDR_bif_slave_rw_ch0_cfg 16
 120
 121 /* Register rw_ch1_cfg, scope bif_slave, type rw */
 122 typedef struct {
 123   unsigned int rd_hold     : 2;
 124   unsigned int access_mode : 1;
 125   unsigned int access_ctrl : 1;
 126   unsigned int data_cs     : 2;
 127   unsigned int dummy1      : 26;
 128 } reg_bif_slave_rw_ch1_cfg;
 129 #define REG_RD_ADDR_bif_slave_rw_ch1_cfg 20
 130 #define REG_WR_ADDR_bif_slave_rw_ch1_cfg 20
 131
 132 /* Register rw_ch2_cfg, scope bif_slave, type rw */
 133 typedef struct {
 134   unsigned int rd_hold     : 2;
 135   unsigned int access_mode : 1;
 136   unsigned int access_ctrl : 1;
 137   unsigned int data_cs     : 2;
 138   unsigned int dummy1      : 26;
 139 } reg_bif_slave_rw_ch2_cfg;
 140 #define REG_RD_ADDR_bif_slave_rw_ch2_cfg 24
 141 #define REG_WR_ADDR_bif_slave_rw_ch2_cfg 24
 142
 143 /* Register rw_ch3_cfg, scope bif_slave, type rw */
 144 typedef struct {
 145   unsigned int rd_hold     : 2;
 146   unsigned int access_mode : 1;
 147   unsigned int access_ctrl : 1;
 148   unsigned int data_cs     : 2;
 149   unsigned int dummy1      : 26;
 150 } reg_bif_slave_rw_ch3_cfg;
 151 #define REG_RD_ADDR_bif_slave_rw_ch3_cfg 28
 152 #define REG_WR_ADDR_bif_slave_rw_ch3_cfg 28
 153
 154 /* Register rw_arb_cfg, scope bif_slave, type rw */
 155 typedef struct {
 156   unsigned int brin_mode   : 1;
 157   unsigned int brout_mode  : 3;
 158   unsigned int bg_mode     : 3;
 159   unsigned int release     : 2;
 160   unsigned int acquire     : 1;
 161   unsigned int settle_time : 2;
 162   unsigned int dram_ctrl   : 1;
 163   unsigned int dummy1      : 19;
 164 } reg_bif_slave_rw_arb_cfg;
 165 #define REG_RD_ADDR_bif_slave_rw_arb_cfg 32
 166 #define REG_WR_ADDR_bif_slave_rw_arb_cfg 32
 167
 168 /* Register r_arb_stat, scope bif_slave, type r */
 169 typedef struct {
 170   unsigned int init_mode : 1;
 171   unsigned int mode      : 1;
 172   unsigned int brin      : 1;
 173   unsigned int brout     : 1;
 174   unsigned int bg        : 1;
 175   unsigned int dummy1    : 27;
 176 } reg_bif_slave_r_arb_stat;
 177 #define REG_RD_ADDR_bif_slave_r_arb_stat 36
 178
 179 /* Register rw_intr_mask, scope bif_slave, type rw */
 180 typedef struct {
 181   unsigned int bus_release : 1;
 182   unsigned int bus_acquire : 1;
 183   unsigned int dummy1      : 30;
 184 } reg_bif_slave_rw_intr_mask;
 185 #define REG_RD_ADDR_bif_slave_rw_intr_mask 64
 186 #define REG_WR_ADDR_bif_slave_rw_intr_mask 64
 187
 188 /* Register rw_ack_intr, scope bif_slave, type rw */
 189 typedef struct {
 190   unsigned int bus_release : 1;
 191   unsigned int bus_acquire : 1;
 192   unsigned int dummy1      : 30;
 193 } reg_bif_slave_rw_ack_intr;
 194 #define REG_RD_ADDR_bif_slave_rw_ack_intr 68
 195 #define REG_WR_ADDR_bif_slave_rw_ack_intr 68
 196
 197 /* Register r_intr, scope bif_slave, type r */
 198 typedef struct {
 199   unsigned int bus_release : 1;
 200   unsigned int bus_acquire : 1;
 201   unsigned int dummy1      : 30;
 202 } reg_bif_slave_r_intr;
 203 #define REG_RD_ADDR_bif_slave_r_intr 72
 204
 205 /* Register r_masked_intr, scope bif_slave, type r */
 206 typedef struct {
 207   unsigned int bus_release : 1;
 208   unsigned int bus_acquire : 1;
 209   unsigned int dummy1      : 30;
 210 } reg_bif_slave_r_masked_intr;
 211 #define REG_RD_ADDR_bif_slave_r_masked_intr 76
 212
 213
 214 /* Constants */
 215 enum {
 216   regk_bif_slave_active_hi                 = 0x00000003,
 217   regk_bif_slave_active_lo                 = 0x00000002,
 218   regk_bif_slave_addr                      = 0x00000000,
 219   regk_bif_slave_always                    = 0x00000001,
 220   regk_bif_slave_at_idle                   = 0x00000002,
 221   regk_bif_slave_burst_end                 = 0x00000003,
 222   regk_bif_slave_dma                       = 0x00000001,
 223   regk_bif_slave_hi                        = 0x00000003,
 224   regk_bif_slave_inv                       = 0x00000001,
 225   regk_bif_slave_lo                        = 0x00000002,
 226   regk_bif_slave_local                     = 0x00000001,
 227   regk_bif_slave_master                    = 0x00000000,
 228   regk_bif_slave_mode_reg                  = 0x00000001,
 229   regk_bif_slave_no                        = 0x00000000,
 230   regk_bif_slave_norm                      = 0x00000000,
 231   regk_bif_slave_on_access                 = 0x00000000,
 232   regk_bif_slave_rw_arb_cfg_default        = 0x00000000,
 233   regk_bif_slave_rw_ch0_cfg_default        = 0x00000000,
 234   regk_bif_slave_rw_ch1_cfg_default        = 0x00000000,
 235   regk_bif_slave_rw_ch2_cfg_default        = 0x00000000,
 236   regk_bif_slave_rw_ch3_cfg_default        = 0x00000000,
 237   regk_bif_slave_rw_intr_mask_default      = 0x00000000,
 238   regk_bif_slave_rw_slave_cfg_default      = 0x00000000,
 239   regk_bif_slave_shared                    = 0x00000000,
 240   regk_bif_slave_slave                     = 0x00000001,
 241   regk_bif_slave_t0ns                      = 0x00000003,
 242   regk_bif_slave_t10ns                     = 0x00000002,
 243   regk_bif_slave_t20ns                     = 0x00000003,
 244   regk_bif_slave_t30ns                     = 0x00000002,
 245   regk_bif_slave_t40ns                     = 0x00000001,
 246   regk_bif_slave_t50ns                     = 0x00000000,
 247   regk_bif_slave_yes                       = 0x00000001,
 248   regk_bif_slave_z                         = 0x00000004
 249 };
 250 #endif /* __bif_slave_defs_h */