arch/m32r/opsput/dot.gdbinit

   1 # .gdbinit file
   2 # $Id: dot.gdbinit,v 1.1 2004/07/27 06:54:20 sakugawa Exp $
   3
   4 # setting
   5 set width 0d70
   6 set radix 0d16
   7 set height 0
   8 debug_chaos
   9
  10 # clk xin:cpu:bus=1:8:1
  11 define clock_init_on_181
  12   set *(unsigned long *)0x00ef400c = 0x2
  13   set *(unsigned long *)0x00ef4004 = 0x1
  14   shell sleep 0.1
  15   set *(unsigned long *)0x00ef4000 = 0x101
  16 end
  17 # clk xin:cpu:bus=1:8:2
  18 define clock_init_on_182
  19   set *(unsigned long *)0x00ef400c = 0x1
  20   set *(unsigned long *)0x00ef4004 = 0x1
  21   shell sleep 0.1
  22   set *(unsigned long *)0x00ef4000 = 0x101
  23 end
  24
  25 # clk xin:cpu:bus=1:8:4
  26 define clock_init_on_184
  27   set *(unsigned long *)0x00ef400c = 0x0
  28   set *(unsigned long *)0x00ef4004 = 0x1
  29   shell sleep 0.1
  30   set *(unsigned long *)0x00ef4000 = 0x101
  31 end
  32
  33 # clk xin:cpu:bus=1:1:1
  34 define clock_init_off
  35   shell sleep 0.1
  36   set *(unsigned long *)0x00ef4000 = 0x0
  37   shell sleep 0.1
  38   set *(unsigned long *)0x00ef4004 = 0x0
  39   shell sleep 0.1
  40   set *(unsigned long *)0x00ef400c = 0x0
  41 end
  42
  43 define tlb_init
  44   set $tlbbase = 0xfe000000
  45   set *(unsigned long *)($tlbbase + 0x04) = 0x0
  46   set *(unsigned long *)($tlbbase + 0x0c) = 0x0
  47   set *(unsigned long *)($tlbbase + 0x14) = 0x0
  48   set *(unsigned long *)($tlbbase + 0x1c) = 0x0
  49   set *(unsigned long *)($tlbbase + 0x24) = 0x0
  50   set *(unsigned long *)($tlbbase + 0x2c) = 0x0
  51   set *(unsigned long *)($tlbbase + 0x34) = 0x0
  52   set *(unsigned long *)($tlbbase + 0x3c) = 0x0
  53   set *(unsigned long *)($tlbbase + 0x44) = 0x0
  54   set *(unsigned long *)($tlbbase + 0x4c) = 0x0
  55   set *(unsigned long *)($tlbbase + 0x54) = 0x0
  56   set *(unsigned long *)($tlbbase + 0x5c) = 0x0
  57   set *(unsigned long *)($tlbbase + 0x64) = 0x0
  58   set *(unsigned long *)($tlbbase + 0x6c) = 0x0
  59   set *(unsigned long *)($tlbbase + 0x74) = 0x0
  60   set *(unsigned long *)($tlbbase + 0x7c) = 0x0
  61   set *(unsigned long *)($tlbbase + 0x84) = 0x0
  62   set *(unsigned long *)($tlbbase + 0x8c) = 0x0
  63   set *(unsigned long *)($tlbbase + 0x94) = 0x0
  64   set *(unsigned long *)($tlbbase + 0x9c) = 0x0
  65   set *(unsigned long *)($tlbbase + 0xa4) = 0x0
  66   set *(unsigned long *)($tlbbase + 0xac) = 0x0
  67   set *(unsigned long *)($tlbbase + 0xb4) = 0x0
  68   set *(unsigned long *)($tlbbase + 0xbc) = 0x0
  69   set *(unsigned long *)($tlbbase + 0xc4) = 0x0
  70   set *(unsigned long *)($tlbbase + 0xcc) = 0x0
  71   set *(unsigned long *)($tlbbase + 0xd4) = 0x0
  72   set *(unsigned long *)($tlbbase + 0xdc) = 0x0
  73   set *(unsigned long *)($tlbbase + 0xe4) = 0x0
  74   set *(unsigned long *)($tlbbase + 0xec) = 0x0
  75   set *(unsigned long *)($tlbbase + 0xf4) = 0x0
  76   set *(unsigned long *)($tlbbase + 0xfc) = 0x0
  77   set $tlbbase = 0xfe000800
  78   set *(unsigned long *)($tlbbase + 0x04) = 0x0
  79   set *(unsigned long *)($tlbbase + 0x0c) = 0x0
  80   set *(unsigned long *)($tlbbase + 0x14) = 0x0
  81   set *(unsigned long *)($tlbbase + 0x1c) = 0x0
  82   set *(unsigned long *)($tlbbase + 0x24) = 0x0
  83   set *(unsigned long *)($tlbbase + 0x2c) = 0x0
  84   set *(unsigned long *)($tlbbase + 0x34) = 0x0
  85   set *(unsigned long *)($tlbbase + 0x3c) = 0x0
  86   set *(unsigned long *)($tlbbase + 0x44) = 0x0
  87   set *(unsigned long *)($tlbbase + 0x4c) = 0x0
  88   set *(unsigned long *)($tlbbase + 0x54) = 0x0
  89   set *(unsigned long *)($tlbbase + 0x5c) = 0x0
  90   set *(unsigned long *)($tlbbase + 0x64) = 0x0
  91   set *(unsigned long *)($tlbbase + 0x6c) = 0x0
  92   set *(unsigned long *)($tlbbase + 0x74) = 0x0
  93   set *(unsigned long *)($tlbbase + 0x7c) = 0x0
  94   set *(unsigned long *)($tlbbase + 0x84) = 0x0
  95   set *(unsigned long *)($tlbbase + 0x8c) = 0x0
  96   set *(unsigned long *)($tlbbase + 0x94) = 0x0
  97   set *(unsigned long *)($tlbbase + 0x9c) = 0x0
  98   set *(unsigned long *)($tlbbase + 0xa4) = 0x0
  99   set *(unsigned long *)($tlbbase + 0xac) = 0x0
 100   set *(unsigned long *)($tlbbase + 0xb4) = 0x0
 101   set *(unsigned long *)($tlbbase + 0xbc) = 0x0
 102   set *(unsigned long *)($tlbbase + 0xc4) = 0x0
 103   set *(unsigned long *)($tlbbase + 0xcc) = 0x0
 104   set *(unsigned long *)($tlbbase + 0xd4) = 0x0
 105   set *(unsigned long *)($tlbbase + 0xdc) = 0x0
 106   set *(unsigned long *)($tlbbase + 0xe4) = 0x0
 107   set *(unsigned long *)($tlbbase + 0xec) = 0x0
 108   set *(unsigned long *)($tlbbase + 0xf4) = 0x0
 109   set *(unsigned long *)($tlbbase + 0xfc) = 0x0
 110 end
 111
 112 define load_modules
 113   use_debug_dma
 114   load
 115 end
 116
 117 # Set kernel parameters
 118 define set_kernel_parameters
 119   set $param = (void*)0x88001000
 120   # INITRD_START
 121 #  set *(unsigned long *)($param + 0x0010) = 0x08300000
 122   # INITRD_SIZE
 123 #  set *(unsigned long *)($param + 0x0014) = 0x00400000
 124   # M32R_CPUCLK
 125   set *(unsigned long *)($param + 0x0018) = 0d200000000
 126   # M32R_BUSCLK
 127   set *(unsigned long *)($param + 0x001c) = 0d50000000
 128 #  set *(unsigned long *)($param + 0x001c) = 0d25000000
 129
 130   # M32R_TIMER_DIVIDE
 131   set *(unsigned long *)($param + 0x0020) = 0d128
 132
 133   set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x console=tty1 \
 134   root=/dev/nfsroot \
 135   nfsroot=192.168.0.1:/project/m32r-linux/export/root.2.6 \
 136   nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \
 137   mem=16m \0"
 138 end
 139
 140 define boot
 141   set_kernel_parameters
 142   set $pc=0x88002000
 143   set $fp=0
 144   set $evb=0x88000000
 145   si
 146   c
 147 end
 148
 149 # Show TLB entries
 150 define show_tlb_entries
 151   set $i = 0
 152   set $addr = $arg0
 153   use_mon_code
 154   while ($i < 0d32 )
 155     set $tlb_tag = *(unsigned long*)$addr
 156     set $tlb_data = *(unsigned long*)($addr + 4)
 157     printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
 158     set $i = $i + 1
 159     set $addr = $addr + 8
 160   end
 161 #  use_debug_dma
 162 end
 163 define itlb
 164   set $itlb=0xfe000000
 165   show_tlb_entries $itlb
 166 end
 167 define dtlb
 168   set $dtlb=0xfe000800
 169   show_tlb_entries $dtlb
 170 end
 171
 172 define show_regs
 173   printf " R0[%08lx]   R1[%08lx]   R2[%08lx]   R3[%08lx]\n",$r0,$r1,$r2,$r3
 174   printf " R4[%08lx]   R5[%08lx]   R6[%08lx]   R7[%08lx]\n",$r4,$r5,$r6,$r7
 175   printf " R8[%08lx]   R9[%08lx]  R10[%08lx]  R11[%08lx]\n",$r8,$r9,$r10,$r11
 176   printf "R12[%08lx]   FP[%08lx]   LR[%08lx]   SP[%08lx]\n",$r12,$fp,$lr,$sp
 177   printf "PSW[%08lx]  CBR[%08lx]  SPI[%08lx]  SPU[%08lx]\n",$psw,$cbr,$spi,$spu
 178   printf "BPC[%08lx]   PC[%08lx] ACCL[%08lx] ACCH[%08lx]\n",$bpc,$pc,$accl,$acch
 179   printf "EVB[%08lx]\n",$evb
 180 end
 181
 182 define restart
 183   sdireset
 184   sdireset
 185   en 1
 186   set $pc=0x0
 187   c
 188   tlb_init
 189   setup
 190   load_modules
 191   boot
 192 end
 193
 194 define setup
 195   debug_chaos
 196 # Clock
 197 #  shell sleep 0.1
 198 #  clock_init_off
 199 #  shell sleep 1
 200 #  clock_init_on_182
 201 #  shell sleep 0.1
 202 # SDRAM
 203   set *(unsigned long *)0xa0ef6004 = 0x0001053f
 204   set *(unsigned long *)0xa0ef6028 = 0x00031102
 205 end
 206
 207 sdireset
 208 sdireset
 209 file vmlinux
 210 target m32rsdi
 211 set $pc=0x0
 212 b *0x30000
 213 c
 214 dis 1
 215 setup
 216 tlb_init
 217 load_modules
 218 boot