arch/m68k/cpu/mcf52x2/cpu.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2003
   4  * Josef Baumgartner <josef.baumgartner@telex.de>
   5  *
   6  * MCF5282 additionals
   7  * (C) Copyright 2005
   8  * BuS Elektronik GmbH & Co. KG <esw@bus-elektronik.de>
   9  *
  10  * MCF5275 additions
  11  * Copyright (C) 2008 Arthur Shipkowski (art@videon-central.com)
  12  *
  13  * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved.
  14  */
  15
  16 #include <common.h>
  17 #include <watchdog.h>
  18 #include <command.h>
  19 #include <asm/immap.h>
  20 #include <asm/io.h>
  21 #include <netdev.h>
  22 #include "cpu.h"
  23
  24 DECLARE_GLOBAL_DATA_PTR;
  25
  26 #ifdef  CONFIG_M5208
  27 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  28 {
  29         rcm_t *rcm = (rcm_t *)(MMAP_RCM);
  30
  31         udelay(1000);
  32
  33         out_8(&rcm->rcr, RCM_RCR_SOFTRST);
  34
  35         /* we don't return! */
  36         return 0;
  37 };
  38
  39 #if defined(CONFIG_DISPLAY_CPUINFO)
  40 int print_cpuinfo(void)
  41 {
  42         char buf1[32], buf2[32];
  43
  44         printf("CPU:   Freescale Coldfire MCF5208\n"
  45                "       CPU CLK %s MHz BUS CLK %s MHz\n",
  46                strmhz(buf1, gd->cpu_clk),
  47                strmhz(buf2, gd->bus_clk));
  48         return 0;
  49 };
  50 #endif /* CONFIG_DISPLAY_CPUINFO */
  51
  52 #if defined(CONFIG_WATCHDOG)
  53 /* Called by macro WATCHDOG_RESET */
  54 void watchdog_reset(void)
  55 {
  56         wdog_t *wdt = (wdog_t *)(MMAP_WDOG);
  57
  58         out_be16(&wdt->sr, 0x5555);
  59         out_be16(&wdt->sr, 0xaaaa);
  60 }
  61
  62 int watchdog_disable(void)
  63 {
  64         wdog_t *wdt = (wdog_t *)(MMAP_WDOG);
  65
  66         /* reset watchdog counter */
  67         out_be16(&wdt->sr, 0x5555);
  68         out_be16(&wdt->sr, 0xaaaa);
  69         /* disable watchdog timer */
  70         out_be16(&wdt->cr, 0);
  71
  72         puts("WATCHDOG:disabled\n");
  73         return (0);
  74 }
  75
  76 int watchdog_init(void)
  77 {
  78         wdog_t *wdt = (wdog_t *)(MMAP_WDOG);
  79
  80         /* disable watchdog */
  81         out_be16(&wdt->cr, 0);
  82
  83         /* set timeout and enable watchdog */
  84         out_be16(&wdt->mr,
  85                 (CONFIG_WATCHDOG_TIMEOUT * CONFIG_SYS_HZ) / (32768 * 1000) - 1);
  86
  87         /* reset watchdog counter */
  88         out_be16(&wdt->sr, 0x5555);
  89         out_be16(&wdt->sr, 0xaaaa);
  90
  91         puts("WATCHDOG:enabled\n");
  92         return (0);
  93 }
  94 #endif                          /* #ifdef CONFIG_WATCHDOG */
  95 #endif                          /* #ifdef CONFIG_M5208 */
  96
  97 #ifdef  CONFIG_M5271
  98 #if defined(CONFIG_DISPLAY_CPUINFO)
  99 /*
 100  * Both MCF5270 and MCF5271 are members of the MPC5271 family. Try to
 101  * determine which one we are running on, based on the Chip Identification
 102  * Register (CIR).
 103  */
 104 int print_cpuinfo(void)
 105 {
 106         char buf[32];
 107         unsigned short cir;     /* Chip Identification Register */
 108         unsigned short pin;     /* Part identification number */
 109         unsigned char prn;      /* Part revision number */
 110         char *cpu_model;
 111
 112         cir = mbar_readShort(MCF_CCM_CIR);
 113         pin = cir >> MCF_CCM_CIR_PIN_LEN;
 114         prn = cir & MCF_CCM_CIR_PRN_MASK;
 115
 116         switch (pin) {
 117         case MCF_CCM_CIR_PIN_MCF5270:
 118                 cpu_model = "5270";
 119                 break;
 120         case MCF_CCM_CIR_PIN_MCF5271:
 121                 cpu_model = "5271";
 122                 break;
 123         default:
 124                 cpu_model = NULL;
 125                 break;
 126         }
 127
 128         if (cpu_model)
 129                 printf("CPU:   Freescale ColdFire MCF%s rev. %hu, at %s MHz\n",
 130                        cpu_model, prn, strmhz(buf, CONFIG_SYS_CLK));
 131         else
 132                 printf("CPU:   Unknown - Freescale ColdFire MCF5271 family"
 133                        " (PIN: 0x%x) rev. %hu, at %s MHz\n",
 134                        pin, prn, strmhz(buf, CONFIG_SYS_CLK));
 135
 136         return 0;
 137 }
 138 #endif /* CONFIG_DISPLAY_CPUINFO */
 139
 140 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 141 {
 142         /* Call the board specific reset actions first. */
 143         if(board_reset) {
 144                 board_reset();
 145         }
 146
 147         mbar_writeByte(MCF_RCM_RCR,
 148                        MCF_RCM_RCR_SOFTRST | MCF_RCM_RCR_FRCRSTOUT);
 149         return 0;
 150 };
 151
 152 #if defined(CONFIG_WATCHDOG)
 153 void watchdog_reset(void)
 154 {
 155         mbar_writeShort(MCF_WTM_WSR, 0x5555);
 156         mbar_writeShort(MCF_WTM_WSR, 0xAAAA);
 157 }
 158
 159 int watchdog_disable(void)
 160 {
 161         mbar_writeShort(MCF_WTM_WCR, 0);
 162         return (0);
 163 }
 164
 165 int watchdog_init(void)
 166 {
 167         mbar_writeShort(MCF_WTM_WCR, MCF_WTM_WCR_EN);
 168         return (0);
 169 }
 170 #endif                          /* #ifdef CONFIG_WATCHDOG */
 171
 172 #endif
 173
 174 #ifdef  CONFIG_M5272
 175 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 176 {
 177         wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
 178
 179         out_be16(&wdp->wdog_wrrr, 0);
 180         udelay(1000);
 181
 182         /* enable watchdog, set timeout to 0 and wait */
 183         out_be16(&wdp->wdog_wrrr, 1);
 184         while (1) ;
 185
 186         /* we don't return! */
 187         return 0;
 188 };
 189
 190 #if defined(CONFIG_DISPLAY_CPUINFO)
 191 int print_cpuinfo(void)
 192 {
 193         sysctrl_t *sysctrl = (sysctrl_t *) (MMAP_CFG);
 194         uchar msk;
 195         char *suf;
 196
 197         puts("CPU:   ");
 198         msk = (in_be32(&sysctrl->sc_dir) > 28) & 0xf;
 199         switch (msk) {
 200         case 0x2:
 201                 suf = "1K75N";
 202                 break;
 203         case 0x4:
 204                 suf = "3K75N";
 205                 break;
 206         default:
 207                 suf = NULL;
 208                 printf("Freescale MCF5272 (Mask:%01x)\n", msk);
 209                 break;
 210         }
 211
 212         if (suf)
 213                 printf("Freescale MCF5272 %s\n", suf);
 214         return 0;
 215 };
 216 #endif /* CONFIG_DISPLAY_CPUINFO */
 217
 218 #if defined(CONFIG_WATCHDOG)
 219 /* Called by macro WATCHDOG_RESET */
 220 void watchdog_reset(void)
 221 {
 222         wdog_t *wdt = (wdog_t *)(MMAP_WDOG);
 223
 224         out_be16(&wdt->wdog_wcr, 0);
 225 }
 226
 227 int watchdog_disable(void)
 228 {
 229         wdog_t *wdt = (wdog_t *)(MMAP_WDOG);
 230
 231         /* reset watchdog counter */
 232         out_be16(&wdt->wdog_wcr, 0);
 233         /* disable watchdog interrupt */
 234         out_be16(&wdt->wdog_wirr, 0);
 235         /* disable watchdog timer */
 236         out_be16(&wdt->wdog_wrrr, 0);
 237
 238         puts("WATCHDOG:disabled\n");
 239         return (0);
 240 }
 241
 242 int watchdog_init(void)
 243 {
 244         wdog_t *wdt = (wdog_t *)(MMAP_WDOG);
 245
 246         /* disable watchdog interrupt */
 247         out_be16(&wdt->wdog_wirr, 0);
 248
 249         /* set timeout and enable watchdog */
 250         out_be16(&wdt->wdog_wrrr,
 251                 (CONFIG_WATCHDOG_TIMEOUT * CONFIG_SYS_HZ) / (32768 * 1000) - 1);
 252
 253         /* reset watchdog counter */
 254         out_be16(&wdt->wdog_wcr, 0);
 255
 256         puts("WATCHDOG:enabled\n");
 257         return (0);
 258 }
 259 #endif                          /* #ifdef CONFIG_WATCHDOG */
 260
 261 #endif                          /* #ifdef CONFIG_M5272 */
 262
 263 #ifdef  CONFIG_M5275
 264 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 265 {
 266         rcm_t *rcm = (rcm_t *)(MMAP_RCM);
 267
 268         udelay(1000);
 269
 270         out_8(&rcm->rcr, RCM_RCR_SOFTRST);
 271
 272         /* we don't return! */
 273         return 0;
 274 };
 275
 276 #if defined(CONFIG_DISPLAY_CPUINFO)
 277 int print_cpuinfo(void)
 278 {
 279         char buf[32];
 280
 281         printf("CPU:   Freescale Coldfire MCF5275 at %s MHz\n",
 282                         strmhz(buf, CONFIG_SYS_CLK));
 283         return 0;
 284 };
 285 #endif /* CONFIG_DISPLAY_CPUINFO */
 286
 287 #if defined(CONFIG_WATCHDOG)
 288 /* Called by macro WATCHDOG_RESET */
 289 void watchdog_reset(void)
 290 {
 291         wdog_t *wdt = (wdog_t *)(MMAP_WDOG);
 292
 293         out_be16(&wdt->wsr, 0x5555);
 294         out_be16(&wdt->wsr, 0xaaaa);
 295 }
 296
 297 int watchdog_disable(void)
 298 {
 299         wdog_t *wdt = (wdog_t *)(MMAP_WDOG);
 300
 301         /* reset watchdog counter */
 302         out_be16(&wdt->wsr, 0x5555);
 303         out_be16(&wdt->wsr, 0xaaaa);
 304
 305         /* disable watchdog timer */
 306         out_be16(&wdt->wcr, 0);
 307
 308         puts("WATCHDOG:disabled\n");
 309         return (0);
 310 }
 311
 312 int watchdog_init(void)
 313 {
 314         wdog_t *wdt = (wdog_t *)(MMAP_WDOG);
 315
 316         /* disable watchdog */
 317         out_be16(&wdt->wcr, 0);
 318
 319         /* set timeout and enable watchdog */
 320         out_be16(&wdt->wmr,
 321                 (CONFIG_WATCHDOG_TIMEOUT * CONFIG_SYS_HZ) / (32768 * 1000) - 1);
 322
 323         /* reset watchdog counter */
 324         out_be16(&wdt->wsr, 0x5555);
 325         out_be16(&wdt->wsr, 0xaaaa);
 326
 327         puts("WATCHDOG:enabled\n");
 328         return (0);
 329 }
 330 #endif                          /* #ifdef CONFIG_WATCHDOG */
 331
 332 #endif                          /* #ifdef CONFIG_M5275 */
 333
 334 #ifdef  CONFIG_M5282
 335 #if defined(CONFIG_DISPLAY_CPUINFO)
 336 int print_cpuinfo(void)
 337 {
 338         unsigned char resetsource = MCFRESET_RSR;
 339
 340         printf("CPU:   Freescale Coldfire MCF5282 (PIN: %2.2x REV: %2.2x)\n",
 341                MCFCCM_CIR >> 8, MCFCCM_CIR & MCFCCM_CIR_PRN_MASK);
 342         printf("Reset:%s%s%s%s%s%s%s\n",
 343                (resetsource & MCFRESET_RSR_LOL) ? " Loss of Lock" : "",
 344                (resetsource & MCFRESET_RSR_LOC) ? " Loss of Clock" : "",
 345                (resetsource & MCFRESET_RSR_EXT) ? " External" : "",
 346                (resetsource & MCFRESET_RSR_POR) ? " Power On" : "",
 347                (resetsource & MCFRESET_RSR_WDR) ? " Watchdog" : "",
 348                (resetsource & MCFRESET_RSR_SOFT) ? " Software" : "",
 349                (resetsource & MCFRESET_RSR_LVD) ? " Low Voltage" : "");
 350         return 0;
 351 }
 352 #endif /* CONFIG_DISPLAY_CPUINFO */
 353
 354 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 355 {
 356         MCFRESET_RCR = MCFRESET_RCR_SOFTRST;
 357         return 0;
 358 };
 359 #endif
 360
 361 #ifdef CONFIG_M5249
 362 #if defined(CONFIG_DISPLAY_CPUINFO)
 363 int print_cpuinfo(void)
 364 {
 365         char buf[32];
 366
 367         printf("CPU:   Freescale Coldfire MCF5249 at %s MHz\n",
 368                strmhz(buf, CONFIG_SYS_CLK));
 369         return 0;
 370 }
 371 #endif /* CONFIG_DISPLAY_CPUINFO */
 372
 373 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 374 {
 375         /* enable watchdog, set timeout to 0 and wait */
 376         mbar_writeByte(MCFSIM_SYPCR, 0xc0);
 377         while (1) ;
 378
 379         /* we don't return! */
 380         return 0;
 381 };
 382 #endif
 383
 384 #ifdef CONFIG_M5253
 385 #if defined(CONFIG_DISPLAY_CPUINFO)
 386 int print_cpuinfo(void)
 387 {
 388         char buf[32];
 389
 390         unsigned char resetsource = mbar_readLong(SIM_RSR);
 391         printf("CPU:   Freescale Coldfire MCF5253 at %s MHz\n",
 392                strmhz(buf, CONFIG_SYS_CLK));
 393
 394         if ((resetsource & SIM_RSR_HRST) || (resetsource & SIM_RSR_SWTR)) {
 395                 printf("Reset:%s%s\n",
 396                        (resetsource & SIM_RSR_HRST) ? " Hardware/ System Reset"
 397                        : "",
 398                        (resetsource & SIM_RSR_SWTR) ? " Software Watchdog" :
 399                        "");
 400         }
 401         return 0;
 402 }
 403 #endif /* CONFIG_DISPLAY_CPUINFO */
 404
 405 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 406 {
 407         /* enable watchdog, set timeout to 0 and wait */
 408         mbar_writeByte(SIM_SYPCR, 0xc0);
 409         while (1) ;
 410
 411         /* we don't return! */
 412         return 0;
 413 };
 414 #endif
 415
 416 #if defined(CONFIG_MCFFEC)
 417 /* Default initializations for MCFFEC controllers.  To override,
 418  * create a board-specific function called:
 419  *      int board_eth_init(bd_t *bis)
 420  */
 421
 422 int cpu_eth_init(bd_t *bis)
 423 {
 424         return mcffec_initialize(bis);
 425 }
 426 #endif