2 * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
3 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
5 * Copyright 2010-2012 Freescale Semiconductor, Inc.
6 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
8 * SPDX-License-Identifier: GPL-2.0+
12 #include <asm-offsets.h>
14 #include <timestamp.h>
16 #include <asm/cache.h>
18 #ifndef CONFIG_IDENT_STRING
19 #define CONFIG_IDENT_STRING ""
26 move.w #0x2700,%sr; /* disable intrs */ \
27 subl #60,%sp; /* space for 15 regs */ \
28 moveml %d0-%d7/%a0-%a6,%sp@;
31 moveml %sp@,%d0-%d7/%a0-%a6; \
32 addl #60,%sp; /* space for 15 regs */ \
35 #if defined(CONFIG_SERIAL_BOOT)
36 #define ASM_DRAMINIT (asm_dram_init - CONFIG_SYS_TEXT_BASE + CONFIG_SYS_INIT_RAM_ADDR)
37 #define ASM_DRAMINIT_N (asm_dram_init - TEXT_BASE)
38 #define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - CONFIG_SYS_TEXT_BASE + CONFIG_SYS_INIT_RAM_ADDR)
44 * Vector table. This is used for initial platform startup.
45 * These vectors are to catch any un-intended traps.
48 #if defined(CONFIG_SERIAL_BOOT)
50 INITSP: .long 0 /* Initial SP */
52 INITPC: .long ASM_DRAMINIT /* Initial PC */
54 #ifdef CONFIG_SYS_NAND_BOOT
55 INITPC: .long ASM_DRAMINIT_N /* Initial PC */
60 INITSP: .long 0 /* Initial SP */
61 INITPC: .long _START /* Initial PC */
65 vector02: .long _FAULT /* Access Error */
66 vector03: .long _FAULT /* Address Error */
67 vector04: .long _FAULT /* Illegal Instruction */
68 vector05: .long _FAULT /* Reserved */
69 vector06: .long _FAULT /* Reserved */
70 vector07: .long _FAULT /* Reserved */
71 vector08: .long _FAULT /* Privilege Violation */
72 vector09: .long _FAULT /* Trace */
73 vector0A: .long _FAULT /* Unimplemented A-Line */
74 vector0B: .long _FAULT /* Unimplemented F-Line */
75 vector0C: .long _FAULT /* Debug Interrupt */
76 vector0D: .long _FAULT /* Reserved */
77 vector0E: .long _FAULT /* Format Error */
78 vector0F: .long _FAULT /* Unitialized Int. */
82 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
84 vector18: .long _FAULT /* Spurious Interrupt */
85 vector19: .long _FAULT /* Autovector Level 1 */
86 vector1A: .long _FAULT /* Autovector Level 2 */
87 vector1B: .long _FAULT /* Autovector Level 3 */
88 vector1C: .long _FAULT /* Autovector Level 4 */
89 vector1D: .long _FAULT /* Autovector Level 5 */
90 vector1E: .long _FAULT /* Autovector Level 6 */
91 vector1F: .long _FAULT /* Autovector Level 7 */
93 #if !defined(CONFIG_SERIAL_BOOT)
97 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
98 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
102 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
103 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
106 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
107 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
108 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
109 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
110 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
111 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
112 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
113 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
116 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
117 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
118 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
119 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
120 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
121 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
122 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
123 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
126 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
127 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
128 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
129 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
130 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
131 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
132 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
133 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
136 #if defined(CONFIG_SERIAL_BOOT)
137 /* Image header: chksum 4 bytes, len 4 bytes, img dest 4 bytes */
139 .long 0x00000000 /* checksum, not yet implemented */
140 .long 0x00040000 /* image length */
141 .long CONFIG_SYS_TEXT_BASE /* image to be relocated at */
144 move.w #0x2700,%sr /* Mask off Interrupt */
146 #ifdef CONFIG_SYS_NAND_BOOT
147 /* for assembly stack */
148 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
151 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
156 move.l #CONFIG_SYS_INIT_RAM_ADDR, %d0
159 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
162 /* initialize general use internal ram */
164 move.l #(ICACHE_STATUS), %a1 /* icache */
165 move.l #(DCACHE_STATUS), %a2 /* dcache */
169 /* invalidate and disable cache */
170 move.l #(CONFIG_SYS_ICACHE_INV + CONFIG_SYS_DCACHE_INV), %d0
171 movec %d0, %CACR /* Invalidate cache */
178 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
181 /* Must disable global address */
182 move.l #0xFC008000, %a1
183 move.l #(CONFIG_SYS_CS0_BASE), (%a1)
184 move.l #0xFC008008, %a1
185 move.l #(CONFIG_SYS_CS0_CTRL), (%a1)
186 move.l #0xFC008004, %a1
187 move.l #(CONFIG_SYS_CS0_MASK), (%a1)
188 #endif /* CONFIG_CF_SBF */
190 #ifdef CONFIG_MCF5441x
191 /* TC: enable all peripherals,
192 in the future only enable certain peripherals */
193 move.l #0xFC04002D, %a1
195 #if defined(CONFIG_CF_SBF)
196 move.b #23, (%a1) /* dspi */
198 move.b #46, (%a1) /* DDR */
201 move.l #0xEC094060, %a1
204 /* use vco instead of cpu*2 clock for ddr clock */
205 move.l #0xEC09001A, %a1
206 move.w #0xE01D, (%a1)
209 move.l #0xFC0B8180, %a1
210 move.l #0x00000000, (%a1)
211 move.l #0x40000000, (%a1)
213 move.l #0xFC0B81AC, %a1
214 move.l #0x01030203, (%a1)
216 move.l #0xFC0B8000, %a1
217 move.l #0x01010101, (%a1)+ /* 0x00 */
218 move.l #0x00000101, (%a1)+ /* 0x04 */
219 move.l #0x01010100, (%a1)+ /* 0x08 */
220 move.l #0x01010000, (%a1)+ /* 0x0C */
221 move.l #0x00010101, (%a1)+ /* 0x10 */
222 move.l #0xFC0B8018, %a1
223 move.l #0x00010100, (%a1)+ /* 0x18 */
224 move.l #0x00000001, (%a1)+ /* 0x1C */
225 move.l #0x01000001, (%a1)+ /* 0x20 */
226 move.l #0x00000100, (%a1)+ /* 0x24 */
227 move.l #0x00010001, (%a1)+ /* 0x28 */
228 move.l #0x00000200, (%a1)+ /* 0x2C */
229 move.l #0x01000002, (%a1)+ /* 0x30 */
230 move.l #0x00000000, (%a1)+ /* 0x34 */
231 move.l #0x00000100, (%a1)+ /* 0x38 */
232 move.l #0x02000100, (%a1)+ /* 0x3C */
233 move.l #0x02000407, (%a1)+ /* 0x40 */
234 move.l #0x02030007, (%a1)+ /* 0x44 */
235 move.l #0x02000100, (%a1)+ /* 0x48 */
236 move.l #0x0A030203, (%a1)+ /* 0x4C */
237 move.l #0x00020708, (%a1)+ /* 0x50 */
238 move.l #0x00050008, (%a1)+ /* 0x54 */
239 move.l #0x04030002, (%a1)+ /* 0x58 */
240 move.l #0x00000004, (%a1)+ /* 0x5C */
241 move.l #0x020A0000, (%a1)+ /* 0x60 */
242 move.l #0x0C00000E, (%a1)+ /* 0x64 */
243 move.l #0x00002004, (%a1)+ /* 0x68 */
244 move.l #0x00000000, (%a1)+ /* 0x6C */
245 move.l #0x00100010, (%a1)+ /* 0x70 */
246 move.l #0x00100010, (%a1)+ /* 0x74 */
247 move.l #0x00000000, (%a1)+ /* 0x78 */
248 move.l #0x07990000, (%a1)+ /* 0x7C */
249 move.l #0xFC0B80A0, %a1
250 move.l #0x00000000, (%a1)+ /* 0xA0 */
251 move.l #0x00C80064, (%a1)+ /* 0xA4 */
252 move.l #0x44520002, (%a1)+ /* 0xA8 */
253 move.l #0x00C80023, (%a1)+ /* 0xAC */
254 move.l #0xFC0B80B4, %a1
255 move.l #0x0000C350, (%a1) /* 0xB4 */
256 move.l #0xFC0B80E0, %a1
257 move.l #0x04000000, (%a1)+ /* 0xE0 */
258 move.l #0x03000304, (%a1)+ /* 0xE4 */
259 move.l #0x40040000, (%a1)+ /* 0xE8 */
260 move.l #0xC0004004, (%a1)+ /* 0xEC */
261 move.l #0x0642C000, (%a1)+ /* 0xF0 */
262 move.l #0x00000642, (%a1)+ /* 0xF4 */
263 move.l #0xFC0B8024, %a1
265 move.l #0x01000100, (%a1) /* 0x24 */
269 #endif /* CONFIG_MCF5441x */
271 #ifdef CONFIG_MCF5445x
272 /* Dram Initialization a1, a2, and d0 */
274 move.l #0xFC0A4074, %a1
275 move.b #(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1)
278 /* SDRAM Chip 0 and 1 */
279 move.l #0xFC0B8110, %a1
280 move.l #0xFC0B8114, %a2
282 /* calculate the size */
284 move.l #(CONFIG_SYS_SDRAM_SIZE), %d2
285 #ifdef CONFIG_SYS_SDRAM_BASE1
294 #ifdef CONFIG_SYS_NAND_BOOT
295 beq asm_nand_chk_status
297 /* SDRAM Chip 0 and 1 */
298 move.l #(CONFIG_SYS_SDRAM_BASE), (%a1)
300 #ifdef CONFIG_SYS_SDRAM_BASE1
301 move.l #(CONFIG_SYS_SDRAM_BASE1), (%a2)
306 /* dram cfg1 and cfg2 */
307 move.l #0xFC0B8008, %a1
308 move.l #(CONFIG_SYS_SDRAM_CFG1), (%a1)
310 move.l #0xFC0B800C, %a2
311 move.l #(CONFIG_SYS_SDRAM_CFG2), (%a2)
314 move.l #0xFC0B8000, %a1 /* Mode */
315 move.l #0xFC0B8004, %a2 /* Ctrl */
318 move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
321 #ifdef CONFIG_M54455EVB
323 move.l #(CONFIG_SYS_SDRAM_EMOD + 0x408), (%a1)
325 move.l #(CONFIG_SYS_SDRAM_MODE + 0x300), (%a1)
333 move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
336 /* Perform two refresh cycles */
337 move.l #(CONFIG_SYS_SDRAM_CTRL + 4), %d0
343 #ifdef CONFIG_M54455EVB
344 move.l #(CONFIG_SYS_SDRAM_MODE + 0x200), (%a1)
346 #elif defined(CONFIG_M54451EVB)
348 move.l #(CONFIG_SYS_SDRAM_MODE), (%a1)
350 move.l #(CONFIG_SYS_SDRAM_EMOD), (%a1)
356 move.l #(CONFIG_SYS_SDRAM_CTRL), %d1
357 and.l #0x7FFFFFFF, %d1
358 #ifdef CONFIG_M54455EVB
359 or.l #0x10000C00, %d1
360 #elif defined(CONFIG_M54451EVB)
361 or.l #0x10000C00, %d1
368 #endif /* CONFIG_MCF5445x */
372 * DSPI Initialization
373 * a0 - general, sram - 0x80008000 - 32, see M54455EVB.h
379 /* Enable pins for DSPI mode - chip-selects are enabled later */
381 #ifdef CONFIG_MCF5441x
382 move.l #0xEC09404E, %a1
383 move.l #0xEC09404F, %a2
388 #ifdef CONFIG_MCF5445x
389 move.l #0xFC0A4063, %a0
392 /* Configure DSPI module */
393 move.l #0xFC05C000, %a0
394 move.l #0x80FF0C00, (%a0) /* Master, clear TX/RX FIFO */
396 move.l #0xFC05C00C, %a0
397 #ifdef CONFIG_MCF5441x
398 move.l #0x3E000016, (%a0)
400 #ifdef CONFIG_MCF5445x
401 move.l #0x3E000011, (%a0)
404 move.l #0xFC05C034, %a2 /* dtfr */
405 move.l #0xFC05C03B, %a3 /* drfr */
407 move.l #(ASM_SBF_IMG_HDR + 4), %a1
411 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_SBFHDR_DATA_OFFSET), %a0
412 move.l #(CONFIG_SYS_SBFHDR_SIZE), %d4
414 move.l #0xFC05C02C, %a1 /* dspi status */
416 /* Issue commands and address */
417 move.l #0x8002000B, %d2 /* Fast Read Cmd */
418 jsr asm_dspi_wr_status
419 jsr asm_dspi_rd_status
421 move.l #0x80020000, %d2 /* Address byte 2 */
422 jsr asm_dspi_wr_status
423 jsr asm_dspi_rd_status
425 move.l #0x80020000, %d2 /* Address byte 1 */
426 jsr asm_dspi_wr_status
427 jsr asm_dspi_rd_status
429 move.l #0x80020000, %d2 /* Address byte 0 */
430 jsr asm_dspi_wr_status
431 jsr asm_dspi_rd_status
433 move.l #0x80020000, %d2 /* Dummy Wr and Rd */
434 jsr asm_dspi_wr_status
435 jsr asm_dspi_rd_status
437 /* Transfer serial boot header to sram */
439 move.l #0x80020000, %d2
440 jsr asm_dspi_wr_status
441 jsr asm_dspi_rd_status
443 move.b %d1, (%a0) /* read, copy to dst */
445 add.l #1, %a0 /* inc dst by 1 */
446 sub.l #1, %d4 /* dec cnt by 1 */
447 bne asm_dspi_rd_loop1
449 /* Transfer u-boot from serial flash to memory */
451 move.l #0x80020000, %d2
452 jsr asm_dspi_wr_status
453 jsr asm_dspi_rd_status
455 move.b %d1, (%a4) /* read, copy to dst */
457 add.l #1, %a4 /* inc dst by 1 */
458 sub.l #1, %d5 /* dec cnt by 1 */
459 bne asm_dspi_rd_loop2
461 move.l #0x00020000, %d2 /* Terminate */
462 jsr asm_dspi_wr_status
463 jsr asm_dspi_rd_status
465 /* jump to memory and execute */
466 move.l #(CONFIG_SYS_TEXT_BASE + 0x400), %a0
470 move.l (%a1), %d0 /* status */
471 and.l #0x0000F000, %d0
472 cmp.l #0x00003000, %d0
473 bgt asm_dspi_wr_status
479 move.l (%a1), %d0 /* status */
480 and.l #0x000000F0, %d0
483 beq asm_dspi_rd_status
487 #endif /* CONFIG_CF_SBF */
489 #ifdef CONFIG_SYS_NAND_BOOT
490 /* copy 4 boot pages to dram as soon as possible */
491 /* each page is 996 bytes (1056 total with 60 ECC bytes */
492 move.l #0x00000000, %a1 /* src */
493 move.l #TEXT_BASE, %a2 /* dst */
494 move.l #0x3E0, %d0 /* sz in long */
497 move.l (%a1)+, (%a2)+
499 bne asm_boot_nand_copy
501 /* jump to memory and execute */
502 move.l #(asm_nand_init), %a0
506 /* exit nand boot-mode */
507 move.l #0xFC0FFF30, %a1
508 or.l #0x00000040, %d1
511 /* initialize general use internal ram */
513 move.l #(CACR_STATUS), %a1 /* CACR */
514 move.l #(ICACHE_STATUS), %a2 /* icache */
515 move.l #(DCACHE_STATUS), %a3 /* dcache */
520 /* invalidate and disable cache */
521 move.l #0x01004100, %d0 /* Invalidate cache cmd */
522 movec %d0, %CACR /* Invalidate cache */
529 /* Must disable global address */
530 move.l #0xFC008000, %a1
531 move.l #(CONFIG_SYS_CS0_BASE), (%a1)
532 move.l #0xFC008008, %a1
533 move.l #(CONFIG_SYS_CS0_CTRL), (%a1)
534 move.l #0xFC008004, %a1
535 move.l #(CONFIG_SYS_CS0_MASK), (%a1)
537 /* NAND port configuration */
538 move.l #0xEC094048, %a1
544 move.l #0xFC0FFF38, %a1 /* isr */
545 move.l #0x000e0000, (%a1)
546 move.l #0xFC0FFF08, %a2
547 move.l #0x00000000, (%a2)+ /* car */
548 move.l #0x11000000, (%a2)+ /* rar */
549 move.l #0x00000000, (%a2)+ /* rpt */
550 move.l #0x00000000, (%a2)+ /* rai */
551 move.l #0xFC0FFF2c, %a2 /* cfg */
552 move.l #0x00000000, (%a2)+ /* secsz */
553 move.l #0x000e0681, (%a2)+
554 move.l #0xFC0FFF04, %a2 /* cmd2 */
555 move.l #0xFF404001, (%a2)
556 move.l #0x000e0000, (%a1)
562 move.l #0xFC0FFF00, %a1
563 move.l #0x30700000, (%a1)+ /* cmd1 */
564 move.l #0x007EF000, (%a1)+ /* cmd2 */
566 move.l #0xFC0FFF2C, %a1
567 move.l #0x00000841, (%a1)+ /* secsz */
568 move.l #0x000e0681, (%a1)+ /* cfg */
570 move.l #100, %d4 /* 100 pages ~200KB */
571 move.l #4, %d2 /* start at 4 */
572 move.l #0xFC0FFF04, %a0 /* cmd2 */
573 move.l #0xFC0FFF0C, %a1 /* rar */
574 move.l #(TEXT_BASE + 0xF80), %a2 /* dst */
577 move.l #0x11000000, %d0 /* rar */
582 move.l (%a0), %d0 /* cmd2 */
590 move.l #0xFC0FFF38, %a4 /* isr */
592 and.l #0x40000000, %d0
594 beq asm_nand_chk_status
596 move.l #0xFC0FFF38, %a4 /* isr */
598 or.l #0x000E0000, %d0
602 move.l #0xFC0FC000, %a3 /* buf 1 */
604 move.l (%a3)+, (%a2)+
611 /* jump to memory and execute */
612 move.l #(TEXT_BASE + 0x400), %a0
615 #endif /* CONFIG_SYS_NAND_BOOT */
622 #endif /* CONFIG_CF_SBF || CONFIG_NAND_U_BOOT */
628 #if !defined(CONFIG_SERIAL_BOOT)
631 move.w #0x2700,%sr /* Mask off Interrupt */
633 /* Set vector base register at the beginning of the Flash */
634 move.l #CONFIG_SYS_FLASH_BASE, %d0
637 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
640 /* initialize general use internal ram */
642 move.l #(ICACHE_STATUS), %a1 /* icache */
643 move.l #(DCACHE_STATUS), %a2 /* dcache */
647 /* invalidate and disable cache */
648 move.l #(CONFIG_SYS_ICACHE_INV + CONFIG_SYS_DCACHE_INV), %d0
649 movec %d0, %CACR /* Invalidate cache */
656 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
660 /* set stackpointer to end of internal ram to get some stackspace for
662 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
665 move.l #__got_start, %a5 /* put relocation table address to a5 */
667 bsr cpu_init_f /* run low-level CPU init code (from flash) */
668 bsr board_init_f /* run low-level board init code (from flash) */
670 /* board_init_f() does not return */
672 /*------------------------------------------------------------------------------*/
675 * void relocate_code (addr_sp, gd, addr_moni)
677 * This "function" does not return, instead it continues in RAM
678 * after relocating the monitor code.
682 * r5 = length in bytes
688 move.l 8(%a6), %sp /* set new stack pointer */
690 move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
691 move.l 16(%a6), %a0 /* Save copy of Destination Address */
693 move.l #CONFIG_SYS_MONITOR_BASE, %a1
694 move.l #__init_end, %a2
697 /* copy the code to RAM */
699 move.l (%a1)+, (%a3)+
704 * We are done. Do not return, instead branch to second part of board
705 * initialization, now running from RAM.
708 add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
715 * Now clear BSS segment
718 add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
720 add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
727 * fix got table in RAM
730 add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
731 move.l %a1,%a5 /* * fix got pointer register a5 */
734 add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
744 /* calculate relative jump to board_init_r in ram */
746 add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
748 /* set parameters for board_init_r */
749 move.l %a0,-(%sp) /* dest_addr */
750 move.l %d0,-(%sp) /* gd */
753 /*------------------------------------------------------------------------------*/
775 /*------------------------------------------------------------------------------*/
777 .globl version_string
779 .ascii U_BOOT_VERSION_STRING, "\0"