arch/microblaze/cpu/cache.c

   1 /*
   2  * (C) Copyright 2007 Michal Simek
   3  *
   4  * Michal SIMEK <monstr@monstr.eu>
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #include <common.h>
  10 #include <asm/asm.h>
  11
  12 int dcache_status (void)
  13 {
  14         int i = 0;
  15         int mask = 0x80;
  16         __asm__ __volatile__ ("mfs %0,rmsr"::"r" (i):"memory");
  17         /* i&=0x80 */
  18         __asm__ __volatile__ ("and %0,%0,%1"::"r" (i), "r" (mask):"memory");
  19         return i;
  20 }
  21
  22 int icache_status (void)
  23 {
  24         int i = 0;
  25         int mask = 0x20;
  26         __asm__ __volatile__ ("mfs %0,rmsr"::"r" (i):"memory");
  27         /* i&=0x20 */
  28         __asm__ __volatile__ ("and %0,%0,%1"::"r" (i), "r" (mask):"memory");
  29         return i;
  30 }
  31
  32 void    icache_enable (void) {
  33         MSRSET(0x20);
  34 }
  35
  36 void    icache_disable(void) {
  37         /* we are not generate ICACHE size -> flush whole cache */
  38         flush_cache(0, 32768);
  39         MSRCLR(0x20);
  40 }
  41
  42 void    dcache_enable (void) {
  43         MSRSET(0x80);
  44 }
  45
  46 void    dcache_disable(void) {
  47 #ifdef XILINX_USE_DCACHE
  48         flush_cache(0, XILINX_DCACHE_BYTE_SIZE);
  49 #endif
  50         MSRCLR(0x80);
  51 }
  52
  53 void flush_cache (ulong addr, ulong size)
  54 {
  55         int i;
  56         for (i = 0; i < size; i += 4)
  57                 asm volatile (
  58 #ifdef CONFIG_ICACHE
  59                                 "wic    %0, r0;"
  60 #endif
  61                                 "nop;"
  62 #ifdef CONFIG_DCACHE
  63                                 "wdc.flush      %0, r0;"
  64 #endif
  65                                 "nop;"
  66                                 :
  67                                 : "r" (addr + i)
  68                                 : "memory");
  69 }