arch/mips/pmc-sierra/yosemite/irq-handler.S

   1 /*
   2  * Copyright 2003, 04 PMC-Sierra Inc.
   3  * Author: Manish Lachwani (lachwani@pmc-sierra.com
   4  * Copyright 2004 Ralf Baechle (ralf@linux-mips.org)
   5  *
   6  * First-level interrupt router for the PMC-Sierra Titan board
   7  *
   8  * This program is free software; you can redistribute  it and/or modify it
   9  * under  the terms of  the GNU General  Public License as published by the
  10  * Free Software Foundation;  either version 2 of the  License, or (at your
  11  * option) any later version.
  12  *
  13  * Titan supports Hypertransport or PCI but not both. Hence, one interrupt
  14  * line is shared between the PCI slot A and Hypertransport. This is the
  15  * Processor INTB #0.
  16  */
  17
  18 #include <linux/config.h>
  19 #include <asm/asm.h>
  20 #include <asm/mipsregs.h>
  21 #include <asm/addrspace.h>
  22 #include <asm/regdef.h>
  23 #include <asm/stackframe.h>
  24
  25                 .align  5
  26                 NESTED(titan_handle_int, PT_SIZE, sp)
  27                 SAVE_ALL
  28                 CLI
  29                 .set    at
  30                 .set    noreorder
  31                 la      ra, ret_from_irq
  32                 mfc0    t0, CP0_CAUSE
  33                 mfc0    t2, CP0_STATUS
  34
  35                 and     t0, t2
  36
  37                 andi    t2, t0, STATUSF_IP7     /* INTB5 hardware line */
  38                 bnez    t2, ll_timer_irq        /* Timer */
  39                 andi    t1, t0, STATUSF_IP2     /* INTB0 hardware line */
  40                 bnez    t1, ll_pcia_irq         /* 64-bit PCI */
  41                 andi    t2, t0, STATUSF_IP3     /* INTB1 hardware line */
  42                 bnez    t2, ll_pcib_irq         /* second 64-bit PCI slot */
  43                 andi    t1, t0, STATUSF_IP4     /* INTB2 hardware line */
  44                 bnez    t1, ll_duart_irq        /* UART */
  45                 andi    t2, t0, STATUSF_IP5     /* SMP inter-core interrupts */
  46                 bnez    t2, ll_smp_irq
  47                 andi    t1, t0, STATUSF_IP6
  48                 bnez    t1, ll_ht_irq           /* Hypertransport */
  49
  50                 move    a0, sp
  51                 j       do_extended_irq
  52                 END(titan_handle_int)
  53
  54                 .set    reorder
  55                 .align  5
  56
  57 ll_pcia_irq:
  58                 li      a0, 2
  59                 move    a1, sp
  60 #ifdef CONFIG_HYPERTRANSPORT
  61                 j       ll_ht_smp_irq_handler
  62 #else
  63                 j       do_IRQ
  64 #endif
  65
  66 ll_pcib_irq:
  67                 li      a0, 3
  68                 move    a1, sp
  69                 j       do_IRQ
  70
  71 ll_duart_irq:
  72                 li      a0, 4
  73                 move    a1, sp
  74                 j       do_IRQ
  75
  76 ll_smp_irq:
  77                 li      a0, 5
  78                 move    a1, sp
  79 #ifdef CONFIG_SMP
  80                 j       titan_mailbox_irq
  81 #else
  82                 j       do_IRQ
  83 #endif
  84
  85 ll_ht_irq:
  86                 li      a0, 6
  87                 move    a1, sp
  88                 j       ll_ht_smp_irq_handler
  89
  90 ll_timer_irq:
  91                 li      a0, 7
  92                 move    a1, sp
  93                 j       do_IRQ