arch/mips/sgi-ip32/ip32-irq-glue.S

   1 /*
   2  * Low level interrupt handler for the SGI O2 aka IP32 aka Moosehead
   3  *
   4  * This file is subject to the terms and conditions of the GNU General Public
   5  * License.  See the file "COPYING" in the main directory of this archive
   6  * for more details.
   7  *
   8  * Copyright (C) 2000 Harald Koerfgen
   9  * Copyright (C) 2001 Keith M Wesolowski
  10  */
  11 #include <asm/asm.h>
  12 #include <asm/regdef.h>
  13 #include <asm/mipsregs.h>
  14 #include <asm/stackframe.h>
  15 #include <asm/addrspace.h>
  16
  17                 .text
  18                 .set    noreorder
  19                 .set    noat
  20                 .align  5
  21                 NESTED(ip32_handle_int, PT_SIZE, ra)
  22                 .set    noat
  23                 SAVE_ALL
  24                 CLI                     # TEST: interrupts should be off
  25                 .set    at
  26                 .set    noreorder
  27
  28                 mfc0    s0,CP0_CAUSE
  29
  30                 andi    t1, s0, IE_IRQ0
  31                 bnez    t1, handle_irq0
  32                  andi   t1, s0, IE_IRQ1
  33                 bnez    t1, handle_irq1
  34                  andi   t1, s0, IE_IRQ2
  35                 bnez    t1, handle_irq2
  36                  andi   t1, s0, IE_IRQ3
  37                 bnez    t1, handle_irq3
  38                  andi   t1, s0, IE_IRQ4
  39                 bnez    t1, handle_irq4
  40                  andi   t1, s0, IE_IRQ5
  41                 bnez    t1, handle_irq5
  42                  nop
  43
  44                 /* Either someone has triggered the "software interrupts"
  45                  * or we lost an interrupt somehow.  Ignore it.
  46                  */
  47                 j       ret_from_irq
  48                  nop
  49
  50 handle_irq0:
  51                 jal     ip32_irq0
  52                  move   a0, sp
  53                 j       ret_from_irq
  54                  nop
  55
  56 handle_irq1:
  57                 jal     ip32_irq1
  58                  move   a0, sp
  59                 j       ret_from_irq
  60                  nop
  61
  62 handle_irq2:
  63                 jal     ip32_irq2
  64                  move   a0, sp
  65                 j       ret_from_irq
  66                  nop
  67
  68 handle_irq3:
  69                 jal     ip32_irq3
  70                  move   a0, sp
  71                 j       ret_from_irq
  72                  nop
  73
  74 handle_irq4:
  75                 jal     ip32_irq4
  76                  move   a0, sp
  77                 j       ret_from_irq
  78                  nop
  79
  80 handle_irq5:
  81                 jal     ip32_irq5
  82                 move    a0, sp
  83                 j       ret_from_irq
  84                  nop
  85
  86                 END(ip32_handle_int)