]> git.ipfire.org Git - people/ms/u-boot.git/blob - arch/powerpc/cpu/mpc512x/serial.c
stdio: Pass device pointer to stdio methods
[people/ms/u-boot.git] / arch / powerpc / cpu / mpc512x / serial.c
1 /*
2 * (C) Copyright 2000 - 2010
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 *
7 * Based ont the MPC5200 PSC driver.
8 * Adapted for MPC512x by Jan Wrobel <wrr@semihalf.com>
9 */
10
11 /*
12 * Minimal serial functions needed to use one of the PSC ports
13 * as serial console interface.
14 */
15
16 #include <common.h>
17 #include <linux/compiler.h>
18 #include <asm/io.h>
19 #include <asm/processor.h>
20 #include <serial.h>
21
22 DECLARE_GLOBAL_DATA_PTR;
23
24 #if defined(CONFIG_PSC_CONSOLE)
25
26 static void fifo_init (volatile psc512x_t *psc)
27 {
28 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
29 u32 tfsize, rfsize;
30
31 /* reset Rx & Tx fifo slice */
32 out_be32(&psc->rfcmd, PSC_FIFO_RESET_SLICE);
33 out_be32(&psc->tfcmd, PSC_FIFO_RESET_SLICE);
34
35 /* disable Tx & Rx FIFO interrupts */
36 out_be32(&psc->rfintmask, 0);
37 out_be32(&psc->tfintmask, 0);
38
39 switch (((u32)psc & 0xf00) >> 8) {
40 case 0:
41 tfsize = FIFOC_PSC0_TX_SIZE | (FIFOC_PSC0_TX_ADDR << 16);
42 rfsize = FIFOC_PSC0_RX_SIZE | (FIFOC_PSC0_RX_ADDR << 16);
43 break;
44 case 1:
45 tfsize = FIFOC_PSC1_TX_SIZE | (FIFOC_PSC1_TX_ADDR << 16);
46 rfsize = FIFOC_PSC1_RX_SIZE | (FIFOC_PSC1_RX_ADDR << 16);
47 break;
48 case 2:
49 tfsize = FIFOC_PSC2_TX_SIZE | (FIFOC_PSC2_TX_ADDR << 16);
50 rfsize = FIFOC_PSC2_RX_SIZE | (FIFOC_PSC2_RX_ADDR << 16);
51 break;
52 case 3:
53 tfsize = FIFOC_PSC3_TX_SIZE | (FIFOC_PSC3_TX_ADDR << 16);
54 rfsize = FIFOC_PSC3_RX_SIZE | (FIFOC_PSC3_RX_ADDR << 16);
55 break;
56 case 4:
57 tfsize = FIFOC_PSC4_TX_SIZE | (FIFOC_PSC4_TX_ADDR << 16);
58 rfsize = FIFOC_PSC4_RX_SIZE | (FIFOC_PSC4_RX_ADDR << 16);
59 break;
60 case 5:
61 tfsize = FIFOC_PSC5_TX_SIZE | (FIFOC_PSC5_TX_ADDR << 16);
62 rfsize = FIFOC_PSC5_RX_SIZE | (FIFOC_PSC5_RX_ADDR << 16);
63 break;
64 case 6:
65 tfsize = FIFOC_PSC6_TX_SIZE | (FIFOC_PSC6_TX_ADDR << 16);
66 rfsize = FIFOC_PSC6_RX_SIZE | (FIFOC_PSC6_RX_ADDR << 16);
67 break;
68 case 7:
69 tfsize = FIFOC_PSC7_TX_SIZE | (FIFOC_PSC7_TX_ADDR << 16);
70 rfsize = FIFOC_PSC7_RX_SIZE | (FIFOC_PSC7_RX_ADDR << 16);
71 break;
72 case 8:
73 tfsize = FIFOC_PSC8_TX_SIZE | (FIFOC_PSC8_TX_ADDR << 16);
74 rfsize = FIFOC_PSC8_RX_SIZE | (FIFOC_PSC8_RX_ADDR << 16);
75 break;
76 case 9:
77 tfsize = FIFOC_PSC9_TX_SIZE | (FIFOC_PSC9_TX_ADDR << 16);
78 rfsize = FIFOC_PSC9_RX_SIZE | (FIFOC_PSC9_RX_ADDR << 16);
79 break;
80 case 10:
81 tfsize = FIFOC_PSC10_TX_SIZE | (FIFOC_PSC10_TX_ADDR << 16);
82 rfsize = FIFOC_PSC10_RX_SIZE | (FIFOC_PSC10_RX_ADDR << 16);
83 break;
84 case 11:
85 tfsize = FIFOC_PSC11_TX_SIZE | (FIFOC_PSC11_TX_ADDR << 16);
86 rfsize = FIFOC_PSC11_RX_SIZE | (FIFOC_PSC11_RX_ADDR << 16);
87 break;
88 default:
89 return;
90 }
91
92 out_be32(&psc->tfsize, tfsize);
93 out_be32(&psc->rfsize, rfsize);
94
95 /* enable Tx & Rx FIFO slice */
96 out_be32(&psc->rfcmd, PSC_FIFO_ENABLE_SLICE);
97 out_be32(&psc->tfcmd, PSC_FIFO_ENABLE_SLICE);
98
99 out_be32(&im->fifoc.fifoc_cmd, FIFOC_DISABLE_CLOCK_GATE);
100 __asm__ volatile ("sync");
101 }
102
103 void serial_setbrg_dev(unsigned int idx)
104 {
105 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
106 volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
107 unsigned long baseclk, div;
108 unsigned long baudrate;
109 char buf[16];
110 char *br_env;
111
112 baudrate = gd->baudrate;
113 if (idx != CONFIG_PSC_CONSOLE) {
114 /* Allows setting baudrate for other serial devices
115 * on PSCx using environment. If not specified, use
116 * the same baudrate as for console.
117 */
118 sprintf(buf, "psc%d_baudrate", idx);
119 br_env = getenv(buf);
120 if (br_env)
121 baudrate = simple_strtoul(br_env, NULL, 10);
122
123 debug("%s: idx %d, baudrate %ld\n", __func__, idx, baudrate);
124 }
125
126 /* calculate divisor for setting PSC CTUR and CTLR registers */
127 baseclk = (gd->arch.ips_clk + 8) / 16;
128 div = (baseclk + (baudrate / 2)) / baudrate;
129
130 out_8(&psc->ctur, (div >> 8) & 0xff);
131 out_8(&psc->ctlr, div & 0xff); /* set baudrate */
132 }
133
134 int serial_init_dev(unsigned int idx)
135 {
136 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
137 volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
138 u32 reg;
139
140 reg = in_be32(&im->clk.sccr[0]);
141 out_be32(&im->clk.sccr[0], reg | CLOCK_SCCR1_PSC_EN(idx));
142
143 fifo_init (psc);
144
145 /* set MR register to point to MR1 */
146 out_8(&psc->command, PSC_SEL_MODE_REG_1);
147
148 /* disable Tx/Rx */
149 out_8(&psc->command, PSC_TX_DISABLE | PSC_RX_DISABLE);
150
151 /* choose the prescaler by 16 for the Tx/Rx clock generation */
152 out_be16(&psc->psc_clock_select, 0xdd00);
153
154 /* switch to UART mode */
155 out_be32(&psc->sicr, 0);
156
157 /* mode register points to mr1 */
158 /* configure parity, bit length and so on in mode register 1*/
159 out_8(&psc->mode, PSC_MODE_8_BITS | PSC_MODE_PARNONE);
160 /* now, mode register points to mr2 */
161 out_8(&psc->mode, PSC_MODE_1_STOPBIT);
162
163 /* set baudrate */
164 serial_setbrg_dev(idx);
165
166 /* disable all interrupts */
167 out_be16(&psc->psc_imr, 0);
168
169 /* reset and enable Rx/Tx */
170 out_8(&psc->command, PSC_RST_RX);
171 out_8(&psc->command, PSC_RST_TX);
172 out_8(&psc->command, PSC_RX_ENABLE | PSC_TX_ENABLE);
173
174 return 0;
175 }
176
177 int serial_uninit_dev(unsigned int idx)
178 {
179 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
180 volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
181 u32 reg;
182
183 out_8(&psc->command, PSC_RX_DISABLE | PSC_TX_DISABLE);
184 reg = in_be32(&im->clk.sccr[0]);
185 reg &= ~CLOCK_SCCR1_PSC_EN(idx);
186 out_be32(&im->clk.sccr[0], reg);
187
188 return 0;
189 }
190
191 void serial_putc_dev(unsigned int idx, const char c)
192 {
193 volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
194 volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
195
196 if (c == '\n')
197 serial_putc_dev(idx, '\r');
198
199 /* Wait for last character to go. */
200 while (!(in_be16(&psc->psc_status) & PSC_SR_TXEMP))
201 ;
202
203 out_8(&psc->tfdata_8, c);
204 }
205
206 void serial_putc_raw_dev(unsigned int idx, const char c)
207 {
208 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
209 volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
210
211 /* Wait for last character to go. */
212 while (!(in_be16(&psc->psc_status) & PSC_SR_TXEMP))
213 ;
214
215 out_8(&psc->tfdata_8, c);
216 }
217
218 void serial_puts_dev(unsigned int idx, const char *s)
219 {
220 while (*s)
221 serial_putc_dev(idx, *s++);
222 }
223
224 int serial_getc_dev(unsigned int idx)
225 {
226 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
227 volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
228
229 /* Wait for a character to arrive. */
230 while (in_be32(&psc->rfstat) & PSC_FIFO_EMPTY)
231 ;
232
233 return in_8(&psc->rfdata_8);
234 }
235
236 int serial_tstc_dev(unsigned int idx)
237 {
238 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
239 volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
240
241 return !(in_be32(&psc->rfstat) & PSC_FIFO_EMPTY);
242 }
243
244 void serial_setrts_dev(unsigned int idx, int s)
245 {
246 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
247 volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
248
249 if (s) {
250 /* Assert RTS (become LOW) */
251 out_8(&psc->op1, 0x1);
252 }
253 else {
254 /* Negate RTS (become HIGH) */
255 out_8(&psc->op0, 0x1);
256 }
257 }
258
259 int serial_getcts_dev(unsigned int idx)
260 {
261 volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
262 volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx];
263
264 return (in_8(&psc->ip) & 0x1) ? 0 : 1;
265 }
266 #endif /* CONFIG_PSC_CONSOLE */
267
268 #define DECLARE_PSC_SERIAL_FUNCTIONS(port) \
269 int serial##port##_init(void) \
270 { \
271 return serial_init_dev(port); \
272 } \
273 int serial##port##_uninit(void) \
274 { \
275 return serial_uninit_dev(port); \
276 } \
277 void serial##port##_setbrg(void) \
278 { \
279 serial_setbrg_dev(port); \
280 } \
281 int serial##port##_getc(void) \
282 { \
283 return serial_getc_dev(port); \
284 } \
285 int serial##port##_tstc(void) \
286 { \
287 return serial_tstc_dev(port); \
288 } \
289 void serial##port##_putc(const char c) \
290 { \
291 serial_putc_dev(port, c); \
292 } \
293 void serial##port##_puts(const char *s) \
294 { \
295 serial_puts_dev(port, s); \
296 }
297
298 #define INIT_PSC_SERIAL_STRUCTURE(port, __name) { \
299 .name = __name, \
300 .start = serial##port##_init, \
301 .stop = serial##port##_uninit, \
302 .setbrg = serial##port##_setbrg, \
303 .getc = serial##port##_getc, \
304 .tstc = serial##port##_tstc, \
305 .putc = serial##port##_putc, \
306 .puts = serial##port##_puts, \
307 }
308
309 #if defined(CONFIG_SYS_PSC1)
310 DECLARE_PSC_SERIAL_FUNCTIONS(1);
311 struct serial_device serial1_device =
312 INIT_PSC_SERIAL_STRUCTURE(1, "psc1");
313 #endif
314
315 #if defined(CONFIG_SYS_PSC3)
316 DECLARE_PSC_SERIAL_FUNCTIONS(3);
317 struct serial_device serial3_device =
318 INIT_PSC_SERIAL_STRUCTURE(3, "psc3");
319 #endif
320
321 #if defined(CONFIG_SYS_PSC4)
322 DECLARE_PSC_SERIAL_FUNCTIONS(4);
323 struct serial_device serial4_device =
324 INIT_PSC_SERIAL_STRUCTURE(4, "psc4");
325 #endif
326
327 #if defined(CONFIG_SYS_PSC6)
328 DECLARE_PSC_SERIAL_FUNCTIONS(6);
329 struct serial_device serial6_device =
330 INIT_PSC_SERIAL_STRUCTURE(6, "psc6");
331 #endif
332
333 __weak struct serial_device *default_serial_console(void)
334 {
335 #if (CONFIG_PSC_CONSOLE == 3)
336 return &serial3_device;
337 #elif (CONFIG_PSC_CONSOLE == 6)
338 return &serial6_device;
339 #else
340 #error "invalid CONFIG_PSC_CONSOLE"
341 #endif
342 }
343
344 void mpc512x_serial_initialize(void)
345 {
346 #if defined(CONFIG_SYS_PSC1)
347 serial_register(&serial1_device);
348 #endif
349 #if defined(CONFIG_SYS_PSC3)
350 serial_register(&serial3_device);
351 #endif
352 #if defined(CONFIG_SYS_PSC4)
353 serial_register(&serial4_device);
354 #endif
355 #if defined(CONFIG_SYS_PSC6)
356 serial_register(&serial6_device);
357 #endif
358 }
359
360 #include <stdio_dev.h>
361 /*
362 * Routines for communication with serial devices over PSC
363 */
364 /* Bitfield for initialized PSCs */
365 static unsigned int initialized;
366
367 struct stdio_dev *open_port(int num, int baudrate)
368 {
369 struct stdio_dev *port;
370 char env_var[16];
371 char env_val[10];
372 char name[7];
373
374 if (num < 0 || num > 11)
375 return NULL;
376
377 sprintf(name, "psc%d", num);
378 port = stdio_get_by_name(name);
379 if (!port)
380 return NULL;
381
382 if (!test_bit(num, &initialized)) {
383 sprintf(env_var, "psc%d_baudrate", num);
384 sprintf(env_val, "%d", baudrate);
385 setenv(env_var, env_val);
386
387 if (port->start(port))
388 return NULL;
389
390 set_bit(num, &initialized);
391 }
392
393 return port;
394 }
395
396 int close_port(int num)
397 {
398 struct stdio_dev *port;
399 int ret;
400 char name[7];
401
402 if (num < 0 || num > 11)
403 return -1;
404
405 sprintf(name, "psc%d", num);
406 port = stdio_get_by_name(name);
407 if (!port)
408 return -1;
409
410 ret = port->stop(port);
411 clear_bit(num, &initialized);
412
413 return ret;
414 }
415
416 int write_port(struct stdio_dev *port, char *buf)
417 {
418 if (!port || !buf)
419 return -1;
420
421 port->puts(port, buf);
422
423 return 0;
424 }
425
426 int read_port(struct stdio_dev *port, char *buf, int size)
427 {
428 int cnt = 0;
429
430 if (!port || !buf)
431 return -1;
432
433 if (!size)
434 return 0;
435
436 while (port->tstc(port)) {
437 buf[cnt++] = port->getc(port);
438 if (cnt > size)
439 break;
440 }
441
442 return cnt;
443 }