arch/powerpc/cpu/mpc5xx/start.S

   1 /*
   2  *  Copyright (C) 1998  Dan Malek <dmalek@jlc.net>
   3  *  Copyright (C) 1999  Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
   4  *  Copyright (C) 2000, 2001, 2002 Wolfgang Denk <wd@denx.de>
   5  *  Copyright (C) 2003  Martin Winistoerfer, martinwinistoerfer@gmx.ch.
   6  *
   7  * See file CREDITS for list of people who contributed to this
   8  * project.
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License as
  12  * published by the Free Software Foundation; either version 2 of
  13  * the License, or (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23  * MA 02111-1307 USA
  24  */
  25
  26 /*
  27  * File:                start.S
  28  *
  29  * Discription:         startup code
  30  *
  31  */
  32
  33 #include <asm-offsets.h>
  34 #include <config.h>
  35 #include <mpc5xx.h>
  36 #include <timestamp.h>
  37 #include <version.h>
  38
  39 #define CONFIG_5xx 1            /* needed for Linux kernel header files */
  40 #define _LINUX_CONFIG_H 1       /* avoid reading Linux autoconf.h file  */
  41
  42 #include <ppc_asm.tmpl>
  43 #include <ppc_defs.h>
  44
  45 #include <linux/config.h>
  46 #include <asm/processor.h>
  47 #include <asm/u-boot.h>
  48
  49 #ifndef  CONFIG_IDENT_STRING
  50 #define  CONFIG_IDENT_STRING ""
  51 #endif
  52
  53 /* We don't have a MMU.
  54 */
  55 #undef  MSR_KERNEL
  56 #define MSR_KERNEL ( MSR_ME | MSR_RI )          /* Machine Check and Recoverable Interr. */
  57
  58 /*
  59  * Set up GOT: Global Offset Table
  60  *
  61  * Use r12 to access the GOT
  62  */
  63         START_GOT
  64         GOT_ENTRY(_GOT2_TABLE_)
  65         GOT_ENTRY(_FIXUP_TABLE_)
  66
  67         GOT_ENTRY(_start)
  68         GOT_ENTRY(_start_of_vectors)
  69         GOT_ENTRY(_end_of_vectors)
  70         GOT_ENTRY(transfer_to_handler)
  71
  72         GOT_ENTRY(__init_end)
  73         GOT_ENTRY(_end)
  74         GOT_ENTRY(__bss_start)
  75         END_GOT
  76
  77 /*
  78  * r3 - 1st arg to board_init(): IMMP pointer
  79  * r4 - 2nd arg to board_init(): boot flag
  80  */
  81         .text
  82         .long   0x27051956                      /* U-Boot Magic Number */
  83         .globl  version_string
  84 version_string:
  85         .ascii U_BOOT_VERSION
  86         .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
  87         .ascii CONFIG_IDENT_STRING, "\0"
  88
  89         . = EXC_OFF_SYS_RESET
  90         .globl  _start
  91 _start:
  92         mfspr   r3, 638
  93         li      r4, CONFIG_SYS_ISB                      /* Set ISB bit */
  94         or      r3, r3, r4
  95         mtspr   638, r3
  96
  97         /* Initialize machine status; enable machine check interrupt            */
  98         /*----------------------------------------------------------------------*/
  99         li      r3, MSR_KERNEL                  /* Set ME, RI flags */
 100         mtmsr   r3
 101         mtspr   SRR1, r3                        /* Make SRR1 match MSR */
 102
 103         /* Initialize debug port registers                                      */
 104         /*----------------------------------------------------------------------*/
 105         xor     r0, r0, r0                      /* Clear R0 */
 106         mtspr   LCTRL1, r0                      /* Initialize debug port regs */
 107         mtspr   LCTRL2, r0
 108         mtspr   COUNTA, r0
 109         mtspr   COUNTB, r0
 110
 111 #if defined(CONFIG_PATI)
 112         /* the external flash access on PATI fails if programming the PLL to 40MHz.
 113          * Copy the PLL programming code to the internal RAM and execute it
 114          *----------------------------------------------------------------------*/
 115         lis     r3, CONFIG_SYS_MONITOR_BASE@h
 116         ori     r3, r3, CONFIG_SYS_MONITOR_BASE@l
 117         addi    r3, r3, pll_prog_code_start - _start + EXC_OFF_SYS_RESET
 118
 119         lis     r4, CONFIG_SYS_INIT_RAM_ADDR@h
 120         ori     r4, r4, CONFIG_SYS_INIT_RAM_ADDR@l
 121         mtlr    r4
 122         addis   r5,0,0x0
 123         ori     r5,r5,((pll_prog_code_end - pll_prog_code_start) >>2)
 124         mtctr   r5
 125         addi    r3, r3, -4
 126         addi    r4, r4, -4
 127 0:
 128         lwzu    r0,4(r3)
 129         stwu    r0,4(r4)
 130         bdnz    0b                /* copy loop */
 131         blrl
 132 #endif
 133
 134         /*
 135          * Calculate absolute address in FLASH and jump there
 136          *----------------------------------------------------------------------*/
 137
 138         lis     r3, CONFIG_SYS_MONITOR_BASE@h
 139         ori     r3, r3, CONFIG_SYS_MONITOR_BASE@l
 140         addi    r3, r3, in_flash - _start + EXC_OFF_SYS_RESET
 141         mtlr    r3
 142         blr
 143
 144 in_flash:
 145
 146         /* Initialize some SPRs that are hard to access from C                  */
 147         /*----------------------------------------------------------------------*/
 148
 149         lis     r3, CONFIG_SYS_IMMR@h                   /* Pass IMMR as arg1 to C routine */
 150         lis     r2, CONFIG_SYS_INIT_SP_ADDR@h
 151         ori     r1, r2, CONFIG_SYS_INIT_SP_ADDR@l       /* Set up the stack in internal SRAM */
 152         /* Note: R0 is still 0 here */
 153         stwu    r0, -4(r1)                      /* Clear final stack frame so that      */
 154         stwu    r0, -4(r1)                      /* stack backtraces terminate cleanly   */
 155
 156         /*
 157          * Disable serialized ifetch and show cycles
 158          * (i.e. set processor to normal mode) for maximum
 159          * performance.
 160          */
 161
 162         li      r2, 0x0007
 163         mtspr   ICTRL, r2
 164
 165         /* Set up debug mode entry */
 166
 167         lis     r2, CONFIG_SYS_DER@h
 168         ori     r2, r2, CONFIG_SYS_DER@l
 169         mtspr   DER, r2
 170
 171         /* Let the C-code set up the rest                                       */
 172         /*                                                                      */
 173         /* Be careful to keep code relocatable !                                */
 174         /*----------------------------------------------------------------------*/
 175
 176         GET_GOT                 /* initialize GOT access                        */
 177
 178         /* r3: IMMR */
 179         bl      cpu_init_f      /* run low-level CPU init code     (from Flash) */
 180
 181         bl      board_init_f    /* run 1st part of board init code (from Flash) */
 182
 183         /* NOTREACHED - board_init_f() does not return */
 184
 185
 186         .globl  _start_of_vectors
 187 _start_of_vectors:
 188
 189 /* Machine check */
 190         STD_EXCEPTION(0x200, MachineCheck, MachineCheckException)
 191
 192 /* Data Storage exception.  "Never" generated on the 860. */
 193         STD_EXCEPTION(0x300, DataStorage, UnknownException)
 194
 195 /* Instruction Storage exception.  "Never" generated on the 860. */
 196         STD_EXCEPTION(0x400, InstStorage, UnknownException)
 197
 198 /* External Interrupt exception. */
 199         STD_EXCEPTION(0x500, ExtInterrupt, external_interrupt)
 200
 201 /* Alignment exception. */
 202         . = 0x600
 203 Alignment:
 204         EXCEPTION_PROLOG(SRR0, SRR1)
 205         mfspr   r4,DAR
 206         stw     r4,_DAR(r21)
 207         mfspr   r5,DSISR
 208         stw     r5,_DSISR(r21)
 209         addi    r3,r1,STACK_FRAME_OVERHEAD
 210         EXC_XFER_TEMPLATE(Alignment, AlignmentException, MSR_KERNEL, COPY_EE)
 211
 212 /* Program check exception */
 213         . = 0x700
 214 ProgramCheck:
 215         EXCEPTION_PROLOG(SRR0, SRR1)
 216         addi    r3,r1,STACK_FRAME_OVERHEAD
 217         EXC_XFER_TEMPLATE(ProgramCheck, ProgramCheckException,
 218                 MSR_KERNEL, COPY_EE)
 219
 220         /* FPU on MPC5xx available. We will use it later.
 221         */
 222         STD_EXCEPTION(0x800, FPUnavailable, UnknownException)
 223
 224         /* I guess we could implement decrementer, and may have
 225          * to someday for timekeeping.
 226          */
 227         STD_EXCEPTION(0x900, Decrementer, timer_interrupt)
 228         STD_EXCEPTION(0xa00, Trap_0a, UnknownException)
 229         STD_EXCEPTION(0xb00, Trap_0b, UnknownException)
 230         STD_EXCEPTION(0xc00, SystemCall, UnknownException)
 231         STD_EXCEPTION(0xd00, SingleStep, UnknownException)
 232
 233         STD_EXCEPTION(0xe00, Trap_0e, UnknownException)
 234         STD_EXCEPTION(0xf00, Trap_0f, UnknownException)
 235
 236         /* On the MPC8xx, this is a software emulation interrupt.  It occurs
 237          * for all unimplemented and illegal instructions.
 238          */
 239         STD_EXCEPTION(0x1000, SoftEmu, SoftEmuException)
 240         STD_EXCEPTION(0x1100, InstructionTLBMiss, UnknownException)
 241         STD_EXCEPTION(0x1200, DataTLBMiss, UnknownException)
 242         STD_EXCEPTION(0x1300, InstructionTLBError, UnknownException)
 243         STD_EXCEPTION(0x1400, DataTLBError, UnknownException)
 244
 245         STD_EXCEPTION(0x1500, Reserved5, UnknownException)
 246         STD_EXCEPTION(0x1600, Reserved6, UnknownException)
 247         STD_EXCEPTION(0x1700, Reserved7, UnknownException)
 248         STD_EXCEPTION(0x1800, Reserved8, UnknownException)
 249         STD_EXCEPTION(0x1900, Reserved9, UnknownException)
 250         STD_EXCEPTION(0x1a00, ReservedA, UnknownException)
 251         STD_EXCEPTION(0x1b00, ReservedB, UnknownException)
 252
 253         STD_EXCEPTION(0x1c00, DataBreakpoint, UnknownException)
 254         STD_EXCEPTION(0x1d00, InstructionBreakpoint, DebugException)
 255         STD_EXCEPTION(0x1e00, PeripheralBreakpoint, UnknownException)
 256         STD_EXCEPTION(0x1f00, DevPortBreakpoint, UnknownException)
 257
 258
 259         .globl  _end_of_vectors
 260 _end_of_vectors:
 261
 262
 263         . = 0x2000
 264
 265 /*
 266  * This code finishes saving the registers to the exception frame
 267  * and jumps to the appropriate handler for the exception.
 268  * Register r21 is pointer into trap frame, r1 has new stack pointer.
 269  */
 270         .globl  transfer_to_handler
 271 transfer_to_handler:
 272         stw     r22,_NIP(r21)
 273         lis     r22,MSR_POW@h
 274         andc    r23,r23,r22
 275         stw     r23,_MSR(r21)
 276         SAVE_GPR(7, r21)
 277         SAVE_4GPRS(8, r21)
 278         SAVE_8GPRS(12, r21)
 279         SAVE_8GPRS(24, r21)
 280         mflr    r23
 281         andi.   r24,r23,0x3f00          /* get vector offset */
 282         stw     r24,TRAP(r21)
 283         li      r22,0
 284         stw     r22,RESULT(r21)
 285         mtspr   SPRG2,r22               /* r1 is now kernel sp */
 286         lwz     r24,0(r23)              /* virtual address of handler */
 287         lwz     r23,4(r23)              /* where to go when done */
 288         mtspr   SRR0,r24
 289         mtspr   SRR1,r20
 290         mtlr    r23
 291         SYNC
 292         rfi                             /* jump to handler, enable MMU */
 293
 294 int_return:
 295         mfmsr   r28                     /* Disable interrupts */
 296         li      r4,0
 297         ori     r4,r4,MSR_EE
 298         andc    r28,r28,r4
 299         SYNC                            /* Some chip revs need this... */
 300         mtmsr   r28
 301         SYNC
 302         lwz     r2,_CTR(r1)
 303         lwz     r0,_LINK(r1)
 304         mtctr   r2
 305         mtlr    r0
 306         lwz     r2,_XER(r1)
 307         lwz     r0,_CCR(r1)
 308         mtspr   XER,r2
 309         mtcrf   0xFF,r0
 310         REST_10GPRS(3, r1)
 311         REST_10GPRS(13, r1)
 312         REST_8GPRS(23, r1)
 313         REST_GPR(31, r1)
 314         lwz     r2,_NIP(r1)             /* Restore environment */
 315         lwz     r0,_MSR(r1)
 316         mtspr   SRR0,r2
 317         mtspr   SRR1,r0
 318         lwz     r0,GPR0(r1)
 319         lwz     r2,GPR2(r1)
 320         lwz     r1,GPR1(r1)
 321         SYNC
 322         rfi
 323
 324
 325 /*
 326  * unsigned int get_immr (unsigned int mask)
 327  *
 328  * return (mask ? (IMMR & mask) : IMMR);
 329  */
 330         .globl  get_immr
 331 get_immr:
 332         mr      r4,r3           /* save mask */
 333         mfspr   r3, IMMR        /* IMMR */
 334         cmpwi   0,r4,0          /* mask != 0 ? */
 335         beq     4f
 336         and     r3,r3,r4        /* IMMR & mask */
 337 4:
 338         blr
 339
 340         .globl get_pvr
 341 get_pvr:
 342         mfspr   r3, PVR
 343         blr
 344
 345
 346 /*------------------------------------------------------------------------------*/
 347
 348 /*
 349  * void relocate_code (addr_sp, gd, addr_moni)
 350  *
 351  * This "function" does not return, instead it continues in RAM
 352  * after relocating the monitor code.
 353  *
 354  * r3 = dest
 355  * r4 = src
 356  * r5 = length in bytes
 357  * r6 = cachelinesize
 358  */
 359         .globl  relocate_code
 360 relocate_code:
 361         mr      r1,  r3         /* Set new stack pointer in SRAM        */
 362         mr      r9,  r4         /* Save copy of global data pointer in SRAM */
 363         mr      r10, r5         /* Save copy of monitor destination Address in SRAM */
 364
 365         GET_GOT
 366         mr      r3,  r5                         /* Destination Address  */
 367         lis     r4, CONFIG_SYS_MONITOR_BASE@h           /* Source      Address  */
 368         ori     r4, r4, CONFIG_SYS_MONITOR_BASE@l
 369         lwz     r5, GOT(__init_end)
 370         sub     r5, r5, r4
 371
 372         /*
 373          * Fix GOT pointer:
 374          *
 375          * New GOT-PTR = (old GOT-PTR - CONFIG_SYS_MONITOR_BASE) + Destination Address
 376          *
 377          * Offset:
 378          */
 379         sub     r15, r10, r4
 380
 381         /* First our own GOT */
 382         add     r12, r12, r15
 383         /* the the one used by the C code */
 384         add     r30, r30, r15
 385
 386         /*
 387          * Now relocate code
 388          */
 389
 390         cmplw   cr1,r3,r4
 391         addi    r0,r5,3
 392         srwi.   r0,r0,2
 393         beq     cr1,4f          /* In place copy is not necessary       */
 394         beq     4f              /* Protect against 0 count              */
 395         mtctr   r0
 396         bge     cr1,2f
 397
 398         la      r8,-4(r4)
 399         la      r7,-4(r3)
 400 1:      lwzu    r0,4(r8)
 401         stwu    r0,4(r7)
 402         bdnz    1b
 403         b       4f
 404
 405 2:      slwi    r0,r0,2
 406         add     r8,r4,r0
 407         add     r7,r3,r0
 408 3:      lwzu    r0,-4(r8)
 409         stwu    r0,-4(r7)
 410         bdnz    3b
 411
 412 4:      sync
 413         isync
 414
 415 /*
 416  * We are done. Do not return, instead branch to second part of board
 417  * initialization, now running from RAM.
 418  */
 419
 420         addi    r0, r10, in_ram - _start + EXC_OFF_SYS_RESET
 421         mtlr    r0
 422         blr
 423
 424 in_ram:
 425
 426         /*
 427          * Relocation Function, r12 point to got2+0x8000
 428          *
 429          * Adjust got2 pointers, no need to check for 0, this code
 430          * already puts a few entries in the table.
 431          */
 432         li      r0,__got2_entries@sectoff@l
 433         la      r3,GOT(_GOT2_TABLE_)
 434         lwz     r11,GOT(_GOT2_TABLE_)
 435         mtctr   r0
 436         sub     r11,r3,r11
 437         addi    r3,r3,-4
 438 1:      lwzu    r0,4(r3)
 439         cmpwi   r0,0
 440         beq-    2f
 441         add     r0,r0,r11
 442         stw     r0,0(r3)
 443 2:      bdnz    1b
 444
 445         /*
 446          * Now adjust the fixups and the pointers to the fixups
 447          * in case we need to move ourselves again.
 448          */
 449         li      r0,__fixup_entries@sectoff@l
 450         lwz     r3,GOT(_FIXUP_TABLE_)
 451         cmpwi   r0,0
 452         mtctr   r0
 453         addi    r3,r3,-4
 454         beq     4f
 455 3:      lwzu    r4,4(r3)
 456         lwzux   r0,r4,r11
 457         cmpwi   r0,0
 458         add     r0,r0,r11
 459         stw     r4,0(r3)
 460         beq-    5f
 461         stw     r0,0(r4)
 462 5:      bdnz    3b
 463 4:
 464 clear_bss:
 465         /*
 466          * Now clear BSS segment
 467          */
 468         lwz     r3,GOT(__bss_start)
 469         lwz     r4,GOT(_end)
 470         cmplw   0, r3, r4
 471         beq     6f
 472
 473         li      r0, 0
 474 5:
 475         stw     r0, 0(r3)
 476         addi    r3, r3, 4
 477         cmplw   0, r3, r4
 478         bne     5b
 479 6:
 480
 481         mr      r3, r9          /* Global Data pointer          */
 482         mr      r4, r10         /* Destination Address          */
 483         bl      board_init_r
 484
 485         /*
 486          * Copy exception vector code to low memory
 487          *
 488          * r3: dest_addr
 489          * r7: source address, r8: end address, r9: target address
 490          */
 491         .globl  trap_init
 492 trap_init:
 493         mflr    r4                      /* save link register           */
 494         GET_GOT
 495         lwz     r7, GOT(_start)
 496         lwz     r8, GOT(_end_of_vectors)
 497
 498         li      r9, 0x100               /* reset vector always at 0x100 */
 499
 500         cmplw   0, r7, r8
 501         bgelr                           /* return if r7>=r8 - just in case */
 502 1:
 503         lwz     r0, 0(r7)
 504         stw     r0, 0(r9)
 505         addi    r7, r7, 4
 506         addi    r9, r9, 4
 507         cmplw   0, r7, r8
 508         bne     1b
 509
 510         /*
 511          * relocate `hdlr' and `int_return' entries
 512          */
 513         li      r7, .L_MachineCheck - _start + EXC_OFF_SYS_RESET
 514         li      r8, Alignment - _start + EXC_OFF_SYS_RESET
 515 2:
 516         bl      trap_reloc
 517         addi    r7, r7, 0x100           /* next exception vector        */
 518         cmplw   0, r7, r8
 519         blt     2b
 520
 521         li      r7, .L_Alignment - _start + EXC_OFF_SYS_RESET
 522         bl      trap_reloc
 523
 524         li      r7, .L_ProgramCheck - _start + EXC_OFF_SYS_RESET
 525         bl      trap_reloc
 526
 527         li      r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET
 528         li      r8, SystemCall - _start + EXC_OFF_SYS_RESET
 529 3:
 530         bl      trap_reloc
 531         addi    r7, r7, 0x100           /* next exception vector        */
 532         cmplw   0, r7, r8
 533         blt     3b
 534
 535         li      r7, .L_SingleStep - _start + EXC_OFF_SYS_RESET
 536         li      r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
 537 4:
 538         bl      trap_reloc
 539         addi    r7, r7, 0x100           /* next exception vector        */
 540         cmplw   0, r7, r8
 541         blt     4b
 542
 543         mtlr    r4                      /* restore link register        */
 544         blr
 545
 546 #if defined(CONFIG_PATI)
 547 /* Program the PLL */
 548 pll_prog_code_start:
 549         lis     r4, (CONFIG_SYS_IMMR + 0x002fc384)@h
 550         ori     r4, r4, (CONFIG_SYS_IMMR + 0x002fc384)@l
 551         lis     r3, (0x55ccaa33)@h
 552         ori     r3, r3, (0x55ccaa33)@l
 553         stw     r3, 0(r4)
 554         lis     r4, (CONFIG_SYS_IMMR + 0x002fc284)@h
 555         ori     r4, r4, (CONFIG_SYS_IMMR + 0x002fc284)@l
 556         lis     r3, CONFIG_SYS_PLPRCR@h
 557         ori     r3, r3, CONFIG_SYS_PLPRCR@l
 558         stw     r3, 0(r4)
 559         addis   r3,0,0x0
 560         ori     r3,r3,0xA000
 561         mtctr   r3
 562 ..spinlp:
 563   bdnz    ..spinlp                /* spin loop */
 564         blr
 565 pll_prog_code_end:
 566         nop
 567         blr
 568 #endif