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git.ipfire.org Git - people/ms/u-boot.git/blob - arch/powerpc/cpu/mpc5xxx/usb_ohci.c
2 * URB OHCI HCD (Host Controller Driver) for USB on the MPC5200.
4 * (C) Copyright 2003-2004
5 * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
8 * Pierre Aubert, Staubli Faverges <p.aubert@staubli.com>
10 * Note: Much of this code has been derived from Linux 2.4
11 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
12 * (C) Copyright 2000-2002 David Brownell
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
35 * 1 - this driver is intended for use with USB Mass Storage Devices
36 * (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
41 #ifdef CONFIG_USB_OHCI
49 #define OHCI_USE_NPS /* force NoPowerSwitching mode */
50 #undef OHCI_VERBOSE_DEBUG /* not always helpful */
53 #undef OHCI_FILL_TRACE
55 /* For initializing controller (mask in an HCFS mode too) */
56 #define OHCI_CONTROL_INIT \
57 (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
59 #define readl(a) (*((volatile u32 *)(a)))
60 #define writel(a, b) (*((volatile u32 *)(b)) = ((volatile u32)a))
62 #define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
65 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
67 #define dbg(format, arg...) do {} while(0)
69 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
71 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
73 #define info(format, arg...) do {} while(0)
76 #define m16_swap(x) swap_16(x)
77 #define m32_swap(x) swap_32(x)
79 #define ohci_cpu_to_le16(x) (x)
80 #define ohci_cpu_to_le32(x) (x)
84 /* this must be aligned to a 256 byte boundary */
85 struct ohci_hcca ghcca
[1];
86 /* a pointer to the aligned storage */
87 struct ohci_hcca
*phcca
;
88 /* this allocates EDs for all possible endpoints */
89 struct ohci_device ohci_dev
;
94 /* device which was disconnected */
95 struct usb_device
*devgone
;
96 /* flag guarding URB transation */
99 /*-------------------------------------------------------------------------*/
101 /* AMD-756 (D2 rev) reports corrupt register contents in some cases.
102 * The erratum (#4) description is incorrect. AMD's workaround waits
103 * till some bits (mostly reserved) are clear; ok for all revs.
105 #define OHCI_QUIRK_AMD756 0xabcd
106 #define read_roothub(hc, register, mask) ({ \
107 u32 temp = readl (&hc->regs->roothub.register); \
108 if (hc->flags & OHCI_QUIRK_AMD756) \
109 while (temp & mask) \
110 temp = readl (&hc->regs->roothub.register); \
113 static u32
roothub_a (struct ohci
*hc
)
114 { return read_roothub (hc
, a
, 0xfc0fe000); }
115 static inline u32
roothub_b (struct ohci
*hc
)
116 { return readl (&hc
->regs
->roothub
.b
); }
117 static inline u32
roothub_status (struct ohci
*hc
)
118 { return readl (&hc
->regs
->roothub
.status
); }
119 static u32
roothub_portstatus (struct ohci
*hc
, int i
)
120 { return read_roothub (hc
, portstatus
[i
], 0xffe0fce0); }
123 /* forward declaration */
124 static int hc_interrupt (void);
126 td_submit_job (struct usb_device
* dev
, unsigned long pipe
, void * buffer
,
127 int transfer_len
, struct devrequest
* setup
, urb_priv_t
* urb
, int interval
);
129 /*-------------------------------------------------------------------------*
130 * URB support functions
131 *-------------------------------------------------------------------------*/
133 /* free HCD-private data associated with this URB */
135 static void urb_free_priv (urb_priv_t
* urb
)
141 last
= urb
->length
- 1;
143 for (i
= 0; i
<= last
; i
++) {
153 /*-------------------------------------------------------------------------*/
156 static int sohci_get_current_frame_number (struct usb_device
* dev
);
158 /* debug| print the main components of an URB
159 * small: 0) header + data packets 1) just header */
161 static void pkt_print (struct usb_device
* dev
, unsigned long pipe
, void * buffer
,
162 int transfer_len
, struct devrequest
* setup
, char * str
, int small
)
164 urb_priv_t
* purb
= &urb_priv
;
166 dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
168 sohci_get_current_frame_number (dev
),
169 usb_pipedevice (pipe
),
170 usb_pipeendpoint (pipe
),
171 usb_pipeout (pipe
)? 'O': 'I',
172 usb_pipetype (pipe
) < 2? (usb_pipeint (pipe
)? "INTR": "ISOC"):
173 (usb_pipecontrol (pipe
)? "CTRL": "BULK"),
175 transfer_len
, dev
->status
);
176 #ifdef OHCI_VERBOSE_DEBUG
180 if (usb_pipecontrol (pipe
)) {
181 printf (__FILE__
": cmd(8):");
182 for (i
= 0; i
< 8 ; i
++)
183 printf (" %02x", ((__u8
*) setup
) [i
]);
186 if (transfer_len
> 0 && buffer
) {
187 printf (__FILE__
": data(%d/%d):",
190 len
= usb_pipeout (pipe
)?
191 transfer_len
: purb
->actual_length
;
192 for (i
= 0; i
< 16 && i
< len
; i
++)
193 printf (" %02x", ((__u8
*) buffer
) [i
]);
194 printf ("%s\n", i
< len
? "...": "");
200 /* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
201 void ep_print_int_eds (ohci_t
*ohci
, char * str
) {
204 for (i
= 0; i
< 32; i
++) {
206 ed_p
= &(ohci
->hcca
->int_table
[i
]);
209 printf (__FILE__
": %s branch int %2d(%2x):", str
, i
, i
);
210 while (*ed_p
!= 0 && j
--) {
211 ed_t
*ed
= (ed_t
*)ohci_cpu_to_le32(ed_p
);
212 printf (" ed: %4x;", ed
->hwINFO
);
213 ed_p
= &ed
->hwNextED
;
219 static void ohci_dump_intr_mask (char *label
, __u32 mask
)
221 dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
224 (mask
& OHCI_INTR_MIE
) ? " MIE" : "",
225 (mask
& OHCI_INTR_OC
) ? " OC" : "",
226 (mask
& OHCI_INTR_RHSC
) ? " RHSC" : "",
227 (mask
& OHCI_INTR_FNO
) ? " FNO" : "",
228 (mask
& OHCI_INTR_UE
) ? " UE" : "",
229 (mask
& OHCI_INTR_RD
) ? " RD" : "",
230 (mask
& OHCI_INTR_SF
) ? " SF" : "",
231 (mask
& OHCI_INTR_WDH
) ? " WDH" : "",
232 (mask
& OHCI_INTR_SO
) ? " SO" : ""
236 static void maybe_print_eds (char *label
, __u32 value
)
238 ed_t
*edp
= (ed_t
*)value
;
241 dbg ("%s %08x", label
, value
);
242 dbg ("%08x", edp
->hwINFO
);
243 dbg ("%08x", edp
->hwTailP
);
244 dbg ("%08x", edp
->hwHeadP
);
245 dbg ("%08x", edp
->hwNextED
);
249 static char * hcfs2string (int state
)
252 case OHCI_USB_RESET
: return "reset";
253 case OHCI_USB_RESUME
: return "resume";
254 case OHCI_USB_OPER
: return "operational";
255 case OHCI_USB_SUSPEND
: return "suspend";
260 /* dump control and status registers */
261 static void ohci_dump_status (ohci_t
*controller
)
263 struct ohci_regs
*regs
= controller
->regs
;
266 temp
= readl (®s
->revision
) & 0xff;
268 dbg ("spec %d.%d", (temp
>> 4), (temp
& 0x0f));
270 temp
= readl (®s
->control
);
271 dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp
,
272 (temp
& OHCI_CTRL_RWE
) ? " RWE" : "",
273 (temp
& OHCI_CTRL_RWC
) ? " RWC" : "",
274 (temp
& OHCI_CTRL_IR
) ? " IR" : "",
275 hcfs2string (temp
& OHCI_CTRL_HCFS
),
276 (temp
& OHCI_CTRL_BLE
) ? " BLE" : "",
277 (temp
& OHCI_CTRL_CLE
) ? " CLE" : "",
278 (temp
& OHCI_CTRL_IE
) ? " IE" : "",
279 (temp
& OHCI_CTRL_PLE
) ? " PLE" : "",
280 temp
& OHCI_CTRL_CBSR
283 temp
= readl (®s
->cmdstatus
);
284 dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp
,
285 (temp
& OHCI_SOC
) >> 16,
286 (temp
& OHCI_OCR
) ? " OCR" : "",
287 (temp
& OHCI_BLF
) ? " BLF" : "",
288 (temp
& OHCI_CLF
) ? " CLF" : "",
289 (temp
& OHCI_HCR
) ? " HCR" : ""
292 ohci_dump_intr_mask ("intrstatus", readl (®s
->intrstatus
));
293 ohci_dump_intr_mask ("intrenable", readl (®s
->intrenable
));
295 maybe_print_eds ("ed_periodcurrent", readl (®s
->ed_periodcurrent
));
297 maybe_print_eds ("ed_controlhead", readl (®s
->ed_controlhead
));
298 maybe_print_eds ("ed_controlcurrent", readl (®s
->ed_controlcurrent
));
300 maybe_print_eds ("ed_bulkhead", readl (®s
->ed_bulkhead
));
301 maybe_print_eds ("ed_bulkcurrent", readl (®s
->ed_bulkcurrent
));
303 maybe_print_eds ("donehead", readl (®s
->donehead
));
306 static void ohci_dump_roothub (ohci_t
*controller
, int verbose
)
310 temp
= roothub_a (controller
);
311 ndp
= (temp
& RH_A_NDP
);
314 dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp
,
315 ((temp
& RH_A_POTPGT
) >> 24) & 0xff,
316 (temp
& RH_A_NOCP
) ? " NOCP" : "",
317 (temp
& RH_A_OCPM
) ? " OCPM" : "",
318 (temp
& RH_A_DT
) ? " DT" : "",
319 (temp
& RH_A_NPS
) ? " NPS" : "",
320 (temp
& RH_A_PSM
) ? " PSM" : "",
323 temp
= roothub_b (controller
);
324 dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
326 (temp
& RH_B_PPCM
) >> 16,
329 temp
= roothub_status (controller
);
330 dbg ("roothub.status: %08x%s%s%s%s%s%s",
332 (temp
& RH_HS_CRWE
) ? " CRWE" : "",
333 (temp
& RH_HS_OCIC
) ? " OCIC" : "",
334 (temp
& RH_HS_LPSC
) ? " LPSC" : "",
335 (temp
& RH_HS_DRWE
) ? " DRWE" : "",
336 (temp
& RH_HS_OCI
) ? " OCI" : "",
337 (temp
& RH_HS_LPS
) ? " LPS" : ""
341 for (i
= 0; i
< ndp
; i
++) {
342 temp
= roothub_portstatus (controller
, i
);
343 dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
346 (temp
& RH_PS_PRSC
) ? " PRSC" : "",
347 (temp
& RH_PS_OCIC
) ? " OCIC" : "",
348 (temp
& RH_PS_PSSC
) ? " PSSC" : "",
349 (temp
& RH_PS_PESC
) ? " PESC" : "",
350 (temp
& RH_PS_CSC
) ? " CSC" : "",
352 (temp
& RH_PS_LSDA
) ? " LSDA" : "",
353 (temp
& RH_PS_PPS
) ? " PPS" : "",
354 (temp
& RH_PS_PRS
) ? " PRS" : "",
355 (temp
& RH_PS_POCI
) ? " POCI" : "",
356 (temp
& RH_PS_PSS
) ? " PSS" : "",
358 (temp
& RH_PS_PES
) ? " PES" : "",
359 (temp
& RH_PS_CCS
) ? " CCS" : ""
364 static void ohci_dump (ohci_t
*controller
, int verbose
)
366 dbg ("OHCI controller usb-%s state", controller
->slot_name
);
368 /* dumps some of the state we know about */
369 ohci_dump_status (controller
);
371 ep_print_int_eds (controller
, "hcca");
372 dbg ("hcca frame #%04x", controller
->hcca
->frame_no
);
373 ohci_dump_roothub (controller
, 1);
379 /*-------------------------------------------------------------------------*
380 * Interface functions (URB)
381 *-------------------------------------------------------------------------*/
383 /* get a transfer request */
385 int sohci_submit_job(struct usb_device
*dev
, unsigned long pipe
, void *buffer
,
386 int transfer_len
, struct devrequest
*setup
, int interval
)
390 urb_priv_t
*purb_priv
;
395 /* when controller's hung, permit only roothub cleanup attempts
396 * such as powering down ports */
397 if (ohci
->disabled
) {
398 err("sohci_submit_job: EPIPE");
402 /* if we have an unfinished URB from previous transaction let's
403 * fail and scream as quickly as possible so as not to corrupt
404 * further communication */
406 err("sohci_submit_job: URB NOT FINISHED");
409 /* we're about to begin a new transaction here so mark the URB unfinished */
412 /* every endpoint has a ed, locate and fill it */
413 if (!(ed
= ep_add_ed (dev
, pipe
))) {
414 err("sohci_submit_job: ENOMEM");
418 /* for the private part of the URB we need the number of TDs (size) */
419 switch (usb_pipetype (pipe
)) {
420 case PIPE_BULK
: /* one TD for every 4096 Byte */
421 size
= (transfer_len
- 1) / 4096 + 1;
423 case PIPE_CONTROL
: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
424 size
= (transfer_len
== 0)? 2:
425 (transfer_len
- 1) / 4096 + 3;
429 if (size
>= (N_URB_TD
- 1)) {
430 err("need %d TDs, only have %d", size
, N_URB_TD
);
433 purb_priv
= &urb_priv
;
434 purb_priv
->pipe
= pipe
;
436 /* fill the private part of the URB */
437 purb_priv
->length
= size
;
439 purb_priv
->actual_length
= 0;
441 /* allocate the TDs */
442 /* note that td[0] was allocated in ep_add_ed */
443 for (i
= 0; i
< size
; i
++) {
444 purb_priv
->td
[i
] = td_alloc (dev
);
445 if (!purb_priv
->td
[i
]) {
446 purb_priv
->length
= i
;
447 urb_free_priv (purb_priv
);
448 err("sohci_submit_job: ENOMEM");
453 if (ed
->state
== ED_NEW
|| (ed
->state
& ED_DEL
)) {
454 urb_free_priv (purb_priv
);
455 err("sohci_submit_job: EINVAL");
459 /* link the ed into a chain if is not already */
460 if (ed
->state
!= ED_OPER
)
463 /* fill the TDs and link it to the ed */
464 td_submit_job(dev
, pipe
, buffer
, transfer_len
, setup
, purb_priv
, interval
);
469 /*-------------------------------------------------------------------------*/
472 /* tell us the current USB frame number */
474 static int sohci_get_current_frame_number (struct usb_device
*usb_dev
)
476 ohci_t
*ohci
= &gohci
;
478 return ohci_cpu_to_le16 (ohci
->hcca
->frame_no
);
482 /*-------------------------------------------------------------------------*
483 * ED handling functions
484 *-------------------------------------------------------------------------*/
486 /* link an ed into one of the HC chains */
488 static int ep_link (ohci_t
*ohci
, ed_t
*edi
)
490 volatile ed_t
*ed
= edi
;
497 if (ohci
->ed_controltail
== NULL
) {
498 writel (ed
, &ohci
->regs
->ed_controlhead
);
500 ohci
->ed_controltail
->hwNextED
= ohci_cpu_to_le32 ((unsigned long)ed
);
502 ed
->ed_prev
= ohci
->ed_controltail
;
503 if (!ohci
->ed_controltail
&& !ohci
->ed_rm_list
[0] &&
504 !ohci
->ed_rm_list
[1] && !ohci
->sleeping
) {
505 ohci
->hc_control
|= OHCI_CTRL_CLE
;
506 writel (ohci
->hc_control
, &ohci
->regs
->control
);
508 ohci
->ed_controltail
= edi
;
513 if (ohci
->ed_bulktail
== NULL
) {
514 writel (ed
, &ohci
->regs
->ed_bulkhead
);
516 ohci
->ed_bulktail
->hwNextED
= ohci_cpu_to_le32 ((unsigned long)ed
);
518 ed
->ed_prev
= ohci
->ed_bulktail
;
519 if (!ohci
->ed_bulktail
&& !ohci
->ed_rm_list
[0] &&
520 !ohci
->ed_rm_list
[1] && !ohci
->sleeping
) {
521 ohci
->hc_control
|= OHCI_CTRL_BLE
;
522 writel (ohci
->hc_control
, &ohci
->regs
->control
);
524 ohci
->ed_bulktail
= edi
;
530 /*-------------------------------------------------------------------------*/
532 /* unlink an ed from one of the HC chains.
533 * just the link to the ed is unlinked.
534 * the link from the ed still points to another operational ed or 0
535 * so the HC can eventually finish the processing of the unlinked ed */
537 static int ep_unlink (ohci_t
*ohci
, ed_t
*edi
)
539 volatile ed_t
*ed
= edi
;
541 ed
->hwINFO
|= ohci_cpu_to_le32 (OHCI_ED_SKIP
);
545 if (ed
->ed_prev
== NULL
) {
547 ohci
->hc_control
&= ~OHCI_CTRL_CLE
;
548 writel (ohci
->hc_control
, &ohci
->regs
->control
);
550 writel (ohci_cpu_to_le32 (*((__u32
*)&ed
->hwNextED
)), &ohci
->regs
->ed_controlhead
);
552 ed
->ed_prev
->hwNextED
= ed
->hwNextED
;
554 if (ohci
->ed_controltail
== ed
) {
555 ohci
->ed_controltail
= ed
->ed_prev
;
557 ((ed_t
*)ohci_cpu_to_le32 (*((__u32
*)&ed
->hwNextED
)))->ed_prev
= ed
->ed_prev
;
562 if (ed
->ed_prev
== NULL
) {
564 ohci
->hc_control
&= ~OHCI_CTRL_BLE
;
565 writel (ohci
->hc_control
, &ohci
->regs
->control
);
567 writel (ohci_cpu_to_le32 (*((__u32
*)&ed
->hwNextED
)), &ohci
->regs
->ed_bulkhead
);
569 ed
->ed_prev
->hwNextED
= ed
->hwNextED
;
571 if (ohci
->ed_bulktail
== ed
) {
572 ohci
->ed_bulktail
= ed
->ed_prev
;
574 ((ed_t
*)ohci_cpu_to_le32 (*((__u32
*)&ed
->hwNextED
)))->ed_prev
= ed
->ed_prev
;
578 ed
->state
= ED_UNLINK
;
583 /*-------------------------------------------------------------------------*/
585 /* add/reinit an endpoint; this should be done once at the usb_set_configuration command,
586 * but the USB stack is a little bit stateless so we do it at every transaction
587 * if the state of the ed is ED_NEW then a dummy td is added and the state is changed to ED_UNLINK
588 * in all other cases the state is left unchanged
589 * the ed info fields are setted anyway even though most of them should not change */
591 static ed_t
* ep_add_ed (struct usb_device
*usb_dev
, unsigned long pipe
)
597 ed
= ed_ret
= &ohci_dev
.ed
[(usb_pipeendpoint (pipe
) << 1) |
598 (usb_pipecontrol (pipe
)? 0: usb_pipeout (pipe
))];
600 if ((ed
->state
& ED_DEL
) || (ed
->state
& ED_URB_DEL
)) {
601 err("ep_add_ed: pending delete");
602 /* pending delete request */
606 if (ed
->state
== ED_NEW
) {
607 ed
->hwINFO
= ohci_cpu_to_le32 (OHCI_ED_SKIP
); /* skip ed */
608 /* dummy td; end of td list for ed */
609 td
= td_alloc (usb_dev
);
610 ed
->hwTailP
= ohci_cpu_to_le32 ((unsigned long)td
);
611 ed
->hwHeadP
= ed
->hwTailP
;
612 ed
->state
= ED_UNLINK
;
613 ed
->type
= usb_pipetype (pipe
);
617 ed
->hwINFO
= ohci_cpu_to_le32 (usb_pipedevice (pipe
)
618 | usb_pipeendpoint (pipe
) << 7
619 | (usb_pipeisoc (pipe
)? 0x8000: 0)
620 | (usb_pipecontrol (pipe
)? 0: (usb_pipeout (pipe
)? 0x800: 0x1000))
621 | usb_pipeslow (pipe
) << 13
622 | usb_maxpacket (usb_dev
, pipe
) << 16);
627 /*-------------------------------------------------------------------------*
628 * TD handling functions
629 *-------------------------------------------------------------------------*/
631 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
633 static void td_fill (ohci_t
*ohci
, unsigned int info
,
635 struct usb_device
*dev
, int index
, urb_priv_t
*urb_priv
)
637 volatile td_t
*td
, *td_pt
;
638 #ifdef OHCI_FILL_TRACE
642 if (index
> urb_priv
->length
) {
643 err("index > length");
646 /* use this td as the next dummy */
647 td_pt
= urb_priv
->td
[index
];
650 /* fill the old dummy TD */
651 td
= urb_priv
->td
[index
] = (td_t
*)(ohci_cpu_to_le32 (urb_priv
->ed
->hwTailP
) & ~0xf);
653 td
->ed
= urb_priv
->ed
;
654 td
->next_dl_td
= NULL
;
656 td
->data
= (__u32
)data
;
657 #ifdef OHCI_FILL_TRACE
658 if (usb_pipebulk(urb_priv
->pipe
) && usb_pipeout(urb_priv
->pipe
)) {
659 for (i
= 0; i
< len
; i
++)
660 printf("td->data[%d] %#2x ",i
, ((unsigned char *)td
->data
)[i
]);
667 td
->hwINFO
= ohci_cpu_to_le32 (info
);
668 td
->hwCBP
= ohci_cpu_to_le32 ((unsigned long)data
);
670 td
->hwBE
= ohci_cpu_to_le32 ((unsigned long)(data
+ len
- 1));
673 td
->hwNextTD
= ohci_cpu_to_le32 ((unsigned long)td_pt
);
675 /* append to queue */
676 td
->ed
->hwTailP
= td
->hwNextTD
;
679 /*-------------------------------------------------------------------------*/
681 /* prepare all TDs of a transfer */
682 static void td_submit_job (struct usb_device
*dev
, unsigned long pipe
, void *buffer
,
683 int transfer_len
, struct devrequest
*setup
, urb_priv_t
*urb
, int interval
)
685 ohci_t
*ohci
= &gohci
;
686 int data_len
= transfer_len
;
690 unsigned int toggle
= 0;
692 /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
693 if(usb_gettoggle(dev
, usb_pipeendpoint(pipe
), usb_pipeout(pipe
))) {
694 toggle
= TD_T_TOGGLE
;
697 usb_settoggle(dev
, usb_pipeendpoint(pipe
), usb_pipeout(pipe
), 1);
705 switch (usb_pipetype (pipe
)) {
707 info
= usb_pipeout (pipe
)?
708 TD_CC
| TD_DP_OUT
: TD_CC
| TD_DP_IN
;
709 while(data_len
> 4096) {
710 td_fill (ohci
, info
| (cnt
? TD_T_TOGGLE
:toggle
), data
, 4096, dev
, cnt
, urb
);
711 data
+= 4096; data_len
-= 4096; cnt
++;
713 info
= usb_pipeout (pipe
)?
714 TD_CC
| TD_DP_OUT
: TD_CC
| TD_R
| TD_DP_IN
;
715 td_fill (ohci
, info
| (cnt
? TD_T_TOGGLE
:toggle
), data
, data_len
, dev
, cnt
, urb
);
719 writel (OHCI_BLF
, &ohci
->regs
->cmdstatus
); /* start bulk list */
723 info
= TD_CC
| TD_DP_SETUP
| TD_T_DATA0
;
724 td_fill (ohci
, info
, setup
, 8, dev
, cnt
++, urb
);
726 info
= usb_pipeout (pipe
)?
727 TD_CC
| TD_R
| TD_DP_OUT
| TD_T_DATA1
: TD_CC
| TD_R
| TD_DP_IN
| TD_T_DATA1
;
728 /* NOTE: mishandles transfers >8K, some >4K */
729 td_fill (ohci
, info
, data
, data_len
, dev
, cnt
++, urb
);
731 info
= usb_pipeout (pipe
)?
732 TD_CC
| TD_DP_IN
| TD_T_DATA1
: TD_CC
| TD_DP_OUT
| TD_T_DATA1
;
733 td_fill (ohci
, info
, data
, 0, dev
, cnt
++, urb
);
735 writel (OHCI_CLF
, &ohci
->regs
->cmdstatus
); /* start Control list */
738 if (urb
->length
!= cnt
)
739 dbg("TD LENGTH %d != CNT %d", urb
->length
, cnt
);
742 /*-------------------------------------------------------------------------*
743 * Done List handling functions
744 *-------------------------------------------------------------------------*/
747 /* calculate the transfer length and update the urb */
749 static void dl_transfer_length(td_t
* td
)
751 __u32 tdINFO
, tdBE
, tdCBP
;
752 urb_priv_t
*lurb_priv
= &urb_priv
;
754 tdINFO
= ohci_cpu_to_le32 (td
->hwINFO
);
755 tdBE
= ohci_cpu_to_le32 (td
->hwBE
);
756 tdCBP
= ohci_cpu_to_le32 (td
->hwCBP
);
759 if (!(usb_pipecontrol(lurb_priv
->pipe
) &&
760 ((td
->index
== 0) || (td
->index
== lurb_priv
->length
- 1)))) {
763 lurb_priv
->actual_length
+= tdBE
- td
->data
+ 1;
765 lurb_priv
->actual_length
+= tdCBP
- td
->data
;
770 /*-------------------------------------------------------------------------*/
772 /* replies to the request have to be on a FIFO basis so
773 * we reverse the reversed done-list */
775 static td_t
* dl_reverse_done_list (ohci_t
*ohci
)
779 td_t
*td_list
= NULL
;
780 urb_priv_t
*lurb_priv
= NULL
;
782 td_list_hc
= ohci_cpu_to_le32 (ohci
->hcca
->done_head
) & 0xfffffff0;
783 ohci
->hcca
->done_head
= 0;
786 td_list
= (td_t
*)td_list_hc
;
788 if (TD_CC_GET (ohci_cpu_to_le32 (td_list
->hwINFO
))) {
789 lurb_priv
= &urb_priv
;
790 dbg(" USB-error/status: %x : %p",
791 TD_CC_GET (ohci_cpu_to_le32 (td_list
->hwINFO
)), td_list
);
792 if (td_list
->ed
->hwHeadP
& ohci_cpu_to_le32 (0x1)) {
793 if (lurb_priv
&& ((td_list
->index
+ 1) < lurb_priv
->length
)) {
794 td_list
->ed
->hwHeadP
=
795 (lurb_priv
->td
[lurb_priv
->length
- 1]->hwNextTD
& ohci_cpu_to_le32 (0xfffffff0)) |
796 (td_list
->ed
->hwHeadP
& ohci_cpu_to_le32 (0x2));
797 lurb_priv
->td_cnt
+= lurb_priv
->length
- td_list
->index
- 1;
799 td_list
->ed
->hwHeadP
&= ohci_cpu_to_le32 (0xfffffff2);
801 td_list
->hwNextTD
= 0;
804 td_list
->next_dl_td
= td_rev
;
806 td_list_hc
= ohci_cpu_to_le32 (td_list
->hwNextTD
) & 0xfffffff0;
811 /*-------------------------------------------------------------------------*/
814 static int dl_done_list (ohci_t
*ohci
, td_t
*td_list
)
816 td_t
*td_list_next
= NULL
;
821 urb_priv_t
*lurb_priv
;
822 __u32 tdINFO
, edHeadP
, edTailP
;
825 td_list_next
= td_list
->next_dl_td
;
827 lurb_priv
= &urb_priv
;
828 tdINFO
= ohci_cpu_to_le32 (td_list
->hwINFO
);
832 dl_transfer_length(td_list
);
834 /* error code of transfer */
835 cc
= TD_CC_GET (tdINFO
);
836 if (++(lurb_priv
->td_cnt
) == lurb_priv
->length
) {
837 if ((ed
->state
& (ED_OPER
| ED_UNLINK
))
838 && (lurb_priv
->state
!= URB_DEL
)) {
839 dbg("ConditionCode %#x", cc
);
840 stat
= cc_to_error
[cc
];
845 if (ed
->state
!= ED_NEW
) {
846 edHeadP
= ohci_cpu_to_le32 (ed
->hwHeadP
) & 0xfffffff0;
847 edTailP
= ohci_cpu_to_le32 (ed
->hwTailP
);
849 /* unlink eds if they are not busy */
850 if ((edHeadP
== edTailP
) && (ed
->state
== ED_OPER
))
851 ep_unlink (ohci
, ed
);
854 td_list
= td_list_next
;
859 /*-------------------------------------------------------------------------*
861 *-------------------------------------------------------------------------*/
863 /* Device descriptor */
864 static __u8 root_hub_dev_des
[] =
866 0x12, /* __u8 bLength; */
867 0x01, /* __u8 bDescriptorType; Device */
868 0x10, /* __u16 bcdUSB; v1.1 */
870 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
871 0x00, /* __u8 bDeviceSubClass; */
872 0x00, /* __u8 bDeviceProtocol; */
873 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
874 0x00, /* __u16 idVendor; */
876 0x00, /* __u16 idProduct; */
878 0x00, /* __u16 bcdDevice; */
880 0x00, /* __u8 iManufacturer; */
881 0x01, /* __u8 iProduct; */
882 0x00, /* __u8 iSerialNumber; */
883 0x01 /* __u8 bNumConfigurations; */
887 /* Configuration descriptor */
888 static __u8 root_hub_config_des
[] =
890 0x09, /* __u8 bLength; */
891 0x02, /* __u8 bDescriptorType; Configuration */
892 0x19, /* __u16 wTotalLength; */
894 0x01, /* __u8 bNumInterfaces; */
895 0x01, /* __u8 bConfigurationValue; */
896 0x00, /* __u8 iConfiguration; */
897 0x40, /* __u8 bmAttributes;
898 Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
899 0x00, /* __u8 MaxPower; */
902 0x09, /* __u8 if_bLength; */
903 0x04, /* __u8 if_bDescriptorType; Interface */
904 0x00, /* __u8 if_bInterfaceNumber; */
905 0x00, /* __u8 if_bAlternateSetting; */
906 0x01, /* __u8 if_bNumEndpoints; */
907 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
908 0x00, /* __u8 if_bInterfaceSubClass; */
909 0x00, /* __u8 if_bInterfaceProtocol; */
910 0x00, /* __u8 if_iInterface; */
913 0x07, /* __u8 ep_bLength; */
914 0x05, /* __u8 ep_bDescriptorType; Endpoint */
915 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
916 0x03, /* __u8 ep_bmAttributes; Interrupt */
917 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
919 0xff /* __u8 ep_bInterval; 255 ms */
922 static unsigned char root_hub_str_index0
[] =
924 0x04, /* __u8 bLength; */
925 0x03, /* __u8 bDescriptorType; String-descriptor */
926 0x09, /* __u8 lang ID */
927 0x04, /* __u8 lang ID */
930 static unsigned char root_hub_str_index1
[] =
932 28, /* __u8 bLength; */
933 0x03, /* __u8 bDescriptorType; String-descriptor */
934 'O', /* __u8 Unicode */
935 0, /* __u8 Unicode */
936 'H', /* __u8 Unicode */
937 0, /* __u8 Unicode */
938 'C', /* __u8 Unicode */
939 0, /* __u8 Unicode */
940 'I', /* __u8 Unicode */
941 0, /* __u8 Unicode */
942 ' ', /* __u8 Unicode */
943 0, /* __u8 Unicode */
944 'R', /* __u8 Unicode */
945 0, /* __u8 Unicode */
946 'o', /* __u8 Unicode */
947 0, /* __u8 Unicode */
948 'o', /* __u8 Unicode */
949 0, /* __u8 Unicode */
950 't', /* __u8 Unicode */
951 0, /* __u8 Unicode */
952 ' ', /* __u8 Unicode */
953 0, /* __u8 Unicode */
954 'H', /* __u8 Unicode */
955 0, /* __u8 Unicode */
956 'u', /* __u8 Unicode */
957 0, /* __u8 Unicode */
958 'b', /* __u8 Unicode */
959 0, /* __u8 Unicode */
962 /* Hub class-specific descriptor is constructed dynamically */
965 /*-------------------------------------------------------------------------*/
967 #define OK(x) len = (x); break
969 #define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
970 #define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
972 #define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
973 #define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
975 #define RD_RH_STAT roothub_status(&gohci)
976 #define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1)
978 /* request to virtual root hub */
980 int rh_check_port_status(ohci_t
*controller
)
986 temp
= roothub_a (controller
);
987 ndp
= (temp
& RH_A_NDP
);
988 for (i
= 0; i
< ndp
; i
++) {
989 temp
= roothub_portstatus (controller
, i
);
990 /* check for a device disconnect */
991 if (((temp
& (RH_PS_PESC
| RH_PS_CSC
)) ==
992 (RH_PS_PESC
| RH_PS_CSC
)) &&
993 ((temp
& RH_PS_CCS
) == 0)) {
1001 static int ohci_submit_rh_msg(struct usb_device
*dev
, unsigned long pipe
,
1002 void *buffer
, int transfer_len
, struct devrequest
*cmd
)
1004 void * data
= buffer
;
1005 int leni
= transfer_len
;
1009 __u8
*data_buf
= (__u8
*)datab
;
1016 urb_priv
.actual_length
= 0;
1017 pkt_print(dev
, pipe
, buffer
, transfer_len
, cmd
, "SUB(rh)", usb_pipein(pipe
));
1019 if (usb_pipeint(pipe
)) {
1020 info("Root-Hub submit IRQ: NOT implemented");
1024 bmRType_bReq
= cmd
->requesttype
| (cmd
->request
<< 8);
1025 wValue
= m16_swap (cmd
->value
);
1026 wIndex
= m16_swap (cmd
->index
);
1027 wLength
= m16_swap (cmd
->length
);
1029 info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1030 dev
->devnum
, 8, bmRType_bReq
, wValue
, wIndex
, wLength
);
1032 switch (bmRType_bReq
) {
1033 /* Request Destination:
1034 without flags: Device,
1035 RH_INTERFACE: interface,
1036 RH_ENDPOINT: endpoint,
1037 RH_CLASS means HUB here,
1038 RH_OTHER | RH_CLASS almost ever means HUB_PORT here
1042 *(__u16
*) data_buf
= m16_swap (1); OK (2);
1043 case RH_GET_STATUS
| RH_INTERFACE
:
1044 *(__u16
*) data_buf
= m16_swap (0); OK (2);
1045 case RH_GET_STATUS
| RH_ENDPOINT
:
1046 *(__u16
*) data_buf
= m16_swap (0); OK (2);
1047 case RH_GET_STATUS
| RH_CLASS
:
1048 *(__u32
*) data_buf
= m32_swap (
1049 RD_RH_STAT
& ~(RH_HS_CRWE
| RH_HS_DRWE
));
1051 case RH_GET_STATUS
| RH_OTHER
| RH_CLASS
:
1052 *(__u32
*) data_buf
= m32_swap (RD_RH_PORTSTAT
); OK (4);
1054 case RH_CLEAR_FEATURE
| RH_ENDPOINT
:
1056 case (RH_ENDPOINT_STALL
): OK (0);
1060 case RH_CLEAR_FEATURE
| RH_CLASS
:
1062 case RH_C_HUB_LOCAL_POWER
:
1064 case (RH_C_HUB_OVER_CURRENT
):
1065 WR_RH_STAT(RH_HS_OCIC
); OK (0);
1069 case RH_CLEAR_FEATURE
| RH_OTHER
| RH_CLASS
:
1071 case (RH_PORT_ENABLE
):
1072 WR_RH_PORTSTAT (RH_PS_CCS
); OK (0);
1073 case (RH_PORT_SUSPEND
):
1074 WR_RH_PORTSTAT (RH_PS_POCI
); OK (0);
1075 case (RH_PORT_POWER
):
1076 WR_RH_PORTSTAT (RH_PS_LSDA
); OK (0);
1077 case (RH_C_PORT_CONNECTION
):
1078 WR_RH_PORTSTAT (RH_PS_CSC
); OK (0);
1079 case (RH_C_PORT_ENABLE
):
1080 WR_RH_PORTSTAT (RH_PS_PESC
); OK (0);
1081 case (RH_C_PORT_SUSPEND
):
1082 WR_RH_PORTSTAT (RH_PS_PSSC
); OK (0);
1083 case (RH_C_PORT_OVER_CURRENT
):
1084 WR_RH_PORTSTAT (RH_PS_OCIC
); OK (0);
1085 case (RH_C_PORT_RESET
):
1086 WR_RH_PORTSTAT (RH_PS_PRSC
); OK (0);
1090 case RH_SET_FEATURE
| RH_OTHER
| RH_CLASS
:
1092 case (RH_PORT_SUSPEND
):
1093 WR_RH_PORTSTAT (RH_PS_PSS
); OK (0);
1094 case (RH_PORT_RESET
): /* BUG IN HUP CODE *********/
1095 if (RD_RH_PORTSTAT
& RH_PS_CCS
)
1096 WR_RH_PORTSTAT (RH_PS_PRS
);
1098 case (RH_PORT_POWER
):
1099 WR_RH_PORTSTAT (RH_PS_PPS
); OK (0);
1100 case (RH_PORT_ENABLE
): /* BUG IN HUP CODE *********/
1101 if (RD_RH_PORTSTAT
& RH_PS_CCS
)
1102 WR_RH_PORTSTAT (RH_PS_PES
);
1107 case RH_SET_ADDRESS
: gohci
.rh
.devnum
= wValue
; OK(0);
1109 case RH_GET_DESCRIPTOR
:
1110 switch ((wValue
& 0xff00) >> 8) {
1111 case (0x01): /* device descriptor */
1112 len
= min_t(unsigned int,
1115 sizeof (root_hub_dev_des
),
1117 data_buf
= root_hub_dev_des
; OK(len
);
1118 case (0x02): /* configuration descriptor */
1119 len
= min_t(unsigned int,
1122 sizeof (root_hub_config_des
),
1124 data_buf
= root_hub_config_des
; OK(len
);
1125 case (0x03): /* string descriptors */
1126 if(wValue
==0x0300) {
1127 len
= min_t(unsigned int,
1130 sizeof (root_hub_str_index0
),
1132 data_buf
= root_hub_str_index0
;
1135 if(wValue
==0x0301) {
1136 len
= min_t(unsigned int,
1139 sizeof (root_hub_str_index1
),
1141 data_buf
= root_hub_str_index1
;
1145 stat
= USB_ST_STALLED
;
1149 case RH_GET_DESCRIPTOR
| RH_CLASS
:
1151 __u32 temp
= roothub_a (&gohci
);
1153 data_buf
[0] = 9; /* min length; */
1154 data_buf
[1] = 0x29;
1155 data_buf
[2] = temp
& RH_A_NDP
;
1157 if (temp
& RH_A_PSM
) /* per-port power switching? */
1158 data_buf
[3] |= 0x1;
1159 if (temp
& RH_A_NOCP
) /* no overcurrent reporting? */
1160 data_buf
[3] |= 0x10;
1161 else if (temp
& RH_A_OCPM
) /* per-port overcurrent reporting? */
1162 data_buf
[3] |= 0x8;
1164 /* corresponds to data_buf[4-7] */
1166 data_buf
[5] = (temp
& RH_A_POTPGT
) >> 24;
1167 temp
= roothub_b (&gohci
);
1168 data_buf
[7] = temp
& RH_B_DR
;
1169 if (data_buf
[2] < 7) {
1170 data_buf
[8] = 0xff;
1173 data_buf
[8] = (temp
& RH_B_DR
) >> 8;
1174 data_buf
[10] = data_buf
[9] = 0xff;
1177 len
= min_t(unsigned int, leni
,
1178 min_t(unsigned int, data_buf
[0], wLength
));
1182 case RH_GET_CONFIGURATION
: *(__u8
*) data_buf
= 0x01; OK (1);
1184 case RH_SET_CONFIGURATION
: WR_RH_STAT (0x10000); OK (0);
1187 dbg ("unsupported root hub command");
1188 stat
= USB_ST_STALLED
;
1192 ohci_dump_roothub (&gohci
, 1);
1195 len
= min_t(int, len
, leni
);
1196 if (data
!= data_buf
)
1197 memcpy (data
, data_buf
, len
);
1203 urb_priv
.actual_length
= transfer_len
;
1204 pkt_print(dev
, pipe
, buffer
, transfer_len
, cmd
, "RET(rh)", 0/*usb_pipein(pipe)*/);
1210 /*-------------------------------------------------------------------------*/
1212 /* common code for handling submit messages - used for all but root hub */
1214 int submit_common_msg(struct usb_device
*dev
, unsigned long pipe
, void *buffer
,
1215 int transfer_len
, struct devrequest
*setup
, int interval
)
1218 int maxsize
= usb_maxpacket(dev
, pipe
);
1221 /* device pulled? Shortcut the action. */
1222 if (devgone
== dev
) {
1223 dev
->status
= USB_ST_CRC_ERR
;
1228 urb_priv
.actual_length
= 0;
1229 pkt_print(dev
, pipe
, buffer
, transfer_len
, setup
, "SUB", usb_pipein(pipe
));
1232 err("submit_common_message: pipesize for pipe %lx is zero",
1237 if (sohci_submit_job(dev
, pipe
, buffer
, transfer_len
, setup
, interval
) < 0) {
1238 err("sohci_submit_job failed");
1242 /* allow more time for a BULK device to react - some are slow */
1243 #define BULK_TO 5000 /* timeout in milliseconds */
1244 if (usb_pipebulk(pipe
))
1249 /* wait for it to complete */
1251 /* check whether the controller is done */
1252 stat
= hc_interrupt();
1254 stat
= USB_ST_CRC_ERR
;
1258 /* NOTE: since we are not interrupt driven in U-Boot and always
1259 * handle only one URB at a time, we cannot assume the
1260 * transaction finished on the first successful return from
1261 * hc_interrupt().. unless the flag for current URB is set,
1262 * meaning that all TD's to/from device got actually
1263 * transferred and processed. If the current URB is not
1264 * finished we need to re-iterate this loop so as
1265 * hc_interrupt() gets called again as there needs to be some
1266 * more TD's to process still */
1267 if ((stat
>= 0) && (stat
!= 0xff) && (urb_finished
)) {
1268 /* 0xff is returned for an SF-interrupt */
1278 err("CTL:TIMEOUT ");
1279 dbg("submit_common_msg: TO status %x\n", stat
);
1280 stat
= USB_ST_CRC_ERR
;
1286 /* we got an Root Hub Status Change interrupt */
1289 ohci_dump_roothub (&gohci
, 1);
1293 timeout
= rh_check_port_status(&gohci
);
1295 #if 0 /* this does nothing useful, but leave it here in case that changes */
1296 /* the called routine adds 1 to the passed value */
1297 usb_hub_port_connect_change(gohci
.rh
.dev
, timeout
- 1);
1301 * This is potentially dangerous because it assumes
1302 * that only one device is ever plugged in!
1310 dev
->act_len
= transfer_len
;
1313 pkt_print(dev
, pipe
, buffer
, transfer_len
, setup
, "RET(ctlr)", usb_pipein(pipe
));
1316 /* free TDs in urb_priv */
1317 urb_free_priv (&urb_priv
);
1321 /* submit routines called from usb.c */
1322 int submit_bulk_msg(struct usb_device
*dev
, unsigned long pipe
, void *buffer
,
1325 info("submit_bulk_msg");
1326 return submit_common_msg(dev
, pipe
, buffer
, transfer_len
, NULL
, 0);
1329 int submit_control_msg(struct usb_device
*dev
, unsigned long pipe
, void *buffer
,
1330 int transfer_len
, struct devrequest
*setup
)
1332 int maxsize
= usb_maxpacket(dev
, pipe
);
1334 info("submit_control_msg");
1336 urb_priv
.actual_length
= 0;
1337 pkt_print(dev
, pipe
, buffer
, transfer_len
, setup
, "SUB", usb_pipein(pipe
));
1340 err("submit_control_message: pipesize for pipe %lx is zero",
1344 if (((pipe
>> 8) & 0x7f) == gohci
.rh
.devnum
) {
1346 /* root hub - redirect */
1347 return ohci_submit_rh_msg(dev
, pipe
, buffer
, transfer_len
,
1351 return submit_common_msg(dev
, pipe
, buffer
, transfer_len
, setup
, 0);
1354 int submit_int_msg(struct usb_device
*dev
, unsigned long pipe
, void *buffer
,
1355 int transfer_len
, int interval
)
1357 info("submit_int_msg");
1361 /*-------------------------------------------------------------------------*
1363 *-------------------------------------------------------------------------*/
1365 /* reset the HC and BUS */
1367 static int hc_reset (ohci_t
*ohci
)
1370 int smm_timeout
= 50; /* 0,5 sec */
1372 if (readl (&ohci
->regs
->control
) & OHCI_CTRL_IR
) { /* SMM owns the HC */
1373 writel (OHCI_OCR
, &ohci
->regs
->cmdstatus
); /* request ownership */
1374 info("USB HC TakeOver from SMM");
1375 while (readl (&ohci
->regs
->control
) & OHCI_CTRL_IR
) {
1377 if (--smm_timeout
== 0) {
1378 err("USB HC TakeOver failed!");
1384 /* Disable HC interrupts */
1385 writel (OHCI_INTR_MIE
, &ohci
->regs
->intrdisable
);
1387 dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;",
1389 readl (&ohci
->regs
->control
));
1391 /* Reset USB (needed by some controllers) */
1392 ohci
->hc_control
= 0;
1393 writel (ohci
->hc_control
, &ohci
->regs
->control
);
1395 /* HC Reset requires max 10 us delay */
1396 writel (OHCI_HCR
, &ohci
->regs
->cmdstatus
);
1397 while ((readl (&ohci
->regs
->cmdstatus
) & OHCI_HCR
) != 0) {
1398 if (--timeout
== 0) {
1399 err("USB HC reset timed out!");
1407 /*-------------------------------------------------------------------------*/
1409 /* Start an OHCI controller, set the BUS operational
1411 * connect the virtual root hub */
1413 static int hc_start (ohci_t
* ohci
)
1416 unsigned int fminterval
;
1420 /* Tell the controller where the control and bulk lists are
1421 * The lists are empty now. */
1423 writel (0, &ohci
->regs
->ed_controlhead
);
1424 writel (0, &ohci
->regs
->ed_bulkhead
);
1426 writel ((__u32
)ohci
->hcca
, &ohci
->regs
->hcca
); /* a reset clears this */
1428 fminterval
= 0x2edf;
1429 writel ((fminterval
* 9) / 10, &ohci
->regs
->periodicstart
);
1430 fminterval
|= ((((fminterval
- 210) * 6) / 7) << 16);
1431 writel (fminterval
, &ohci
->regs
->fminterval
);
1432 writel (0x628, &ohci
->regs
->lsthresh
);
1434 /* start controller operations */
1435 ohci
->hc_control
= OHCI_CONTROL_INIT
| OHCI_USB_OPER
;
1437 writel (ohci
->hc_control
, &ohci
->regs
->control
);
1439 /* disable all interrupts */
1440 mask
= (OHCI_INTR_SO
| OHCI_INTR_WDH
| OHCI_INTR_SF
| OHCI_INTR_RD
|
1441 OHCI_INTR_UE
| OHCI_INTR_FNO
| OHCI_INTR_RHSC
|
1442 OHCI_INTR_OC
| OHCI_INTR_MIE
);
1443 writel (mask
, &ohci
->regs
->intrdisable
);
1444 /* clear all interrupts */
1445 mask
&= ~OHCI_INTR_MIE
;
1446 writel (mask
, &ohci
->regs
->intrstatus
);
1447 /* Choose the interrupts we care about now - but w/o MIE */
1448 mask
= OHCI_INTR_RHSC
| OHCI_INTR_UE
| OHCI_INTR_WDH
| OHCI_INTR_SO
;
1449 writel (mask
, &ohci
->regs
->intrenable
);
1452 /* required for AMD-756 and some Mac platforms */
1453 writel ((roothub_a (ohci
) | RH_A_NPS
) & ~RH_A_PSM
,
1454 &ohci
->regs
->roothub
.a
);
1455 writel (RH_HS_LPSC
, &ohci
->regs
->roothub
.status
);
1456 #endif /* OHCI_USE_NPS */
1458 #define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);})
1459 /* POTPGT delay is bits 24-31, in 2 ms units. */
1460 mdelay ((roothub_a (ohci
) >> 23) & 0x1fe);
1462 /* connect the virtual root hub */
1463 ohci
->rh
.devnum
= 0;
1468 /*-------------------------------------------------------------------------*/
1470 /* an interrupt happens */
1475 ohci_t
*ohci
= &gohci
;
1476 struct ohci_regs
*regs
= ohci
->regs
;
1480 if ((ohci
->hcca
->done_head
!= 0) &&
1481 !(ohci_cpu_to_le32(ohci
->hcca
->done_head
) & 0x01)) {
1483 ints
= OHCI_INTR_WDH
;
1485 } else if ((ints
= readl (®s
->intrstatus
)) == ~(u32
)0) {
1487 err ("%s device removed!", ohci
->slot_name
);
1490 } else if ((ints
&= readl (®s
->intrenable
)) == 0) {
1491 dbg("hc_interrupt: returning..\n");
1495 /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
1497 if (ints
& OHCI_INTR_RHSC
) {
1502 if (ints
& OHCI_INTR_UE
) {
1504 err ("OHCI Unrecoverable Error, controller usb-%s disabled",
1506 /* e.g. due to PCI Master/Target Abort */
1509 ohci_dump (ohci
, 1);
1511 /* FIXME: be optimistic, hope that bug won't repeat often. */
1512 /* Make some non-interrupt context restart the controller. */
1513 /* Count and limit the retries though; either hardware or */
1514 /* software errors can go forever... */
1519 if (ints
& OHCI_INTR_WDH
) {
1520 writel (OHCI_INTR_WDH
, ®s
->intrdisable
);
1521 stat
= dl_done_list (&gohci
, dl_reverse_done_list (&gohci
));
1522 writel (OHCI_INTR_WDH
, ®s
->intrenable
);
1525 if (ints
& OHCI_INTR_SO
) {
1526 dbg("USB Schedule overrun\n");
1527 writel (OHCI_INTR_SO
, ®s
->intrenable
);
1531 /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
1532 if (ints
& OHCI_INTR_SF
) {
1533 unsigned int frame
= ohci_cpu_to_le16 (ohci
->hcca
->frame_no
) & 1;
1535 writel (OHCI_INTR_SF
, ®s
->intrdisable
);
1536 if (ohci
->ed_rm_list
[frame
] != NULL
)
1537 writel (OHCI_INTR_SF
, ®s
->intrenable
);
1541 writel (ints
, ®s
->intrstatus
);
1545 /*-------------------------------------------------------------------------*/
1547 /*-------------------------------------------------------------------------*/
1549 /* De-allocate all resources.. */
1551 static void hc_release_ohci (ohci_t
*ohci
)
1553 dbg ("USB HC release ohci usb-%s", ohci
->slot_name
);
1555 if (!ohci
->disabled
)
1559 /*-------------------------------------------------------------------------*/
1562 * low level initalisation routine, called from usb.c
1564 static char ohci_inited
= 0;
1566 int usb_lowlevel_init(void)
1569 /* Set the USB Clock */
1570 *(vu_long
*)MPC5XXX_CDM_48_FDC
= CONFIG_USB_CLOCK
;
1572 #ifdef CONFIG_PSC3_USB /* USB is using the alternate configuration */
1573 /* remove all PSC3 USB bits first before ORing in ours */
1574 *(vu_long
*)MPC5XXX_GPS_PORT_CONFIG
&= ~0x00804f00;
1576 /* remove all USB bits first before ORing in ours */
1577 *(vu_long
*)MPC5XXX_GPS_PORT_CONFIG
&= ~0x00807000;
1579 /* Activate USB port */
1580 *(vu_long
*)MPC5XXX_GPS_PORT_CONFIG
|= CONFIG_USB_CONFIG
;
1582 memset (&gohci
, 0, sizeof (ohci_t
));
1583 memset (&urb_priv
, 0, sizeof (urb_priv_t
));
1585 /* align the storage */
1586 if ((__u32
)&ghcca
[0] & 0xff) {
1587 err("HCCA not aligned!!");
1591 info("aligned ghcca %p", phcca
);
1592 memset(&ohci_dev
, 0, sizeof(struct ohci_device
));
1593 if ((__u32
)&ohci_dev
.ed
[0] & 0x7) {
1594 err("EDs not aligned!!");
1597 memset(gtd
, 0, sizeof(td_t
) * (NUM_TD
+ 1));
1598 if ((__u32
)gtd
& 0x7) {
1599 err("TDs not aligned!!");
1604 memset (phcca
, 0, sizeof (struct ohci_hcca
));
1609 gohci
.regs
= (struct ohci_regs
*)MPC5XXX_USB
;
1612 gohci
.slot_name
= "mpc5200";
1614 if (hc_reset (&gohci
) < 0) {
1615 hc_release_ohci (&gohci
);
1619 if (hc_start (&gohci
) < 0) {
1620 err ("can't start usb-%s", gohci
.slot_name
);
1621 hc_release_ohci (&gohci
);
1626 ohci_dump (&gohci
, 1);
1634 int usb_lowlevel_stop(void)
1636 /* this gets called really early - before the controller has */
1637 /* even been initialized! */
1640 /* TODO release any interrupts, etc. */
1641 /* call hc_release_ohci() here ? */
1646 #endif /* CONFIG_USB_OHCI */