2 * Copyright 2010 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/immap_85xx.h>
11 #include <asm/fsl_serdes.h>
13 #define SRDS1_MAX_LANES 8
15 static u32 serdes1_prtcl_map
;
17 static u8 serdes1_cfg_tbl
[][SRDS1_MAX_LANES
] = {
18 [0x3] = {PCIE1
, PCIE1
, PCIE1
, PCIE1
, SRIO1
, SRIO1
, SRIO1
, SRIO1
},
19 [0x4] = {PCIE1
, PCIE1
, PCIE1
, PCIE1
, SRIO1
, SRIO1
, SRIO1
, SRIO1
},
20 [0x5] = {NONE
, NONE
, NONE
, NONE
, SRIO1
, SRIO1
, SRIO1
, SRIO1
},
21 [0x6] = {NONE
, NONE
, NONE
, NONE
, SRIO1
, SRIO1
, SRIO1
, SRIO1
},
22 [0x7] = {PCIE1
, PCIE1
, PCIE1
, PCIE1
, PCIE1
, PCIE1
, PCIE1
, PCIE1
},
25 int is_serdes_configured(enum srds_prtcl prtcl
)
27 if (!(serdes1_prtcl_map
& (1 << NONE
)))
30 return (1 << prtcl
) & serdes1_prtcl_map
;
33 void fsl_serdes_init(void)
35 ccsr_gur_t
*gur
= (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR
);
36 u32 pordevsr
= in_be32(&gur
->pordevsr
);
37 u32 srds1_cfg
= (pordevsr
& MPC85xx_PORDEVSR_IO_SEL
) >>
38 MPC85xx_PORDEVSR_IO_SEL_SHIFT
;
41 if (serdes1_prtcl_map
& (1 << NONE
))
44 debug("PORDEVSR[IO_SEL] = %x\n", srds1_cfg
);
46 if (srds1_cfg
>= ARRAY_SIZE(serdes1_cfg_tbl
)) {
47 printf("Invalid PORDEVSR[IO_SEL] = %d\n", srds1_cfg
);
51 for (lane
= 0; lane
< SRDS1_MAX_LANES
; lane
++) {
52 enum srds_prtcl lane_prtcl
= serdes1_cfg_tbl
[srds1_cfg
][lane
];
53 serdes1_prtcl_map
|= (1 << lane_prtcl
);
56 /* Set the first bit to indicate serdes has been initialized */
57 serdes1_prtcl_map
|= (1 << NONE
);