arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright 2010 Freescale Semiconductor, Inc.
   4  */
   5
   6 #include <config.h>
   7 #include <common.h>
   8 #include <asm/io.h>
   9 #include <asm/immap_85xx.h>
  10 #include <asm/fsl_serdes.h>
  11
  12 #define SRDS1_MAX_LANES         4
  13
  14 static u32 serdes1_prtcl_map;
  15
  16 static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
  17         [0x0] = {PCIE1, NONE, NONE, NONE},
  18         [0x1] = {SRIO1, SRIO2, SGMII_TSEC1, SGMII_TSEC2},
  19         [0x2] = {SRIO1, SRIO2, SGMII_TSEC1, SGMII_TSEC2},
  20         [0x3] = {SRIO1, SRIO2, NONE, NONE},
  21         [0x4] = {PCIE1, NONE, SGMII_TSEC1, SGMII_TSEC2},
  22         [0x5] = {PCIE1, PCIE1, SGMII_TSEC1, SGMII_TSEC2},
  23         [0x6] = {PCIE1, NONE, SRIO1, SRIO2},
  24         [0x7] = {PCIE1, PCIE1, SRIO1, SRIO2},
  25         [0x8] = {PCIE1, PCIE1, SRIO1, SRIO2},
  26         [0x9] = {SRIO1, SRIO1, SRIO1, SRIO1},
  27         [0xa] = {SRIO1, SRIO1, SRIO1, SRIO1},
  28         [0xb] = {SRIO1, SRIO1, SRIO1, SRIO1},
  29         [0xc] = {PCIE1, SRIO1, SGMII_TSEC1, SGMII_TSEC2},
  30         [0xf] = {PCIE1, PCIE1, PCIE1, PCIE1},
  31 };
  32
  33 int is_serdes_configured(enum srds_prtcl prtcl)
  34 {
  35         if (!(serdes1_prtcl_map & (1 << NONE)))
  36                 fsl_serdes_init();
  37
  38         return (1 << prtcl) & serdes1_prtcl_map;
  39 }
  40
  41 void fsl_serdes_init(void)
  42 {
  43         ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
  44         u32 pordevsr = in_be32(&gur->pordevsr);
  45         u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
  46                                 MPC85xx_PORDEVSR_IO_SEL_SHIFT;
  47         int lane;
  48
  49         if (serdes1_prtcl_map & (1 << NONE))
  50                 return;
  51
  52         debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
  53
  54         if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) {
  55                 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
  56                 return;
  57         }
  58
  59         for (lane = 0; lane < SRDS1_MAX_LANES; lane++) {
  60                 enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane];
  61                 serdes1_prtcl_map |= (1 << lane_prtcl);
  62         }
  63
  64         /* Set the first bit to indicate serdes has been initialized */
  65         serdes1_prtcl_map |= (1 << NONE);
  66 }