2 * Copyright 2010 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/immap_85xx.h>
11 #include <asm/fsl_serdes.h>
13 #define SRDS1_MAX_LANES 4
15 static u32 serdes1_prtcl_map
;
17 static u8 serdes1_cfg_tbl
[][SRDS1_MAX_LANES
] = {
18 [0x0] = {PCIE1
, NONE
, NONE
, NONE
},
19 [0x2] = {PCIE1
, PCIE2
, PCIE3
, PCIE3
},
20 [0x4] = {PCIE1
, PCIE1
, PCIE3
, PCIE3
},
21 [0x6] = {PCIE1
, PCIE1
, PCIE1
, PCIE1
},
22 [0x7] = {SRIO2
, SRIO1
, NONE
, NONE
},
23 [0x8] = {SRIO2
, SRIO2
, SRIO2
, SRIO2
},
24 [0x9] = {SRIO2
, SRIO2
, SRIO2
, SRIO2
},
25 [0xa] = {SRIO2
, SRIO2
, SRIO2
, SRIO2
},
26 [0xb] = {SRIO2
, SRIO1
, SGMII_TSEC2
, SGMII_TSEC3
},
27 [0xc] = {SRIO2
, SRIO1
, SGMII_TSEC2
, SGMII_TSEC3
},
28 [0xd] = {PCIE1
, SRIO1
, SGMII_TSEC2
, SGMII_TSEC3
},
29 [0xe] = {PCIE1
, PCIE2
, SGMII_TSEC2
, SGMII_TSEC3
},
30 [0xf] = {PCIE1
, PCIE1
, SGMII_TSEC2
, SGMII_TSEC3
},
33 int is_serdes_configured(enum srds_prtcl prtcl
)
35 return (1 << prtcl
) & serdes1_prtcl_map
;
38 void fsl_serdes_init(void)
40 ccsr_gur_t
*gur
= (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR
);
41 u32 pordevsr
= in_be32(&gur
->pordevsr
);
42 u32 srds_cfg
= (pordevsr
& MPC85xx_PORDEVSR_IO_SEL
) >>
43 MPC85xx_PORDEVSR_IO_SEL_SHIFT
;
46 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg
);
48 if (srds_cfg
>= ARRAY_SIZE(serdes1_cfg_tbl
)) {
49 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg
);
53 for (lane
= 0; lane
< SRDS1_MAX_LANES
; lane
++) {
54 enum srds_prtcl lane_prtcl
= serdes1_cfg_tbl
[srds_cfg
][lane
];
55 serdes1_prtcl_map
|= (1 << lane_prtcl
);