arch/powerpc/include/asm/nohash/64/pgtable.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef _ASM_POWERPC_NOHASH_64_PGTABLE_H
   3 #define _ASM_POWERPC_NOHASH_64_PGTABLE_H
   4 /*
   5  * This file contains the functions and defines necessary to modify and use
   6  * the ppc64 hashed page table.
   7  */
   8
   9 #ifdef CONFIG_PPC_64K_PAGES
  10 #include <asm/nohash/64/pgtable-64k.h>
  11 #else
  12 #include <asm/nohash/64/pgtable-4k.h>
  13 #endif
  14 #include <asm/barrier.h>
  15
  16 #define FIRST_USER_ADDRESS      0UL
  17
  18 /*
  19  * Size of EA range mapped by our pagetables.
  20  */
  21 #define PGTABLE_EADDR_SIZE (PTE_INDEX_SIZE + PMD_INDEX_SIZE + \
  22                             PUD_INDEX_SIZE + PGD_INDEX_SIZE + PAGE_SHIFT)
  23 #define PGTABLE_RANGE (ASM_CONST(1) << PGTABLE_EADDR_SIZE)
  24
  25 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
  26 #define PMD_CACHE_INDEX (PMD_INDEX_SIZE + 1)
  27 #else
  28 #define PMD_CACHE_INDEX PMD_INDEX_SIZE
  29 #endif
  30
  31 /*
  32  * Define the address range of the kernel non-linear virtual area
  33  */
  34 #define KERN_VIRT_START ASM_CONST(0x8000000000000000)
  35 #define KERN_VIRT_SIZE  ASM_CONST(0x0000100000000000)
  36
  37 /*
  38  * The vmalloc space starts at the beginning of that region, and
  39  * occupies half of it on hash CPUs and a quarter of it on Book3E
  40  * (we keep a quarter for the virtual memmap)
  41  */
  42 #define VMALLOC_START   KERN_VIRT_START
  43 #define VMALLOC_SIZE    (KERN_VIRT_SIZE >> 2)
  44 #define VMALLOC_END     (VMALLOC_START + VMALLOC_SIZE)
  45
  46 /*
  47  * The second half of the kernel virtual space is used for IO mappings,
  48  * it's itself carved into the PIO region (ISA and PHB IO space) and
  49  * the ioremap space
  50  *
  51  *  ISA_IO_BASE = KERN_IO_START, 64K reserved area
  52  *  PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces
  53  * IOREMAP_BASE = ISA_IO_BASE + 2G to VMALLOC_START + PGTABLE_RANGE
  54  */
  55 #define KERN_IO_START   (KERN_VIRT_START + (KERN_VIRT_SIZE >> 1))
  56 #define FULL_IO_SIZE    0x80000000ul
  57 #define  ISA_IO_BASE    (KERN_IO_START)
  58 #define  ISA_IO_END     (KERN_IO_START + 0x10000ul)
  59 #define  PHB_IO_BASE    (ISA_IO_END)
  60 #define  PHB_IO_END     (KERN_IO_START + FULL_IO_SIZE)
  61 #define IOREMAP_BASE    (PHB_IO_END)
  62 #define IOREMAP_END     (KERN_VIRT_START + KERN_VIRT_SIZE)
  63
  64
  65 /*
  66  * Region IDs
  67  */
  68 #define REGION_SHIFT            60UL
  69 #define REGION_MASK             (0xfUL << REGION_SHIFT)
  70 #define REGION_ID(ea)           (((unsigned long)(ea)) >> REGION_SHIFT)
  71
  72 #define VMALLOC_REGION_ID       (REGION_ID(VMALLOC_START))
  73 #define KERNEL_REGION_ID        (REGION_ID(PAGE_OFFSET))
  74 #define VMEMMAP_REGION_ID       (0xfUL) /* Server only */
  75 #define USER_REGION_ID          (0UL)
  76
  77 /*
  78  * Defines the address of the vmemap area, in its own region on
  79  * hash table CPUs and after the vmalloc space on Book3E
  80  */
  81 #define VMEMMAP_BASE            VMALLOC_END
  82 #define VMEMMAP_END             KERN_IO_START
  83 #define vmemmap                 ((struct page *)VMEMMAP_BASE)
  84
  85
  86 /*
  87  * Include the PTE bits definitions
  88  */
  89 #include <asm/nohash/pte-book3e.h>
  90 #include <asm/pte-common.h>
  91
  92 #ifndef __ASSEMBLY__
  93 /* pte_clear moved to later in this file */
  94
  95 #define PMD_BAD_BITS            (PTE_TABLE_SIZE-1)
  96 #define PUD_BAD_BITS            (PMD_TABLE_SIZE-1)
  97
  98 static inline void pmd_set(pmd_t *pmdp, unsigned long val)
  99 {
 100         *pmdp = __pmd(val);
 101 }
 102
 103 static inline void pmd_clear(pmd_t *pmdp)
 104 {
 105         *pmdp = __pmd(0);
 106 }
 107
 108 static inline pte_t pmd_pte(pmd_t pmd)
 109 {
 110         return __pte(pmd_val(pmd));
 111 }
 112
 113 #define pmd_none(pmd)           (!pmd_val(pmd))
 114 #define pmd_bad(pmd)            (!is_kernel_addr(pmd_val(pmd)) \
 115                                  || (pmd_val(pmd) & PMD_BAD_BITS))
 116 #define pmd_present(pmd)        (!pmd_none(pmd))
 117 #define pmd_page_vaddr(pmd)     (pmd_val(pmd) & ~PMD_MASKED_BITS)
 118 extern struct page *pmd_page(pmd_t pmd);
 119
 120 static inline void pud_set(pud_t *pudp, unsigned long val)
 121 {
 122         *pudp = __pud(val);
 123 }
 124
 125 static inline void pud_clear(pud_t *pudp)
 126 {
 127         *pudp = __pud(0);
 128 }
 129
 130 #define pud_none(pud)           (!pud_val(pud))
 131 #define pud_bad(pud)            (!is_kernel_addr(pud_val(pud)) \
 132                                  || (pud_val(pud) & PUD_BAD_BITS))
 133 #define pud_present(pud)        (pud_val(pud) != 0)
 134 #define pud_page_vaddr(pud)     (pud_val(pud) & ~PUD_MASKED_BITS)
 135
 136 extern struct page *pud_page(pud_t pud);
 137
 138 static inline pte_t pud_pte(pud_t pud)
 139 {
 140         return __pte(pud_val(pud));
 141 }
 142
 143 static inline pud_t pte_pud(pte_t pte)
 144 {
 145         return __pud(pte_val(pte));
 146 }
 147 #define pud_write(pud)          pte_write(pud_pte(pud))
 148 #define pgd_write(pgd)          pte_write(pgd_pte(pgd))
 149
 150 static inline void pgd_set(pgd_t *pgdp, unsigned long val)
 151 {
 152         *pgdp = __pgd(val);
 153 }
 154
 155 /*
 156  * Find an entry in a page-table-directory.  We combine the address region
 157  * (the high order N bits) and the pgd portion of the address.
 158  */
 159 #define pgd_index(address) (((address) >> (PGDIR_SHIFT)) & (PTRS_PER_PGD - 1))
 160
 161 #define pgd_offset(mm, address)  ((mm)->pgd + pgd_index(address))
 162
 163 #define pmd_offset(pudp,addr) \
 164   (((pmd_t *) pud_page_vaddr(*(pudp))) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)))
 165
 166 #define pte_offset_kernel(dir,addr) \
 167   (((pte_t *) pmd_page_vaddr(*(dir))) + (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
 168
 169 #define pte_offset_map(dir,addr)        pte_offset_kernel((dir), (addr))
 170 #define pte_unmap(pte)                  do { } while(0)
 171
 172 /* to find an entry in a kernel page-table-directory */
 173 /* This now only contains the vmalloc pages */
 174 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
 175 extern void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
 176                             pte_t *ptep, unsigned long pte, int huge);
 177
 178 /* Atomic PTE updates */
 179 static inline unsigned long pte_update(struct mm_struct *mm,
 180                                        unsigned long addr,
 181                                        pte_t *ptep, unsigned long clr,
 182                                        unsigned long set,
 183                                        int huge)
 184 {
 185 #ifdef PTE_ATOMIC_UPDATES
 186         unsigned long old, tmp;
 187
 188         __asm__ __volatile__(
 189         "1:     ldarx   %0,0,%3         # pte_update\n\
 190         andi.   %1,%0,%6\n\
 191         bne-    1b \n\
 192         andc    %1,%0,%4 \n\
 193         or      %1,%1,%7\n\
 194         stdcx.  %1,0,%3 \n\
 195         bne-    1b"
 196         : "=&r" (old), "=&r" (tmp), "=m" (*ptep)
 197         : "r" (ptep), "r" (clr), "m" (*ptep), "i" (_PAGE_BUSY), "r" (set)
 198         : "cc" );
 199 #else
 200         unsigned long old = pte_val(*ptep);
 201         *ptep = __pte((old & ~clr) | set);
 202 #endif
 203         /* huge pages use the old page table lock */
 204         if (!huge)
 205                 assert_pte_locked(mm, addr);
 206
 207 #ifdef CONFIG_PPC_STD_MMU_64
 208         if (old & _PAGE_HASHPTE)
 209                 hpte_need_flush(mm, addr, ptep, old, huge);
 210 #endif
 211
 212         return old;
 213 }
 214
 215 static inline int __ptep_test_and_clear_young(struct mm_struct *mm,
 216                                               unsigned long addr, pte_t *ptep)
 217 {
 218         unsigned long old;
 219
 220         if ((pte_val(*ptep) & (_PAGE_ACCESSED | _PAGE_HASHPTE)) == 0)
 221                 return 0;
 222         old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0, 0);
 223         return (old & _PAGE_ACCESSED) != 0;
 224 }
 225 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
 226 #define ptep_test_and_clear_young(__vma, __addr, __ptep)                   \
 227 ({                                                                         \
 228         int __r;                                                           \
 229         __r = __ptep_test_and_clear_young((__vma)->vm_mm, __addr, __ptep); \
 230         __r;                                                               \
 231 })
 232
 233 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
 234 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
 235                                       pte_t *ptep)
 236 {
 237
 238         if ((pte_val(*ptep) & _PAGE_RW) == 0)
 239                 return;
 240
 241         pte_update(mm, addr, ptep, _PAGE_RW, 0, 0);
 242 }
 243
 244 static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
 245                                            unsigned long addr, pte_t *ptep)
 246 {
 247         if ((pte_val(*ptep) & _PAGE_RW) == 0)
 248                 return;
 249
 250         pte_update(mm, addr, ptep, _PAGE_RW, 0, 1);
 251 }
 252
 253 /*
 254  * We currently remove entries from the hashtable regardless of whether
 255  * the entry was young or dirty. The generic routines only flush if the
 256  * entry was young or dirty which is not good enough.
 257  *
 258  * We should be more intelligent about this but for the moment we override
 259  * these functions and force a tlb flush unconditionally
 260  */
 261 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
 262 #define ptep_clear_flush_young(__vma, __address, __ptep)                \
 263 ({                                                                      \
 264         int __young = __ptep_test_and_clear_young((__vma)->vm_mm, __address, \
 265                                                   __ptep);              \
 266         __young;                                                        \
 267 })
 268
 269 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
 270 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
 271                                        unsigned long addr, pte_t *ptep)
 272 {
 273         unsigned long old = pte_update(mm, addr, ptep, ~0UL, 0, 0);
 274         return __pte(old);
 275 }
 276
 277 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
 278                              pte_t * ptep)
 279 {
 280         pte_update(mm, addr, ptep, ~0UL, 0, 0);
 281 }
 282
 283
 284 /* Set the dirty and/or accessed bits atomically in a linux PTE, this
 285  * function doesn't need to flush the hash entry
 286  */
 287 static inline void __ptep_set_access_flags(struct mm_struct *mm,
 288                                            pte_t *ptep, pte_t entry,
 289                                            unsigned long address)
 290 {
 291         unsigned long bits = pte_val(entry) &
 292                 (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC);
 293
 294 #ifdef PTE_ATOMIC_UPDATES
 295         unsigned long old, tmp;
 296
 297         __asm__ __volatile__(
 298         "1:     ldarx   %0,0,%4\n\
 299                 andi.   %1,%0,%6\n\
 300                 bne-    1b \n\
 301                 or      %0,%3,%0\n\
 302                 stdcx.  %0,0,%4\n\
 303                 bne-    1b"
 304         :"=&r" (old), "=&r" (tmp), "=m" (*ptep)
 305         :"r" (bits), "r" (ptep), "m" (*ptep), "i" (_PAGE_BUSY)
 306         :"cc");
 307 #else
 308         unsigned long old = pte_val(*ptep);
 309         *ptep = __pte(old | bits);
 310 #endif
 311 }
 312
 313 #define __HAVE_ARCH_PTE_SAME
 314 #define pte_same(A,B)   (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0)
 315
 316 #define pte_ERROR(e) \
 317         pr_err("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
 318 #define pmd_ERROR(e) \
 319         pr_err("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
 320 #define pgd_ERROR(e) \
 321         pr_err("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
 322
 323 /* Encode and de-code a swap entry */
 324 #define MAX_SWAPFILES_CHECK() do { \
 325         BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS); \
 326         /*                                                      \
 327          * Don't have overlapping bits with _PAGE_HPTEFLAGS     \
 328          * We filter HPTEFLAGS on set_pte.                      \
 329          */                                                     \
 330         BUILD_BUG_ON(_PAGE_HPTEFLAGS & (0x1f << _PAGE_BIT_SWAP_TYPE)); \
 331         } while (0)
 332 /*
 333  * on pte we don't need handle RADIX_TREE_EXCEPTIONAL_SHIFT;
 334  */
 335 #define SWP_TYPE_BITS 5
 336 #define __swp_type(x)           (((x).val >> _PAGE_BIT_SWAP_TYPE) \
 337                                 & ((1UL << SWP_TYPE_BITS) - 1))
 338 #define __swp_offset(x)         ((x).val >> PTE_RPN_SHIFT)
 339 #define __swp_entry(type, offset)       ((swp_entry_t) { \
 340                                         ((type) << _PAGE_BIT_SWAP_TYPE) \
 341                                         | ((offset) << PTE_RPN_SHIFT) })
 342
 343 #define __pte_to_swp_entry(pte)         ((swp_entry_t) { pte_val((pte)) })
 344 #define __swp_entry_to_pte(x)           __pte((x).val)
 345
 346 extern int map_kernel_page(unsigned long ea, unsigned long pa,
 347                            unsigned long flags);
 348 extern int __meminit vmemmap_create_mapping(unsigned long start,
 349                                             unsigned long page_size,
 350                                             unsigned long phys);
 351 extern void vmemmap_remove_mapping(unsigned long start,
 352                                    unsigned long page_size);
 353 #endif /* __ASSEMBLY__ */
 354
 355 #endif /* _ASM_POWERPC_NOHASH_64_PGTABLE_H */