arch/powerpc/include/asm/pgtable-be-types.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef _ASM_POWERPC_PGTABLE_BE_TYPES_H
   3 #define _ASM_POWERPC_PGTABLE_BE_TYPES_H
   4
   5 #include <asm/cmpxchg.h>
   6
   7 /* PTE level */
   8 typedef struct { __be64 pte; } pte_t;
   9 #define __pte(x)        ((pte_t) { cpu_to_be64(x) })
  10 #define __pte_raw(x)    ((pte_t) { (x) })
  11 static inline unsigned long pte_val(pte_t x)
  12 {
  13         return be64_to_cpu(x.pte);
  14 }
  15
  16 static inline __be64 pte_raw(pte_t x)
  17 {
  18         return x.pte;
  19 }
  20
  21 /* PMD level */
  22 #ifdef CONFIG_PPC64
  23 typedef struct { __be64 pmd; } pmd_t;
  24 #define __pmd(x)        ((pmd_t) { cpu_to_be64(x) })
  25 #define __pmd_raw(x)    ((pmd_t) { (x) })
  26 static inline unsigned long pmd_val(pmd_t x)
  27 {
  28         return be64_to_cpu(x.pmd);
  29 }
  30
  31 static inline __be64 pmd_raw(pmd_t x)
  32 {
  33         return x.pmd;
  34 }
  35
  36 /*
  37  * 64 bit hash always use 4 level table. Everybody else use 4 level
  38  * only for 4K page size.
  39  */
  40 #if defined(CONFIG_PPC_BOOK3S_64) || !defined(CONFIG_PPC_64K_PAGES)
  41 typedef struct { __be64 pud; } pud_t;
  42 #define __pud(x)        ((pud_t) { cpu_to_be64(x) })
  43 #define __pud_raw(x)    ((pud_t) { (x) })
  44 static inline unsigned long pud_val(pud_t x)
  45 {
  46         return be64_to_cpu(x.pud);
  47 }
  48
  49 static inline __be64 pud_raw(pud_t x)
  50 {
  51         return x.pud;
  52 }
  53
  54 #endif /* CONFIG_PPC_BOOK3S_64 || !CONFIG_PPC_64K_PAGES */
  55 #endif /* CONFIG_PPC64 */
  56
  57 /* PGD level */
  58 typedef struct { __be64 pgd; } pgd_t;
  59 #define __pgd(x)        ((pgd_t) { cpu_to_be64(x) })
  60 #define __pgd_raw(x)    ((pgd_t) { (x) })
  61 static inline unsigned long pgd_val(pgd_t x)
  62 {
  63         return be64_to_cpu(x.pgd);
  64 }
  65
  66 static inline __be64 pgd_raw(pgd_t x)
  67 {
  68         return x.pgd;
  69 }
  70
  71 /* Page protection bits */
  72 typedef struct { unsigned long pgprot; } pgprot_t;
  73 #define pgprot_val(x)   ((x).pgprot)
  74 #define __pgprot(x)     ((pgprot_t) { (x) })
  75
  76 /*
  77  * With hash config 64k pages additionally define a bigger "real PTE" type that
  78  * gathers the "second half" part of the PTE for pseudo 64k pages
  79  */
  80 #if defined(CONFIG_PPC_64K_PAGES) && defined(CONFIG_PPC_STD_MMU_64)
  81 typedef struct { pte_t pte; unsigned long hidx; } real_pte_t;
  82 #else
  83 typedef struct { pte_t pte; } real_pte_t;
  84 #endif
  85
  86 static inline bool pte_xchg(pte_t *ptep, pte_t old, pte_t new)
  87 {
  88         unsigned long *p = (unsigned long *)ptep;
  89         __be64 prev;
  90
  91         /* See comment in switch_mm_irqs_off() */
  92         prev = (__force __be64)__cmpxchg_u64(p, (__force unsigned long)pte_raw(old),
  93                                              (__force unsigned long)pte_raw(new));
  94
  95         return pte_raw(old) == prev;
  96 }
  97
  98 static inline bool pmd_xchg(pmd_t *pmdp, pmd_t old, pmd_t new)
  99 {
 100         unsigned long *p = (unsigned long *)pmdp;
 101         __be64 prev;
 102
 103         prev = (__force __be64)__cmpxchg_u64(p, (__force unsigned long)pmd_raw(old),
 104                                              (__force unsigned long)pmd_raw(new));
 105
 106         return pmd_raw(old) == prev;
 107 }
 108
 109 typedef struct { __be64 pdbe; } hugepd_t;
 110 #define __hugepd(x) ((hugepd_t) { cpu_to_be64(x) })
 111
 112 static inline unsigned long hpd_val(hugepd_t x)
 113 {
 114         return be64_to_cpu(x.pdbe);
 115 }
 116
 117 #endif /* _ASM_POWERPC_PGTABLE_BE_TYPES_H */