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Replace <asm/uaccess.h> with <linux/uaccess.h> globally
[thirdparty/linux.git] / arch / powerpc / kvm / book3s_pr.c
1 /*
2 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
3 *
4 * Authors:
5 * Alexander Graf <agraf@suse.de>
6 * Kevin Wolf <mail@kevin-wolf.de>
7 * Paul Mackerras <paulus@samba.org>
8 *
9 * Description:
10 * Functions relating to running KVM on Book 3S processors where
11 * we don't have access to hypervisor mode, and we run the guest
12 * in problem state (user mode).
13 *
14 * This file is derived from arch/powerpc/kvm/44x.c,
15 * by Hollis Blanchard <hollisb@us.ibm.com>.
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License, version 2, as
19 * published by the Free Software Foundation.
20 */
21
22 #include <linux/kvm_host.h>
23 #include <linux/export.h>
24 #include <linux/err.h>
25 #include <linux/slab.h>
26
27 #include <asm/reg.h>
28 #include <asm/cputable.h>
29 #include <asm/cacheflush.h>
30 #include <asm/tlbflush.h>
31 #include <linux/uaccess.h>
32 #include <asm/io.h>
33 #include <asm/kvm_ppc.h>
34 #include <asm/kvm_book3s.h>
35 #include <asm/mmu_context.h>
36 #include <asm/switch_to.h>
37 #include <asm/firmware.h>
38 #include <asm/setup.h>
39 #include <linux/gfp.h>
40 #include <linux/sched.h>
41 #include <linux/vmalloc.h>
42 #include <linux/highmem.h>
43 #include <linux/module.h>
44 #include <linux/miscdevice.h>
45
46 #include "book3s.h"
47
48 #define CREATE_TRACE_POINTS
49 #include "trace_pr.h"
50
51 /* #define EXIT_DEBUG */
52 /* #define DEBUG_EXT */
53
54 static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr,
55 ulong msr);
56 static void kvmppc_giveup_fac(struct kvm_vcpu *vcpu, ulong fac);
57
58 /* Some compatibility defines */
59 #ifdef CONFIG_PPC_BOOK3S_32
60 #define MSR_USER32 MSR_USER
61 #define MSR_USER64 MSR_USER
62 #define HW_PAGE_SIZE PAGE_SIZE
63 #endif
64
65 static bool kvmppc_is_split_real(struct kvm_vcpu *vcpu)
66 {
67 ulong msr = kvmppc_get_msr(vcpu);
68 return (msr & (MSR_IR|MSR_DR)) == MSR_DR;
69 }
70
71 static void kvmppc_fixup_split_real(struct kvm_vcpu *vcpu)
72 {
73 ulong msr = kvmppc_get_msr(vcpu);
74 ulong pc = kvmppc_get_pc(vcpu);
75
76 /* We are in DR only split real mode */
77 if ((msr & (MSR_IR|MSR_DR)) != MSR_DR)
78 return;
79
80 /* We have not fixed up the guest already */
81 if (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK)
82 return;
83
84 /* The code is in fixupable address space */
85 if (pc & SPLIT_HACK_MASK)
86 return;
87
88 vcpu->arch.hflags |= BOOK3S_HFLAG_SPLIT_HACK;
89 kvmppc_set_pc(vcpu, pc | SPLIT_HACK_OFFS);
90 }
91
92 void kvmppc_unfixup_split_real(struct kvm_vcpu *vcpu);
93
94 static void kvmppc_core_vcpu_load_pr(struct kvm_vcpu *vcpu, int cpu)
95 {
96 #ifdef CONFIG_PPC_BOOK3S_64
97 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
98 memcpy(svcpu->slb, to_book3s(vcpu)->slb_shadow, sizeof(svcpu->slb));
99 svcpu->slb_max = to_book3s(vcpu)->slb_shadow_max;
100 svcpu->in_use = 0;
101 svcpu_put(svcpu);
102 #endif
103
104 /* Disable AIL if supported */
105 if (cpu_has_feature(CPU_FTR_HVMODE) &&
106 cpu_has_feature(CPU_FTR_ARCH_207S))
107 mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~LPCR_AIL);
108
109 vcpu->cpu = smp_processor_id();
110 #ifdef CONFIG_PPC_BOOK3S_32
111 current->thread.kvm_shadow_vcpu = vcpu->arch.shadow_vcpu;
112 #endif
113
114 if (kvmppc_is_split_real(vcpu))
115 kvmppc_fixup_split_real(vcpu);
116 }
117
118 static void kvmppc_core_vcpu_put_pr(struct kvm_vcpu *vcpu)
119 {
120 #ifdef CONFIG_PPC_BOOK3S_64
121 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
122 if (svcpu->in_use) {
123 kvmppc_copy_from_svcpu(vcpu, svcpu);
124 }
125 memcpy(to_book3s(vcpu)->slb_shadow, svcpu->slb, sizeof(svcpu->slb));
126 to_book3s(vcpu)->slb_shadow_max = svcpu->slb_max;
127 svcpu_put(svcpu);
128 #endif
129
130 if (kvmppc_is_split_real(vcpu))
131 kvmppc_unfixup_split_real(vcpu);
132
133 kvmppc_giveup_ext(vcpu, MSR_FP | MSR_VEC | MSR_VSX);
134 kvmppc_giveup_fac(vcpu, FSCR_TAR_LG);
135
136 /* Enable AIL if supported */
137 if (cpu_has_feature(CPU_FTR_HVMODE) &&
138 cpu_has_feature(CPU_FTR_ARCH_207S))
139 mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) | LPCR_AIL_3);
140
141 vcpu->cpu = -1;
142 }
143
144 /* Copy data needed by real-mode code from vcpu to shadow vcpu */
145 void kvmppc_copy_to_svcpu(struct kvmppc_book3s_shadow_vcpu *svcpu,
146 struct kvm_vcpu *vcpu)
147 {
148 svcpu->gpr[0] = vcpu->arch.gpr[0];
149 svcpu->gpr[1] = vcpu->arch.gpr[1];
150 svcpu->gpr[2] = vcpu->arch.gpr[2];
151 svcpu->gpr[3] = vcpu->arch.gpr[3];
152 svcpu->gpr[4] = vcpu->arch.gpr[4];
153 svcpu->gpr[5] = vcpu->arch.gpr[5];
154 svcpu->gpr[6] = vcpu->arch.gpr[6];
155 svcpu->gpr[7] = vcpu->arch.gpr[7];
156 svcpu->gpr[8] = vcpu->arch.gpr[8];
157 svcpu->gpr[9] = vcpu->arch.gpr[9];
158 svcpu->gpr[10] = vcpu->arch.gpr[10];
159 svcpu->gpr[11] = vcpu->arch.gpr[11];
160 svcpu->gpr[12] = vcpu->arch.gpr[12];
161 svcpu->gpr[13] = vcpu->arch.gpr[13];
162 svcpu->cr = vcpu->arch.cr;
163 svcpu->xer = vcpu->arch.xer;
164 svcpu->ctr = vcpu->arch.ctr;
165 svcpu->lr = vcpu->arch.lr;
166 svcpu->pc = vcpu->arch.pc;
167 #ifdef CONFIG_PPC_BOOK3S_64
168 svcpu->shadow_fscr = vcpu->arch.shadow_fscr;
169 #endif
170 /*
171 * Now also save the current time base value. We use this
172 * to find the guest purr and spurr value.
173 */
174 vcpu->arch.entry_tb = get_tb();
175 vcpu->arch.entry_vtb = get_vtb();
176 if (cpu_has_feature(CPU_FTR_ARCH_207S))
177 vcpu->arch.entry_ic = mfspr(SPRN_IC);
178 svcpu->in_use = true;
179 }
180
181 /* Copy data touched by real-mode code from shadow vcpu back to vcpu */
182 void kvmppc_copy_from_svcpu(struct kvm_vcpu *vcpu,
183 struct kvmppc_book3s_shadow_vcpu *svcpu)
184 {
185 /*
186 * vcpu_put would just call us again because in_use hasn't
187 * been updated yet.
188 */
189 preempt_disable();
190
191 /*
192 * Maybe we were already preempted and synced the svcpu from
193 * our preempt notifiers. Don't bother touching this svcpu then.
194 */
195 if (!svcpu->in_use)
196 goto out;
197
198 vcpu->arch.gpr[0] = svcpu->gpr[0];
199 vcpu->arch.gpr[1] = svcpu->gpr[1];
200 vcpu->arch.gpr[2] = svcpu->gpr[2];
201 vcpu->arch.gpr[3] = svcpu->gpr[3];
202 vcpu->arch.gpr[4] = svcpu->gpr[4];
203 vcpu->arch.gpr[5] = svcpu->gpr[5];
204 vcpu->arch.gpr[6] = svcpu->gpr[6];
205 vcpu->arch.gpr[7] = svcpu->gpr[7];
206 vcpu->arch.gpr[8] = svcpu->gpr[8];
207 vcpu->arch.gpr[9] = svcpu->gpr[9];
208 vcpu->arch.gpr[10] = svcpu->gpr[10];
209 vcpu->arch.gpr[11] = svcpu->gpr[11];
210 vcpu->arch.gpr[12] = svcpu->gpr[12];
211 vcpu->arch.gpr[13] = svcpu->gpr[13];
212 vcpu->arch.cr = svcpu->cr;
213 vcpu->arch.xer = svcpu->xer;
214 vcpu->arch.ctr = svcpu->ctr;
215 vcpu->arch.lr = svcpu->lr;
216 vcpu->arch.pc = svcpu->pc;
217 vcpu->arch.shadow_srr1 = svcpu->shadow_srr1;
218 vcpu->arch.fault_dar = svcpu->fault_dar;
219 vcpu->arch.fault_dsisr = svcpu->fault_dsisr;
220 vcpu->arch.last_inst = svcpu->last_inst;
221 #ifdef CONFIG_PPC_BOOK3S_64
222 vcpu->arch.shadow_fscr = svcpu->shadow_fscr;
223 #endif
224 /*
225 * Update purr and spurr using time base on exit.
226 */
227 vcpu->arch.purr += get_tb() - vcpu->arch.entry_tb;
228 vcpu->arch.spurr += get_tb() - vcpu->arch.entry_tb;
229 to_book3s(vcpu)->vtb += get_vtb() - vcpu->arch.entry_vtb;
230 if (cpu_has_feature(CPU_FTR_ARCH_207S))
231 vcpu->arch.ic += mfspr(SPRN_IC) - vcpu->arch.entry_ic;
232 svcpu->in_use = false;
233
234 out:
235 preempt_enable();
236 }
237
238 static int kvmppc_core_check_requests_pr(struct kvm_vcpu *vcpu)
239 {
240 int r = 1; /* Indicate we want to get back into the guest */
241
242 /* We misuse TLB_FLUSH to indicate that we want to clear
243 all shadow cache entries */
244 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
245 kvmppc_mmu_pte_flush(vcpu, 0, 0);
246
247 return r;
248 }
249
250 /************* MMU Notifiers *************/
251 static void do_kvm_unmap_hva(struct kvm *kvm, unsigned long start,
252 unsigned long end)
253 {
254 long i;
255 struct kvm_vcpu *vcpu;
256 struct kvm_memslots *slots;
257 struct kvm_memory_slot *memslot;
258
259 slots = kvm_memslots(kvm);
260 kvm_for_each_memslot(memslot, slots) {
261 unsigned long hva_start, hva_end;
262 gfn_t gfn, gfn_end;
263
264 hva_start = max(start, memslot->userspace_addr);
265 hva_end = min(end, memslot->userspace_addr +
266 (memslot->npages << PAGE_SHIFT));
267 if (hva_start >= hva_end)
268 continue;
269 /*
270 * {gfn(page) | page intersects with [hva_start, hva_end)} =
271 * {gfn, gfn+1, ..., gfn_end-1}.
272 */
273 gfn = hva_to_gfn_memslot(hva_start, memslot);
274 gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot);
275 kvm_for_each_vcpu(i, vcpu, kvm)
276 kvmppc_mmu_pte_pflush(vcpu, gfn << PAGE_SHIFT,
277 gfn_end << PAGE_SHIFT);
278 }
279 }
280
281 static int kvm_unmap_hva_pr(struct kvm *kvm, unsigned long hva)
282 {
283 trace_kvm_unmap_hva(hva);
284
285 do_kvm_unmap_hva(kvm, hva, hva + PAGE_SIZE);
286
287 return 0;
288 }
289
290 static int kvm_unmap_hva_range_pr(struct kvm *kvm, unsigned long start,
291 unsigned long end)
292 {
293 do_kvm_unmap_hva(kvm, start, end);
294
295 return 0;
296 }
297
298 static int kvm_age_hva_pr(struct kvm *kvm, unsigned long start,
299 unsigned long end)
300 {
301 /* XXX could be more clever ;) */
302 return 0;
303 }
304
305 static int kvm_test_age_hva_pr(struct kvm *kvm, unsigned long hva)
306 {
307 /* XXX could be more clever ;) */
308 return 0;
309 }
310
311 static void kvm_set_spte_hva_pr(struct kvm *kvm, unsigned long hva, pte_t pte)
312 {
313 /* The page will get remapped properly on its next fault */
314 do_kvm_unmap_hva(kvm, hva, hva + PAGE_SIZE);
315 }
316
317 /*****************************************/
318
319 static void kvmppc_recalc_shadow_msr(struct kvm_vcpu *vcpu)
320 {
321 ulong guest_msr = kvmppc_get_msr(vcpu);
322 ulong smsr = guest_msr;
323
324 /* Guest MSR values */
325 smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE | MSR_LE;
326 /* Process MSR values */
327 smsr |= MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_PR | MSR_EE;
328 /* External providers the guest reserved */
329 smsr |= (guest_msr & vcpu->arch.guest_owned_ext);
330 /* 64-bit Process MSR values */
331 #ifdef CONFIG_PPC_BOOK3S_64
332 smsr |= MSR_ISF | MSR_HV;
333 #endif
334 vcpu->arch.shadow_msr = smsr;
335 }
336
337 static void kvmppc_set_msr_pr(struct kvm_vcpu *vcpu, u64 msr)
338 {
339 ulong old_msr = kvmppc_get_msr(vcpu);
340
341 #ifdef EXIT_DEBUG
342 printk(KERN_INFO "KVM: Set MSR to 0x%llx\n", msr);
343 #endif
344
345 msr &= to_book3s(vcpu)->msr_mask;
346 kvmppc_set_msr_fast(vcpu, msr);
347 kvmppc_recalc_shadow_msr(vcpu);
348
349 if (msr & MSR_POW) {
350 if (!vcpu->arch.pending_exceptions) {
351 kvm_vcpu_block(vcpu);
352 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
353 vcpu->stat.halt_wakeup++;
354
355 /* Unset POW bit after we woke up */
356 msr &= ~MSR_POW;
357 kvmppc_set_msr_fast(vcpu, msr);
358 }
359 }
360
361 if (kvmppc_is_split_real(vcpu))
362 kvmppc_fixup_split_real(vcpu);
363 else
364 kvmppc_unfixup_split_real(vcpu);
365
366 if ((kvmppc_get_msr(vcpu) & (MSR_PR|MSR_IR|MSR_DR)) !=
367 (old_msr & (MSR_PR|MSR_IR|MSR_DR))) {
368 kvmppc_mmu_flush_segments(vcpu);
369 kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
370
371 /* Preload magic page segment when in kernel mode */
372 if (!(msr & MSR_PR) && vcpu->arch.magic_page_pa) {
373 struct kvm_vcpu_arch *a = &vcpu->arch;
374
375 if (msr & MSR_DR)
376 kvmppc_mmu_map_segment(vcpu, a->magic_page_ea);
377 else
378 kvmppc_mmu_map_segment(vcpu, a->magic_page_pa);
379 }
380 }
381
382 /*
383 * When switching from 32 to 64-bit, we may have a stale 32-bit
384 * magic page around, we need to flush it. Typically 32-bit magic
385 * page will be instanciated when calling into RTAS. Note: We
386 * assume that such transition only happens while in kernel mode,
387 * ie, we never transition from user 32-bit to kernel 64-bit with
388 * a 32-bit magic page around.
389 */
390 if (vcpu->arch.magic_page_pa &&
391 !(old_msr & MSR_PR) && !(old_msr & MSR_SF) && (msr & MSR_SF)) {
392 /* going from RTAS to normal kernel code */
393 kvmppc_mmu_pte_flush(vcpu, (uint32_t)vcpu->arch.magic_page_pa,
394 ~0xFFFUL);
395 }
396
397 /* Preload FPU if it's enabled */
398 if (kvmppc_get_msr(vcpu) & MSR_FP)
399 kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP);
400 }
401
402 void kvmppc_set_pvr_pr(struct kvm_vcpu *vcpu, u32 pvr)
403 {
404 u32 host_pvr;
405
406 vcpu->arch.hflags &= ~BOOK3S_HFLAG_SLB;
407 vcpu->arch.pvr = pvr;
408 #ifdef CONFIG_PPC_BOOK3S_64
409 if ((pvr >= 0x330000) && (pvr < 0x70330000)) {
410 kvmppc_mmu_book3s_64_init(vcpu);
411 if (!to_book3s(vcpu)->hior_explicit)
412 to_book3s(vcpu)->hior = 0xfff00000;
413 to_book3s(vcpu)->msr_mask = 0xffffffffffffffffULL;
414 vcpu->arch.cpu_type = KVM_CPU_3S_64;
415 } else
416 #endif
417 {
418 kvmppc_mmu_book3s_32_init(vcpu);
419 if (!to_book3s(vcpu)->hior_explicit)
420 to_book3s(vcpu)->hior = 0;
421 to_book3s(vcpu)->msr_mask = 0xffffffffULL;
422 vcpu->arch.cpu_type = KVM_CPU_3S_32;
423 }
424
425 kvmppc_sanity_check(vcpu);
426
427 /* If we are in hypervisor level on 970, we can tell the CPU to
428 * treat DCBZ as 32 bytes store */
429 vcpu->arch.hflags &= ~BOOK3S_HFLAG_DCBZ32;
430 if (vcpu->arch.mmu.is_dcbz32(vcpu) && (mfmsr() & MSR_HV) &&
431 !strcmp(cur_cpu_spec->platform, "ppc970"))
432 vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
433
434 /* Cell performs badly if MSR_FEx are set. So let's hope nobody
435 really needs them in a VM on Cell and force disable them. */
436 if (!strcmp(cur_cpu_spec->platform, "ppc-cell-be"))
437 to_book3s(vcpu)->msr_mask &= ~(MSR_FE0 | MSR_FE1);
438
439 /*
440 * If they're asking for POWER6 or later, set the flag
441 * indicating that we can do multiple large page sizes
442 * and 1TB segments.
443 * Also set the flag that indicates that tlbie has the large
444 * page bit in the RB operand instead of the instruction.
445 */
446 switch (PVR_VER(pvr)) {
447 case PVR_POWER6:
448 case PVR_POWER7:
449 case PVR_POWER7p:
450 case PVR_POWER8:
451 case PVR_POWER8E:
452 case PVR_POWER8NVL:
453 vcpu->arch.hflags |= BOOK3S_HFLAG_MULTI_PGSIZE |
454 BOOK3S_HFLAG_NEW_TLBIE;
455 break;
456 }
457
458 #ifdef CONFIG_PPC_BOOK3S_32
459 /* 32 bit Book3S always has 32 byte dcbz */
460 vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
461 #endif
462
463 /* On some CPUs we can execute paired single operations natively */
464 asm ( "mfpvr %0" : "=r"(host_pvr));
465 switch (host_pvr) {
466 case 0x00080200: /* lonestar 2.0 */
467 case 0x00088202: /* lonestar 2.2 */
468 case 0x70000100: /* gekko 1.0 */
469 case 0x00080100: /* gekko 2.0 */
470 case 0x00083203: /* gekko 2.3a */
471 case 0x00083213: /* gekko 2.3b */
472 case 0x00083204: /* gekko 2.4 */
473 case 0x00083214: /* gekko 2.4e (8SE) - retail HW2 */
474 case 0x00087200: /* broadway */
475 vcpu->arch.hflags |= BOOK3S_HFLAG_NATIVE_PS;
476 /* Enable HID2.PSE - in case we need it later */
477 mtspr(SPRN_HID2_GEKKO, mfspr(SPRN_HID2_GEKKO) | (1 << 29));
478 }
479 }
480
481 /* Book3s_32 CPUs always have 32 bytes cache line size, which Linux assumes. To
482 * make Book3s_32 Linux work on Book3s_64, we have to make sure we trap dcbz to
483 * emulate 32 bytes dcbz length.
484 *
485 * The Book3s_64 inventors also realized this case and implemented a special bit
486 * in the HID5 register, which is a hypervisor ressource. Thus we can't use it.
487 *
488 * My approach here is to patch the dcbz instruction on executing pages.
489 */
490 static void kvmppc_patch_dcbz(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte)
491 {
492 struct page *hpage;
493 u64 hpage_offset;
494 u32 *page;
495 int i;
496
497 hpage = gfn_to_page(vcpu->kvm, pte->raddr >> PAGE_SHIFT);
498 if (is_error_page(hpage))
499 return;
500
501 hpage_offset = pte->raddr & ~PAGE_MASK;
502 hpage_offset &= ~0xFFFULL;
503 hpage_offset /= 4;
504
505 get_page(hpage);
506 page = kmap_atomic(hpage);
507
508 /* patch dcbz into reserved instruction, so we trap */
509 for (i=hpage_offset; i < hpage_offset + (HW_PAGE_SIZE / 4); i++)
510 if ((be32_to_cpu(page[i]) & 0xff0007ff) == INS_DCBZ)
511 page[i] &= cpu_to_be32(0xfffffff7);
512
513 kunmap_atomic(page);
514 put_page(hpage);
515 }
516
517 static bool kvmppc_visible_gpa(struct kvm_vcpu *vcpu, gpa_t gpa)
518 {
519 ulong mp_pa = vcpu->arch.magic_page_pa;
520
521 if (!(kvmppc_get_msr(vcpu) & MSR_SF))
522 mp_pa = (uint32_t)mp_pa;
523
524 gpa &= ~0xFFFULL;
525 if (unlikely(mp_pa) && unlikely((mp_pa & KVM_PAM) == (gpa & KVM_PAM))) {
526 return true;
527 }
528
529 return kvm_is_visible_gfn(vcpu->kvm, gpa >> PAGE_SHIFT);
530 }
531
532 int kvmppc_handle_pagefault(struct kvm_run *run, struct kvm_vcpu *vcpu,
533 ulong eaddr, int vec)
534 {
535 bool data = (vec == BOOK3S_INTERRUPT_DATA_STORAGE);
536 bool iswrite = false;
537 int r = RESUME_GUEST;
538 int relocated;
539 int page_found = 0;
540 struct kvmppc_pte pte;
541 bool is_mmio = false;
542 bool dr = (kvmppc_get_msr(vcpu) & MSR_DR) ? true : false;
543 bool ir = (kvmppc_get_msr(vcpu) & MSR_IR) ? true : false;
544 u64 vsid;
545
546 relocated = data ? dr : ir;
547 if (data && (vcpu->arch.fault_dsisr & DSISR_ISSTORE))
548 iswrite = true;
549
550 /* Resolve real address if translation turned on */
551 if (relocated) {
552 page_found = vcpu->arch.mmu.xlate(vcpu, eaddr, &pte, data, iswrite);
553 } else {
554 pte.may_execute = true;
555 pte.may_read = true;
556 pte.may_write = true;
557 pte.raddr = eaddr & KVM_PAM;
558 pte.eaddr = eaddr;
559 pte.vpage = eaddr >> 12;
560 pte.page_size = MMU_PAGE_64K;
561 }
562
563 switch (kvmppc_get_msr(vcpu) & (MSR_DR|MSR_IR)) {
564 case 0:
565 pte.vpage |= ((u64)VSID_REAL << (SID_SHIFT - 12));
566 break;
567 case MSR_DR:
568 if (!data &&
569 (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) &&
570 ((pte.raddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS))
571 pte.raddr &= ~SPLIT_HACK_MASK;
572 /* fall through */
573 case MSR_IR:
574 vcpu->arch.mmu.esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid);
575
576 if ((kvmppc_get_msr(vcpu) & (MSR_DR|MSR_IR)) == MSR_DR)
577 pte.vpage |= ((u64)VSID_REAL_DR << (SID_SHIFT - 12));
578 else
579 pte.vpage |= ((u64)VSID_REAL_IR << (SID_SHIFT - 12));
580 pte.vpage |= vsid;
581
582 if (vsid == -1)
583 page_found = -EINVAL;
584 break;
585 }
586
587 if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
588 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) {
589 /*
590 * If we do the dcbz hack, we have to NX on every execution,
591 * so we can patch the executing code. This renders our guest
592 * NX-less.
593 */
594 pte.may_execute = !data;
595 }
596
597 if (page_found == -ENOENT) {
598 /* Page not found in guest PTE entries */
599 u64 ssrr1 = vcpu->arch.shadow_srr1;
600 u64 msr = kvmppc_get_msr(vcpu);
601 kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
602 kvmppc_set_dsisr(vcpu, vcpu->arch.fault_dsisr);
603 kvmppc_set_msr_fast(vcpu, msr | (ssrr1 & 0xf8000000ULL));
604 kvmppc_book3s_queue_irqprio(vcpu, vec);
605 } else if (page_found == -EPERM) {
606 /* Storage protection */
607 u32 dsisr = vcpu->arch.fault_dsisr;
608 u64 ssrr1 = vcpu->arch.shadow_srr1;
609 u64 msr = kvmppc_get_msr(vcpu);
610 kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
611 dsisr = (dsisr & ~DSISR_NOHPTE) | DSISR_PROTFAULT;
612 kvmppc_set_dsisr(vcpu, dsisr);
613 kvmppc_set_msr_fast(vcpu, msr | (ssrr1 & 0xf8000000ULL));
614 kvmppc_book3s_queue_irqprio(vcpu, vec);
615 } else if (page_found == -EINVAL) {
616 /* Page not found in guest SLB */
617 kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
618 kvmppc_book3s_queue_irqprio(vcpu, vec + 0x80);
619 } else if (!is_mmio &&
620 kvmppc_visible_gpa(vcpu, pte.raddr)) {
621 if (data && !(vcpu->arch.fault_dsisr & DSISR_NOHPTE)) {
622 /*
623 * There is already a host HPTE there, presumably
624 * a read-only one for a page the guest thinks
625 * is writable, so get rid of it first.
626 */
627 kvmppc_mmu_unmap_page(vcpu, &pte);
628 }
629 /* The guest's PTE is not mapped yet. Map on the host */
630 kvmppc_mmu_map_page(vcpu, &pte, iswrite);
631 if (data)
632 vcpu->stat.sp_storage++;
633 else if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
634 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32)))
635 kvmppc_patch_dcbz(vcpu, &pte);
636 } else {
637 /* MMIO */
638 vcpu->stat.mmio_exits++;
639 vcpu->arch.paddr_accessed = pte.raddr;
640 vcpu->arch.vaddr_accessed = pte.eaddr;
641 r = kvmppc_emulate_mmio(run, vcpu);
642 if ( r == RESUME_HOST_NV )
643 r = RESUME_HOST;
644 }
645
646 return r;
647 }
648
649 /* Give up external provider (FPU, Altivec, VSX) */
650 void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr)
651 {
652 struct thread_struct *t = &current->thread;
653
654 /*
655 * VSX instructions can access FP and vector registers, so if
656 * we are giving up VSX, make sure we give up FP and VMX as well.
657 */
658 if (msr & MSR_VSX)
659 msr |= MSR_FP | MSR_VEC;
660
661 msr &= vcpu->arch.guest_owned_ext;
662 if (!msr)
663 return;
664
665 #ifdef DEBUG_EXT
666 printk(KERN_INFO "Giving up ext 0x%lx\n", msr);
667 #endif
668
669 if (msr & MSR_FP) {
670 /*
671 * Note that on CPUs with VSX, giveup_fpu stores
672 * both the traditional FP registers and the added VSX
673 * registers into thread.fp_state.fpr[].
674 */
675 if (t->regs->msr & MSR_FP)
676 giveup_fpu(current);
677 t->fp_save_area = NULL;
678 }
679
680 #ifdef CONFIG_ALTIVEC
681 if (msr & MSR_VEC) {
682 if (current->thread.regs->msr & MSR_VEC)
683 giveup_altivec(current);
684 t->vr_save_area = NULL;
685 }
686 #endif
687
688 vcpu->arch.guest_owned_ext &= ~(msr | MSR_VSX);
689 kvmppc_recalc_shadow_msr(vcpu);
690 }
691
692 /* Give up facility (TAR / EBB / DSCR) */
693 static void kvmppc_giveup_fac(struct kvm_vcpu *vcpu, ulong fac)
694 {
695 #ifdef CONFIG_PPC_BOOK3S_64
696 if (!(vcpu->arch.shadow_fscr & (1ULL << fac))) {
697 /* Facility not available to the guest, ignore giveup request*/
698 return;
699 }
700
701 switch (fac) {
702 case FSCR_TAR_LG:
703 vcpu->arch.tar = mfspr(SPRN_TAR);
704 mtspr(SPRN_TAR, current->thread.tar);
705 vcpu->arch.shadow_fscr &= ~FSCR_TAR;
706 break;
707 }
708 #endif
709 }
710
711 /* Handle external providers (FPU, Altivec, VSX) */
712 static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr,
713 ulong msr)
714 {
715 struct thread_struct *t = &current->thread;
716
717 /* When we have paired singles, we emulate in software */
718 if (vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE)
719 return RESUME_GUEST;
720
721 if (!(kvmppc_get_msr(vcpu) & msr)) {
722 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
723 return RESUME_GUEST;
724 }
725
726 if (msr == MSR_VSX) {
727 /* No VSX? Give an illegal instruction interrupt */
728 #ifdef CONFIG_VSX
729 if (!cpu_has_feature(CPU_FTR_VSX))
730 #endif
731 {
732 kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
733 return RESUME_GUEST;
734 }
735
736 /*
737 * We have to load up all the FP and VMX registers before
738 * we can let the guest use VSX instructions.
739 */
740 msr = MSR_FP | MSR_VEC | MSR_VSX;
741 }
742
743 /* See if we already own all the ext(s) needed */
744 msr &= ~vcpu->arch.guest_owned_ext;
745 if (!msr)
746 return RESUME_GUEST;
747
748 #ifdef DEBUG_EXT
749 printk(KERN_INFO "Loading up ext 0x%lx\n", msr);
750 #endif
751
752 if (msr & MSR_FP) {
753 preempt_disable();
754 enable_kernel_fp();
755 load_fp_state(&vcpu->arch.fp);
756 disable_kernel_fp();
757 t->fp_save_area = &vcpu->arch.fp;
758 preempt_enable();
759 }
760
761 if (msr & MSR_VEC) {
762 #ifdef CONFIG_ALTIVEC
763 preempt_disable();
764 enable_kernel_altivec();
765 load_vr_state(&vcpu->arch.vr);
766 disable_kernel_altivec();
767 t->vr_save_area = &vcpu->arch.vr;
768 preempt_enable();
769 #endif
770 }
771
772 t->regs->msr |= msr;
773 vcpu->arch.guest_owned_ext |= msr;
774 kvmppc_recalc_shadow_msr(vcpu);
775
776 return RESUME_GUEST;
777 }
778
779 /*
780 * Kernel code using FP or VMX could have flushed guest state to
781 * the thread_struct; if so, get it back now.
782 */
783 static void kvmppc_handle_lost_ext(struct kvm_vcpu *vcpu)
784 {
785 unsigned long lost_ext;
786
787 lost_ext = vcpu->arch.guest_owned_ext & ~current->thread.regs->msr;
788 if (!lost_ext)
789 return;
790
791 if (lost_ext & MSR_FP) {
792 preempt_disable();
793 enable_kernel_fp();
794 load_fp_state(&vcpu->arch.fp);
795 disable_kernel_fp();
796 preempt_enable();
797 }
798 #ifdef CONFIG_ALTIVEC
799 if (lost_ext & MSR_VEC) {
800 preempt_disable();
801 enable_kernel_altivec();
802 load_vr_state(&vcpu->arch.vr);
803 disable_kernel_altivec();
804 preempt_enable();
805 }
806 #endif
807 current->thread.regs->msr |= lost_ext;
808 }
809
810 #ifdef CONFIG_PPC_BOOK3S_64
811
812 static void kvmppc_trigger_fac_interrupt(struct kvm_vcpu *vcpu, ulong fac)
813 {
814 /* Inject the Interrupt Cause field and trigger a guest interrupt */
815 vcpu->arch.fscr &= ~(0xffULL << 56);
816 vcpu->arch.fscr |= (fac << 56);
817 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_FAC_UNAVAIL);
818 }
819
820 static void kvmppc_emulate_fac(struct kvm_vcpu *vcpu, ulong fac)
821 {
822 enum emulation_result er = EMULATE_FAIL;
823
824 if (!(kvmppc_get_msr(vcpu) & MSR_PR))
825 er = kvmppc_emulate_instruction(vcpu->run, vcpu);
826
827 if ((er != EMULATE_DONE) && (er != EMULATE_AGAIN)) {
828 /* Couldn't emulate, trigger interrupt in guest */
829 kvmppc_trigger_fac_interrupt(vcpu, fac);
830 }
831 }
832
833 /* Enable facilities (TAR, EBB, DSCR) for the guest */
834 static int kvmppc_handle_fac(struct kvm_vcpu *vcpu, ulong fac)
835 {
836 bool guest_fac_enabled;
837 BUG_ON(!cpu_has_feature(CPU_FTR_ARCH_207S));
838
839 /*
840 * Not every facility is enabled by FSCR bits, check whether the
841 * guest has this facility enabled at all.
842 */
843 switch (fac) {
844 case FSCR_TAR_LG:
845 case FSCR_EBB_LG:
846 guest_fac_enabled = (vcpu->arch.fscr & (1ULL << fac));
847 break;
848 case FSCR_TM_LG:
849 guest_fac_enabled = kvmppc_get_msr(vcpu) & MSR_TM;
850 break;
851 default:
852 guest_fac_enabled = false;
853 break;
854 }
855
856 if (!guest_fac_enabled) {
857 /* Facility not enabled by the guest */
858 kvmppc_trigger_fac_interrupt(vcpu, fac);
859 return RESUME_GUEST;
860 }
861
862 switch (fac) {
863 case FSCR_TAR_LG:
864 /* TAR switching isn't lazy in Linux yet */
865 current->thread.tar = mfspr(SPRN_TAR);
866 mtspr(SPRN_TAR, vcpu->arch.tar);
867 vcpu->arch.shadow_fscr |= FSCR_TAR;
868 break;
869 default:
870 kvmppc_emulate_fac(vcpu, fac);
871 break;
872 }
873
874 return RESUME_GUEST;
875 }
876
877 void kvmppc_set_fscr(struct kvm_vcpu *vcpu, u64 fscr)
878 {
879 if ((vcpu->arch.fscr & FSCR_TAR) && !(fscr & FSCR_TAR)) {
880 /* TAR got dropped, drop it in shadow too */
881 kvmppc_giveup_fac(vcpu, FSCR_TAR_LG);
882 }
883 vcpu->arch.fscr = fscr;
884 }
885 #endif
886
887 static void kvmppc_setup_debug(struct kvm_vcpu *vcpu)
888 {
889 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
890 u64 msr = kvmppc_get_msr(vcpu);
891
892 kvmppc_set_msr(vcpu, msr | MSR_SE);
893 }
894 }
895
896 static void kvmppc_clear_debug(struct kvm_vcpu *vcpu)
897 {
898 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
899 u64 msr = kvmppc_get_msr(vcpu);
900
901 kvmppc_set_msr(vcpu, msr & ~MSR_SE);
902 }
903 }
904
905 int kvmppc_handle_exit_pr(struct kvm_run *run, struct kvm_vcpu *vcpu,
906 unsigned int exit_nr)
907 {
908 int r = RESUME_HOST;
909 int s;
910
911 vcpu->stat.sum_exits++;
912
913 run->exit_reason = KVM_EXIT_UNKNOWN;
914 run->ready_for_interrupt_injection = 1;
915
916 /* We get here with MSR.EE=1 */
917
918 trace_kvm_exit(exit_nr, vcpu);
919 guest_exit();
920
921 switch (exit_nr) {
922 case BOOK3S_INTERRUPT_INST_STORAGE:
923 {
924 ulong shadow_srr1 = vcpu->arch.shadow_srr1;
925 vcpu->stat.pf_instruc++;
926
927 if (kvmppc_is_split_real(vcpu))
928 kvmppc_fixup_split_real(vcpu);
929
930 #ifdef CONFIG_PPC_BOOK3S_32
931 /* We set segments as unused segments when invalidating them. So
932 * treat the respective fault as segment fault. */
933 {
934 struct kvmppc_book3s_shadow_vcpu *svcpu;
935 u32 sr;
936
937 svcpu = svcpu_get(vcpu);
938 sr = svcpu->sr[kvmppc_get_pc(vcpu) >> SID_SHIFT];
939 svcpu_put(svcpu);
940 if (sr == SR_INVALID) {
941 kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
942 r = RESUME_GUEST;
943 break;
944 }
945 }
946 #endif
947
948 /* only care about PTEG not found errors, but leave NX alone */
949 if (shadow_srr1 & 0x40000000) {
950 int idx = srcu_read_lock(&vcpu->kvm->srcu);
951 r = kvmppc_handle_pagefault(run, vcpu, kvmppc_get_pc(vcpu), exit_nr);
952 srcu_read_unlock(&vcpu->kvm->srcu, idx);
953 vcpu->stat.sp_instruc++;
954 } else if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
955 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) {
956 /*
957 * XXX If we do the dcbz hack we use the NX bit to flush&patch the page,
958 * so we can't use the NX bit inside the guest. Let's cross our fingers,
959 * that no guest that needs the dcbz hack does NX.
960 */
961 kvmppc_mmu_pte_flush(vcpu, kvmppc_get_pc(vcpu), ~0xFFFUL);
962 r = RESUME_GUEST;
963 } else {
964 u64 msr = kvmppc_get_msr(vcpu);
965 msr |= shadow_srr1 & 0x58000000;
966 kvmppc_set_msr_fast(vcpu, msr);
967 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
968 r = RESUME_GUEST;
969 }
970 break;
971 }
972 case BOOK3S_INTERRUPT_DATA_STORAGE:
973 {
974 ulong dar = kvmppc_get_fault_dar(vcpu);
975 u32 fault_dsisr = vcpu->arch.fault_dsisr;
976 vcpu->stat.pf_storage++;
977
978 #ifdef CONFIG_PPC_BOOK3S_32
979 /* We set segments as unused segments when invalidating them. So
980 * treat the respective fault as segment fault. */
981 {
982 struct kvmppc_book3s_shadow_vcpu *svcpu;
983 u32 sr;
984
985 svcpu = svcpu_get(vcpu);
986 sr = svcpu->sr[dar >> SID_SHIFT];
987 svcpu_put(svcpu);
988 if (sr == SR_INVALID) {
989 kvmppc_mmu_map_segment(vcpu, dar);
990 r = RESUME_GUEST;
991 break;
992 }
993 }
994 #endif
995
996 /*
997 * We need to handle missing shadow PTEs, and
998 * protection faults due to us mapping a page read-only
999 * when the guest thinks it is writable.
1000 */
1001 if (fault_dsisr & (DSISR_NOHPTE | DSISR_PROTFAULT)) {
1002 int idx = srcu_read_lock(&vcpu->kvm->srcu);
1003 r = kvmppc_handle_pagefault(run, vcpu, dar, exit_nr);
1004 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1005 } else {
1006 kvmppc_set_dar(vcpu, dar);
1007 kvmppc_set_dsisr(vcpu, fault_dsisr);
1008 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
1009 r = RESUME_GUEST;
1010 }
1011 break;
1012 }
1013 case BOOK3S_INTERRUPT_DATA_SEGMENT:
1014 if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_fault_dar(vcpu)) < 0) {
1015 kvmppc_set_dar(vcpu, kvmppc_get_fault_dar(vcpu));
1016 kvmppc_book3s_queue_irqprio(vcpu,
1017 BOOK3S_INTERRUPT_DATA_SEGMENT);
1018 }
1019 r = RESUME_GUEST;
1020 break;
1021 case BOOK3S_INTERRUPT_INST_SEGMENT:
1022 if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)) < 0) {
1023 kvmppc_book3s_queue_irqprio(vcpu,
1024 BOOK3S_INTERRUPT_INST_SEGMENT);
1025 }
1026 r = RESUME_GUEST;
1027 break;
1028 /* We're good on these - the host merely wanted to get our attention */
1029 case BOOK3S_INTERRUPT_DECREMENTER:
1030 case BOOK3S_INTERRUPT_HV_DECREMENTER:
1031 case BOOK3S_INTERRUPT_DOORBELL:
1032 case BOOK3S_INTERRUPT_H_DOORBELL:
1033 vcpu->stat.dec_exits++;
1034 r = RESUME_GUEST;
1035 break;
1036 case BOOK3S_INTERRUPT_EXTERNAL:
1037 case BOOK3S_INTERRUPT_EXTERNAL_LEVEL:
1038 case BOOK3S_INTERRUPT_EXTERNAL_HV:
1039 vcpu->stat.ext_intr_exits++;
1040 r = RESUME_GUEST;
1041 break;
1042 case BOOK3S_INTERRUPT_PERFMON:
1043 r = RESUME_GUEST;
1044 break;
1045 case BOOK3S_INTERRUPT_PROGRAM:
1046 case BOOK3S_INTERRUPT_H_EMUL_ASSIST:
1047 {
1048 enum emulation_result er;
1049 ulong flags;
1050 u32 last_inst;
1051 int emul;
1052
1053 program_interrupt:
1054 /*
1055 * shadow_srr1 only contains valid flags if we came here via
1056 * a program exception. The other exceptions (emulation assist,
1057 * FP unavailable, etc.) do not provide flags in SRR1, so use
1058 * an illegal-instruction exception when injecting a program
1059 * interrupt into the guest.
1060 */
1061 if (exit_nr == BOOK3S_INTERRUPT_PROGRAM)
1062 flags = vcpu->arch.shadow_srr1 & 0x1f0000ull;
1063 else
1064 flags = SRR1_PROGILL;
1065
1066 emul = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
1067 if (emul != EMULATE_DONE) {
1068 r = RESUME_GUEST;
1069 break;
1070 }
1071
1072 if (kvmppc_get_msr(vcpu) & MSR_PR) {
1073 #ifdef EXIT_DEBUG
1074 pr_info("Userspace triggered 0x700 exception at\n 0x%lx (0x%x)\n",
1075 kvmppc_get_pc(vcpu), last_inst);
1076 #endif
1077 if ((last_inst & 0xff0007ff) !=
1078 (INS_DCBZ & 0xfffffff7)) {
1079 kvmppc_core_queue_program(vcpu, flags);
1080 r = RESUME_GUEST;
1081 break;
1082 }
1083 }
1084
1085 vcpu->stat.emulated_inst_exits++;
1086 er = kvmppc_emulate_instruction(run, vcpu);
1087 switch (er) {
1088 case EMULATE_DONE:
1089 r = RESUME_GUEST_NV;
1090 break;
1091 case EMULATE_AGAIN:
1092 r = RESUME_GUEST;
1093 break;
1094 case EMULATE_FAIL:
1095 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
1096 __func__, kvmppc_get_pc(vcpu), last_inst);
1097 kvmppc_core_queue_program(vcpu, flags);
1098 r = RESUME_GUEST;
1099 break;
1100 case EMULATE_DO_MMIO:
1101 run->exit_reason = KVM_EXIT_MMIO;
1102 r = RESUME_HOST_NV;
1103 break;
1104 case EMULATE_EXIT_USER:
1105 r = RESUME_HOST_NV;
1106 break;
1107 default:
1108 BUG();
1109 }
1110 break;
1111 }
1112 case BOOK3S_INTERRUPT_SYSCALL:
1113 {
1114 u32 last_sc;
1115 int emul;
1116
1117 /* Get last sc for papr */
1118 if (vcpu->arch.papr_enabled) {
1119 /* The sc instuction points SRR0 to the next inst */
1120 emul = kvmppc_get_last_inst(vcpu, INST_SC, &last_sc);
1121 if (emul != EMULATE_DONE) {
1122 kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) - 4);
1123 r = RESUME_GUEST;
1124 break;
1125 }
1126 }
1127
1128 if (vcpu->arch.papr_enabled &&
1129 (last_sc == 0x44000022) &&
1130 !(kvmppc_get_msr(vcpu) & MSR_PR)) {
1131 /* SC 1 papr hypercalls */
1132 ulong cmd = kvmppc_get_gpr(vcpu, 3);
1133 int i;
1134
1135 #ifdef CONFIG_PPC_BOOK3S_64
1136 if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE) {
1137 r = RESUME_GUEST;
1138 break;
1139 }
1140 #endif
1141
1142 run->papr_hcall.nr = cmd;
1143 for (i = 0; i < 9; ++i) {
1144 ulong gpr = kvmppc_get_gpr(vcpu, 4 + i);
1145 run->papr_hcall.args[i] = gpr;
1146 }
1147 run->exit_reason = KVM_EXIT_PAPR_HCALL;
1148 vcpu->arch.hcall_needed = 1;
1149 r = RESUME_HOST;
1150 } else if (vcpu->arch.osi_enabled &&
1151 (((u32)kvmppc_get_gpr(vcpu, 3)) == OSI_SC_MAGIC_R3) &&
1152 (((u32)kvmppc_get_gpr(vcpu, 4)) == OSI_SC_MAGIC_R4)) {
1153 /* MOL hypercalls */
1154 u64 *gprs = run->osi.gprs;
1155 int i;
1156
1157 run->exit_reason = KVM_EXIT_OSI;
1158 for (i = 0; i < 32; i++)
1159 gprs[i] = kvmppc_get_gpr(vcpu, i);
1160 vcpu->arch.osi_needed = 1;
1161 r = RESUME_HOST_NV;
1162 } else if (!(kvmppc_get_msr(vcpu) & MSR_PR) &&
1163 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
1164 /* KVM PV hypercalls */
1165 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
1166 r = RESUME_GUEST;
1167 } else {
1168 /* Guest syscalls */
1169 vcpu->stat.syscall_exits++;
1170 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
1171 r = RESUME_GUEST;
1172 }
1173 break;
1174 }
1175 case BOOK3S_INTERRUPT_FP_UNAVAIL:
1176 case BOOK3S_INTERRUPT_ALTIVEC:
1177 case BOOK3S_INTERRUPT_VSX:
1178 {
1179 int ext_msr = 0;
1180 int emul;
1181 u32 last_inst;
1182
1183 if (vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE) {
1184 /* Do paired single instruction emulation */
1185 emul = kvmppc_get_last_inst(vcpu, INST_GENERIC,
1186 &last_inst);
1187 if (emul == EMULATE_DONE)
1188 goto program_interrupt;
1189 else
1190 r = RESUME_GUEST;
1191
1192 break;
1193 }
1194
1195 /* Enable external provider */
1196 switch (exit_nr) {
1197 case BOOK3S_INTERRUPT_FP_UNAVAIL:
1198 ext_msr = MSR_FP;
1199 break;
1200
1201 case BOOK3S_INTERRUPT_ALTIVEC:
1202 ext_msr = MSR_VEC;
1203 break;
1204
1205 case BOOK3S_INTERRUPT_VSX:
1206 ext_msr = MSR_VSX;
1207 break;
1208 }
1209
1210 r = kvmppc_handle_ext(vcpu, exit_nr, ext_msr);
1211 break;
1212 }
1213 case BOOK3S_INTERRUPT_ALIGNMENT:
1214 {
1215 u32 last_inst;
1216 int emul = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
1217
1218 if (emul == EMULATE_DONE) {
1219 u32 dsisr;
1220 u64 dar;
1221
1222 dsisr = kvmppc_alignment_dsisr(vcpu, last_inst);
1223 dar = kvmppc_alignment_dar(vcpu, last_inst);
1224
1225 kvmppc_set_dsisr(vcpu, dsisr);
1226 kvmppc_set_dar(vcpu, dar);
1227
1228 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
1229 }
1230 r = RESUME_GUEST;
1231 break;
1232 }
1233 #ifdef CONFIG_PPC_BOOK3S_64
1234 case BOOK3S_INTERRUPT_FAC_UNAVAIL:
1235 kvmppc_handle_fac(vcpu, vcpu->arch.shadow_fscr >> 56);
1236 r = RESUME_GUEST;
1237 break;
1238 #endif
1239 case BOOK3S_INTERRUPT_MACHINE_CHECK:
1240 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
1241 r = RESUME_GUEST;
1242 break;
1243 case BOOK3S_INTERRUPT_TRACE:
1244 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
1245 run->exit_reason = KVM_EXIT_DEBUG;
1246 r = RESUME_HOST;
1247 } else {
1248 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
1249 r = RESUME_GUEST;
1250 }
1251 break;
1252 default:
1253 {
1254 ulong shadow_srr1 = vcpu->arch.shadow_srr1;
1255 /* Ugh - bork here! What did we get? */
1256 printk(KERN_EMERG "exit_nr=0x%x | pc=0x%lx | msr=0x%lx\n",
1257 exit_nr, kvmppc_get_pc(vcpu), shadow_srr1);
1258 r = RESUME_HOST;
1259 BUG();
1260 break;
1261 }
1262 }
1263
1264 if (!(r & RESUME_HOST)) {
1265 /* To avoid clobbering exit_reason, only check for signals if
1266 * we aren't already exiting to userspace for some other
1267 * reason. */
1268
1269 /*
1270 * Interrupts could be timers for the guest which we have to
1271 * inject again, so let's postpone them until we're in the guest
1272 * and if we really did time things so badly, then we just exit
1273 * again due to a host external interrupt.
1274 */
1275 s = kvmppc_prepare_to_enter(vcpu);
1276 if (s <= 0)
1277 r = s;
1278 else {
1279 /* interrupts now hard-disabled */
1280 kvmppc_fix_ee_before_entry();
1281 }
1282
1283 kvmppc_handle_lost_ext(vcpu);
1284 }
1285
1286 trace_kvm_book3s_reenter(r, vcpu);
1287
1288 return r;
1289 }
1290
1291 static int kvm_arch_vcpu_ioctl_get_sregs_pr(struct kvm_vcpu *vcpu,
1292 struct kvm_sregs *sregs)
1293 {
1294 struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
1295 int i;
1296
1297 sregs->pvr = vcpu->arch.pvr;
1298
1299 sregs->u.s.sdr1 = to_book3s(vcpu)->sdr1;
1300 if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) {
1301 for (i = 0; i < 64; i++) {
1302 sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige | i;
1303 sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv;
1304 }
1305 } else {
1306 for (i = 0; i < 16; i++)
1307 sregs->u.s.ppc32.sr[i] = kvmppc_get_sr(vcpu, i);
1308
1309 for (i = 0; i < 8; i++) {
1310 sregs->u.s.ppc32.ibat[i] = vcpu3s->ibat[i].raw;
1311 sregs->u.s.ppc32.dbat[i] = vcpu3s->dbat[i].raw;
1312 }
1313 }
1314
1315 return 0;
1316 }
1317
1318 static int kvm_arch_vcpu_ioctl_set_sregs_pr(struct kvm_vcpu *vcpu,
1319 struct kvm_sregs *sregs)
1320 {
1321 struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
1322 int i;
1323
1324 kvmppc_set_pvr_pr(vcpu, sregs->pvr);
1325
1326 vcpu3s->sdr1 = sregs->u.s.sdr1;
1327 if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) {
1328 for (i = 0; i < 64; i++) {
1329 vcpu->arch.mmu.slbmte(vcpu, sregs->u.s.ppc64.slb[i].slbv,
1330 sregs->u.s.ppc64.slb[i].slbe);
1331 }
1332 } else {
1333 for (i = 0; i < 16; i++) {
1334 vcpu->arch.mmu.mtsrin(vcpu, i, sregs->u.s.ppc32.sr[i]);
1335 }
1336 for (i = 0; i < 8; i++) {
1337 kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), false,
1338 (u32)sregs->u.s.ppc32.ibat[i]);
1339 kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), true,
1340 (u32)(sregs->u.s.ppc32.ibat[i] >> 32));
1341 kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), false,
1342 (u32)sregs->u.s.ppc32.dbat[i]);
1343 kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), true,
1344 (u32)(sregs->u.s.ppc32.dbat[i] >> 32));
1345 }
1346 }
1347
1348 /* Flush the MMU after messing with the segments */
1349 kvmppc_mmu_pte_flush(vcpu, 0, 0);
1350
1351 return 0;
1352 }
1353
1354 static int kvmppc_get_one_reg_pr(struct kvm_vcpu *vcpu, u64 id,
1355 union kvmppc_one_reg *val)
1356 {
1357 int r = 0;
1358
1359 switch (id) {
1360 case KVM_REG_PPC_DEBUG_INST:
1361 *val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT);
1362 break;
1363 case KVM_REG_PPC_HIOR:
1364 *val = get_reg_val(id, to_book3s(vcpu)->hior);
1365 break;
1366 case KVM_REG_PPC_VTB:
1367 *val = get_reg_val(id, to_book3s(vcpu)->vtb);
1368 break;
1369 case KVM_REG_PPC_LPCR:
1370 case KVM_REG_PPC_LPCR_64:
1371 /*
1372 * We are only interested in the LPCR_ILE bit
1373 */
1374 if (vcpu->arch.intr_msr & MSR_LE)
1375 *val = get_reg_val(id, LPCR_ILE);
1376 else
1377 *val = get_reg_val(id, 0);
1378 break;
1379 default:
1380 r = -EINVAL;
1381 break;
1382 }
1383
1384 return r;
1385 }
1386
1387 static void kvmppc_set_lpcr_pr(struct kvm_vcpu *vcpu, u64 new_lpcr)
1388 {
1389 if (new_lpcr & LPCR_ILE)
1390 vcpu->arch.intr_msr |= MSR_LE;
1391 else
1392 vcpu->arch.intr_msr &= ~MSR_LE;
1393 }
1394
1395 static int kvmppc_set_one_reg_pr(struct kvm_vcpu *vcpu, u64 id,
1396 union kvmppc_one_reg *val)
1397 {
1398 int r = 0;
1399
1400 switch (id) {
1401 case KVM_REG_PPC_HIOR:
1402 to_book3s(vcpu)->hior = set_reg_val(id, *val);
1403 to_book3s(vcpu)->hior_explicit = true;
1404 break;
1405 case KVM_REG_PPC_VTB:
1406 to_book3s(vcpu)->vtb = set_reg_val(id, *val);
1407 break;
1408 case KVM_REG_PPC_LPCR:
1409 case KVM_REG_PPC_LPCR_64:
1410 kvmppc_set_lpcr_pr(vcpu, set_reg_val(id, *val));
1411 break;
1412 default:
1413 r = -EINVAL;
1414 break;
1415 }
1416
1417 return r;
1418 }
1419
1420 static struct kvm_vcpu *kvmppc_core_vcpu_create_pr(struct kvm *kvm,
1421 unsigned int id)
1422 {
1423 struct kvmppc_vcpu_book3s *vcpu_book3s;
1424 struct kvm_vcpu *vcpu;
1425 int err = -ENOMEM;
1426 unsigned long p;
1427
1428 vcpu = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
1429 if (!vcpu)
1430 goto out;
1431
1432 vcpu_book3s = vzalloc(sizeof(struct kvmppc_vcpu_book3s));
1433 if (!vcpu_book3s)
1434 goto free_vcpu;
1435 vcpu->arch.book3s = vcpu_book3s;
1436
1437 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1438 vcpu->arch.shadow_vcpu =
1439 kzalloc(sizeof(*vcpu->arch.shadow_vcpu), GFP_KERNEL);
1440 if (!vcpu->arch.shadow_vcpu)
1441 goto free_vcpu3s;
1442 #endif
1443
1444 err = kvm_vcpu_init(vcpu, kvm, id);
1445 if (err)
1446 goto free_shadow_vcpu;
1447
1448 err = -ENOMEM;
1449 p = __get_free_page(GFP_KERNEL|__GFP_ZERO);
1450 if (!p)
1451 goto uninit_vcpu;
1452 vcpu->arch.shared = (void *)p;
1453 #ifdef CONFIG_PPC_BOOK3S_64
1454 /* Always start the shared struct in native endian mode */
1455 #ifdef __BIG_ENDIAN__
1456 vcpu->arch.shared_big_endian = true;
1457 #else
1458 vcpu->arch.shared_big_endian = false;
1459 #endif
1460
1461 /*
1462 * Default to the same as the host if we're on sufficiently
1463 * recent machine that we have 1TB segments;
1464 * otherwise default to PPC970FX.
1465 */
1466 vcpu->arch.pvr = 0x3C0301;
1467 if (mmu_has_feature(MMU_FTR_1T_SEGMENT))
1468 vcpu->arch.pvr = mfspr(SPRN_PVR);
1469 vcpu->arch.intr_msr = MSR_SF;
1470 #else
1471 /* default to book3s_32 (750) */
1472 vcpu->arch.pvr = 0x84202;
1473 #endif
1474 kvmppc_set_pvr_pr(vcpu, vcpu->arch.pvr);
1475 vcpu->arch.slb_nr = 64;
1476
1477 vcpu->arch.shadow_msr = MSR_USER64 & ~MSR_LE;
1478
1479 err = kvmppc_mmu_init(vcpu);
1480 if (err < 0)
1481 goto uninit_vcpu;
1482
1483 return vcpu;
1484
1485 uninit_vcpu:
1486 kvm_vcpu_uninit(vcpu);
1487 free_shadow_vcpu:
1488 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1489 kfree(vcpu->arch.shadow_vcpu);
1490 free_vcpu3s:
1491 #endif
1492 vfree(vcpu_book3s);
1493 free_vcpu:
1494 kmem_cache_free(kvm_vcpu_cache, vcpu);
1495 out:
1496 return ERR_PTR(err);
1497 }
1498
1499 static void kvmppc_core_vcpu_free_pr(struct kvm_vcpu *vcpu)
1500 {
1501 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
1502
1503 free_page((unsigned long)vcpu->arch.shared & PAGE_MASK);
1504 kvm_vcpu_uninit(vcpu);
1505 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
1506 kfree(vcpu->arch.shadow_vcpu);
1507 #endif
1508 vfree(vcpu_book3s);
1509 kmem_cache_free(kvm_vcpu_cache, vcpu);
1510 }
1511
1512 static int kvmppc_vcpu_run_pr(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1513 {
1514 int ret;
1515 #ifdef CONFIG_ALTIVEC
1516 unsigned long uninitialized_var(vrsave);
1517 #endif
1518
1519 /* Check if we can run the vcpu at all */
1520 if (!vcpu->arch.sane) {
1521 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1522 ret = -EINVAL;
1523 goto out;
1524 }
1525
1526 kvmppc_setup_debug(vcpu);
1527
1528 /*
1529 * Interrupts could be timers for the guest which we have to inject
1530 * again, so let's postpone them until we're in the guest and if we
1531 * really did time things so badly, then we just exit again due to
1532 * a host external interrupt.
1533 */
1534 ret = kvmppc_prepare_to_enter(vcpu);
1535 if (ret <= 0)
1536 goto out;
1537 /* interrupts now hard-disabled */
1538
1539 /* Save FPU, Altivec and VSX state */
1540 giveup_all(current);
1541
1542 /* Preload FPU if it's enabled */
1543 if (kvmppc_get_msr(vcpu) & MSR_FP)
1544 kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP);
1545
1546 kvmppc_fix_ee_before_entry();
1547
1548 ret = __kvmppc_vcpu_run(kvm_run, vcpu);
1549
1550 kvmppc_clear_debug(vcpu);
1551
1552 /* No need for guest_exit. It's done in handle_exit.
1553 We also get here with interrupts enabled. */
1554
1555 /* Make sure we save the guest FPU/Altivec/VSX state */
1556 kvmppc_giveup_ext(vcpu, MSR_FP | MSR_VEC | MSR_VSX);
1557
1558 /* Make sure we save the guest TAR/EBB/DSCR state */
1559 kvmppc_giveup_fac(vcpu, FSCR_TAR_LG);
1560
1561 out:
1562 vcpu->mode = OUTSIDE_GUEST_MODE;
1563 return ret;
1564 }
1565
1566 /*
1567 * Get (and clear) the dirty memory log for a memory slot.
1568 */
1569 static int kvm_vm_ioctl_get_dirty_log_pr(struct kvm *kvm,
1570 struct kvm_dirty_log *log)
1571 {
1572 struct kvm_memslots *slots;
1573 struct kvm_memory_slot *memslot;
1574 struct kvm_vcpu *vcpu;
1575 ulong ga, ga_end;
1576 int is_dirty = 0;
1577 int r;
1578 unsigned long n;
1579
1580 mutex_lock(&kvm->slots_lock);
1581
1582 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1583 if (r)
1584 goto out;
1585
1586 /* If nothing is dirty, don't bother messing with page tables. */
1587 if (is_dirty) {
1588 slots = kvm_memslots(kvm);
1589 memslot = id_to_memslot(slots, log->slot);
1590
1591 ga = memslot->base_gfn << PAGE_SHIFT;
1592 ga_end = ga + (memslot->npages << PAGE_SHIFT);
1593
1594 kvm_for_each_vcpu(n, vcpu, kvm)
1595 kvmppc_mmu_pte_pflush(vcpu, ga, ga_end);
1596
1597 n = kvm_dirty_bitmap_bytes(memslot);
1598 memset(memslot->dirty_bitmap, 0, n);
1599 }
1600
1601 r = 0;
1602 out:
1603 mutex_unlock(&kvm->slots_lock);
1604 return r;
1605 }
1606
1607 static void kvmppc_core_flush_memslot_pr(struct kvm *kvm,
1608 struct kvm_memory_slot *memslot)
1609 {
1610 return;
1611 }
1612
1613 static int kvmppc_core_prepare_memory_region_pr(struct kvm *kvm,
1614 struct kvm_memory_slot *memslot,
1615 const struct kvm_userspace_memory_region *mem)
1616 {
1617 return 0;
1618 }
1619
1620 static void kvmppc_core_commit_memory_region_pr(struct kvm *kvm,
1621 const struct kvm_userspace_memory_region *mem,
1622 const struct kvm_memory_slot *old,
1623 const struct kvm_memory_slot *new)
1624 {
1625 return;
1626 }
1627
1628 static void kvmppc_core_free_memslot_pr(struct kvm_memory_slot *free,
1629 struct kvm_memory_slot *dont)
1630 {
1631 return;
1632 }
1633
1634 static int kvmppc_core_create_memslot_pr(struct kvm_memory_slot *slot,
1635 unsigned long npages)
1636 {
1637 return 0;
1638 }
1639
1640
1641 #ifdef CONFIG_PPC64
1642 static int kvm_vm_ioctl_get_smmu_info_pr(struct kvm *kvm,
1643 struct kvm_ppc_smmu_info *info)
1644 {
1645 long int i;
1646 struct kvm_vcpu *vcpu;
1647
1648 info->flags = 0;
1649
1650 /* SLB is always 64 entries */
1651 info->slb_size = 64;
1652
1653 /* Standard 4k base page size segment */
1654 info->sps[0].page_shift = 12;
1655 info->sps[0].slb_enc = 0;
1656 info->sps[0].enc[0].page_shift = 12;
1657 info->sps[0].enc[0].pte_enc = 0;
1658
1659 /*
1660 * 64k large page size.
1661 * We only want to put this in if the CPUs we're emulating
1662 * support it, but unfortunately we don't have a vcpu easily
1663 * to hand here to test. Just pick the first vcpu, and if
1664 * that doesn't exist yet, report the minimum capability,
1665 * i.e., no 64k pages.
1666 * 1T segment support goes along with 64k pages.
1667 */
1668 i = 1;
1669 vcpu = kvm_get_vcpu(kvm, 0);
1670 if (vcpu && (vcpu->arch.hflags & BOOK3S_HFLAG_MULTI_PGSIZE)) {
1671 info->flags = KVM_PPC_1T_SEGMENTS;
1672 info->sps[i].page_shift = 16;
1673 info->sps[i].slb_enc = SLB_VSID_L | SLB_VSID_LP_01;
1674 info->sps[i].enc[0].page_shift = 16;
1675 info->sps[i].enc[0].pte_enc = 1;
1676 ++i;
1677 }
1678
1679 /* Standard 16M large page size segment */
1680 info->sps[i].page_shift = 24;
1681 info->sps[i].slb_enc = SLB_VSID_L;
1682 info->sps[i].enc[0].page_shift = 24;
1683 info->sps[i].enc[0].pte_enc = 0;
1684
1685 return 0;
1686 }
1687 #else
1688 static int kvm_vm_ioctl_get_smmu_info_pr(struct kvm *kvm,
1689 struct kvm_ppc_smmu_info *info)
1690 {
1691 /* We should not get called */
1692 BUG();
1693 }
1694 #endif /* CONFIG_PPC64 */
1695
1696 static unsigned int kvm_global_user_count = 0;
1697 static DEFINE_SPINLOCK(kvm_global_user_count_lock);
1698
1699 static int kvmppc_core_init_vm_pr(struct kvm *kvm)
1700 {
1701 mutex_init(&kvm->arch.hpt_mutex);
1702
1703 #ifdef CONFIG_PPC_BOOK3S_64
1704 /* Start out with the default set of hcalls enabled */
1705 kvmppc_pr_init_default_hcalls(kvm);
1706 #endif
1707
1708 if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
1709 spin_lock(&kvm_global_user_count_lock);
1710 if (++kvm_global_user_count == 1)
1711 pseries_disable_reloc_on_exc();
1712 spin_unlock(&kvm_global_user_count_lock);
1713 }
1714 return 0;
1715 }
1716
1717 static void kvmppc_core_destroy_vm_pr(struct kvm *kvm)
1718 {
1719 #ifdef CONFIG_PPC64
1720 WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables));
1721 #endif
1722
1723 if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
1724 spin_lock(&kvm_global_user_count_lock);
1725 BUG_ON(kvm_global_user_count == 0);
1726 if (--kvm_global_user_count == 0)
1727 pseries_enable_reloc_on_exc();
1728 spin_unlock(&kvm_global_user_count_lock);
1729 }
1730 }
1731
1732 static int kvmppc_core_check_processor_compat_pr(void)
1733 {
1734 /*
1735 * Disable KVM for Power9 untill the required bits merged.
1736 */
1737 if (cpu_has_feature(CPU_FTR_ARCH_300))
1738 return -EIO;
1739 return 0;
1740 }
1741
1742 static long kvm_arch_vm_ioctl_pr(struct file *filp,
1743 unsigned int ioctl, unsigned long arg)
1744 {
1745 return -ENOTTY;
1746 }
1747
1748 static struct kvmppc_ops kvm_ops_pr = {
1749 .get_sregs = kvm_arch_vcpu_ioctl_get_sregs_pr,
1750 .set_sregs = kvm_arch_vcpu_ioctl_set_sregs_pr,
1751 .get_one_reg = kvmppc_get_one_reg_pr,
1752 .set_one_reg = kvmppc_set_one_reg_pr,
1753 .vcpu_load = kvmppc_core_vcpu_load_pr,
1754 .vcpu_put = kvmppc_core_vcpu_put_pr,
1755 .set_msr = kvmppc_set_msr_pr,
1756 .vcpu_run = kvmppc_vcpu_run_pr,
1757 .vcpu_create = kvmppc_core_vcpu_create_pr,
1758 .vcpu_free = kvmppc_core_vcpu_free_pr,
1759 .check_requests = kvmppc_core_check_requests_pr,
1760 .get_dirty_log = kvm_vm_ioctl_get_dirty_log_pr,
1761 .flush_memslot = kvmppc_core_flush_memslot_pr,
1762 .prepare_memory_region = kvmppc_core_prepare_memory_region_pr,
1763 .commit_memory_region = kvmppc_core_commit_memory_region_pr,
1764 .unmap_hva = kvm_unmap_hva_pr,
1765 .unmap_hva_range = kvm_unmap_hva_range_pr,
1766 .age_hva = kvm_age_hva_pr,
1767 .test_age_hva = kvm_test_age_hva_pr,
1768 .set_spte_hva = kvm_set_spte_hva_pr,
1769 .mmu_destroy = kvmppc_mmu_destroy_pr,
1770 .free_memslot = kvmppc_core_free_memslot_pr,
1771 .create_memslot = kvmppc_core_create_memslot_pr,
1772 .init_vm = kvmppc_core_init_vm_pr,
1773 .destroy_vm = kvmppc_core_destroy_vm_pr,
1774 .get_smmu_info = kvm_vm_ioctl_get_smmu_info_pr,
1775 .emulate_op = kvmppc_core_emulate_op_pr,
1776 .emulate_mtspr = kvmppc_core_emulate_mtspr_pr,
1777 .emulate_mfspr = kvmppc_core_emulate_mfspr_pr,
1778 .fast_vcpu_kick = kvm_vcpu_kick,
1779 .arch_vm_ioctl = kvm_arch_vm_ioctl_pr,
1780 #ifdef CONFIG_PPC_BOOK3S_64
1781 .hcall_implemented = kvmppc_hcall_impl_pr,
1782 #endif
1783 };
1784
1785
1786 int kvmppc_book3s_init_pr(void)
1787 {
1788 int r;
1789
1790 r = kvmppc_core_check_processor_compat_pr();
1791 if (r < 0)
1792 return r;
1793
1794 kvm_ops_pr.owner = THIS_MODULE;
1795 kvmppc_pr_ops = &kvm_ops_pr;
1796
1797 r = kvmppc_mmu_hpte_sysinit();
1798 return r;
1799 }
1800
1801 void kvmppc_book3s_exit_pr(void)
1802 {
1803 kvmppc_pr_ops = NULL;
1804 kvmppc_mmu_hpte_sysexit();
1805 }
1806
1807 /*
1808 * We only support separate modules for book3s 64
1809 */
1810 #ifdef CONFIG_PPC_BOOK3S_64
1811
1812 module_init(kvmppc_book3s_init_pr);
1813 module_exit(kvmppc_book3s_exit_pr);
1814
1815 MODULE_LICENSE("GPL");
1816 MODULE_ALIAS_MISCDEV(KVM_MINOR);
1817 MODULE_ALIAS("devname:kvm");
1818 #endif
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