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1 /*
2 * (C) Copyright 2000-2011
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24 #include <common.h>
25 #include <watchdog.h>
26 #include <command.h>
27 #include <malloc.h>
28 #include <stdio_dev.h>
29 #ifdef CONFIG_8xx
30 #include <mpc8xx.h>
31 #endif
32 #ifdef CONFIG_5xx
33 #include <mpc5xx.h>
34 #endif
35 #ifdef CONFIG_MPC5xxx
36 #include <mpc5xxx.h>
37 #endif
38 #if defined(CONFIG_CMD_IDE)
39 #include <ide.h>
40 #endif
41 #if defined(CONFIG_CMD_SCSI)
42 #include <scsi.h>
43 #endif
44 #if defined(CONFIG_CMD_KGDB)
45 #include <kgdb.h>
46 #endif
47 #ifdef CONFIG_STATUS_LED
48 #include <status_led.h>
49 #endif
50 #include <net.h>
51 #ifdef CONFIG_GENERIC_MMC
52 #include <mmc.h>
53 #endif
54 #include <serial.h>
55 #ifdef CONFIG_SYS_ALLOC_DPRAM
56 #if !defined(CONFIG_CPM2)
57 #include <commproc.h>
58 #endif
59 #endif
60 #include <version.h>
61 #if defined(CONFIG_BAB7xx)
62 #include <w83c553f.h>
63 #endif
64 #include <dtt.h>
65 #if defined(CONFIG_POST)
66 #include <post.h>
67 #endif
68 #if defined(CONFIG_LOGBUFFER)
69 #include <logbuff.h>
70 #endif
71 #if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500)
72 #include <asm/cache.h>
73 #endif
74 #ifdef CONFIG_PS2KBD
75 #include <keyboard.h>
76 #endif
77
78 #ifdef CONFIG_ADDR_MAP
79 #include <asm/mmu.h>
80 #endif
81
82 #ifdef CONFIG_MP
83 #include <asm/mp.h>
84 #endif
85
86 #ifdef CONFIG_BITBANGMII
87 #include <miiphy.h>
88 #endif
89
90 #ifdef CONFIG_SYS_UPDATE_FLASH_SIZE
91 extern int update_flash_size(int flash_size);
92 #endif
93
94 #if defined(CONFIG_SC3)
95 extern void sc3_read_eeprom(void);
96 #endif
97
98 #if defined(CONFIG_CMD_DOC)
99 void doc_init(void);
100 #endif
101 #if defined(CONFIG_HARD_I2C) || \
102 defined(CONFIG_SOFT_I2C)
103 #include <i2c.h>
104 #endif
105 #include <spi.h>
106 #include <nand.h>
107
108 static char *failed = "*** failed ***\n";
109
110 #if defined(CONFIG_OXC) || defined(CONFIG_RMU)
111 extern flash_info_t flash_info[];
112 #endif
113
114 #if defined(CONFIG_START_IDE)
115 extern int board_start_ide(void);
116 #endif
117 #include <environment.h>
118
119 DECLARE_GLOBAL_DATA_PTR;
120
121 #if !defined(CONFIG_SYS_MEM_TOP_HIDE)
122 #define CONFIG_SYS_MEM_TOP_HIDE 0
123 #endif
124
125 extern ulong __init_end;
126 extern ulong __bss_end__;
127 ulong monitor_flash_len;
128
129 #if defined(CONFIG_CMD_BEDBUG)
130 #include <bedbug/type.h>
131 #endif
132
133 /*
134 * Utilities
135 */
136
137 /*
138 * All attempts to come up with a "common" initialization sequence
139 * that works for all boards and architectures failed: some of the
140 * requirements are just _too_ different. To get rid of the resulting
141 * mess of board dependend #ifdef'ed code we now make the whole
142 * initialization sequence configurable to the user.
143 *
144 * The requirements for any new initalization function is simple: it
145 * receives a pointer to the "global data" structure as it's only
146 * argument, and returns an integer return code, where 0 means
147 * "continue" and != 0 means "fatal error, hang the system".
148 */
149 typedef int (init_fnc_t)(void);
150
151 /*
152 * Init Utilities
153 *
154 * Some of this code should be moved into the core functions,
155 * but let's get it working (again) first...
156 */
157
158 static int init_baudrate(void)
159 {
160 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
161 return 0;
162 }
163
164 /***********************************************************************/
165
166 static void __board_add_ram_info(int use_default)
167 {
168 /* please define platform specific board_add_ram_info() */
169 }
170
171 void board_add_ram_info(int)
172 __attribute__ ((weak, alias("__board_add_ram_info")));
173
174 static int __board_flash_wp_on(void)
175 {
176 /*
177 * Most flashes can't be detected when write protection is enabled,
178 * so provide a way to let U-Boot gracefully ignore write protected
179 * devices.
180 */
181 return 0;
182 }
183
184 int board_flash_wp_on(void)
185 __attribute__ ((weak, alias("__board_flash_wp_on")));
186
187 static void __cpu_secondary_init_r(void)
188 {
189 }
190
191 void cpu_secondary_init_r(void)
192 __attribute__ ((weak, alias("__cpu_secondary_init_r")));
193
194 static int init_func_ram(void)
195 {
196 #ifdef CONFIG_BOARD_TYPES
197 int board_type = gd->board_type;
198 #else
199 int board_type = 0; /* use dummy arg */
200 #endif
201 puts("DRAM: ");
202
203 gd->ram_size = initdram(board_type);
204
205 if (gd->ram_size > 0) {
206 print_size(gd->ram_size, "");
207 board_add_ram_info(0);
208 putc('\n');
209 return 0;
210 }
211 puts(failed);
212 return 1;
213 }
214
215 /***********************************************************************/
216
217 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
218 static int init_func_i2c(void)
219 {
220 puts("I2C: ");
221 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
222 puts("ready\n");
223 return 0;
224 }
225 #endif
226
227 #if defined(CONFIG_HARD_SPI)
228 static int init_func_spi(void)
229 {
230 puts("SPI: ");
231 spi_init();
232 puts("ready\n");
233 return 0;
234 }
235 #endif
236
237 /***********************************************************************/
238
239 #if defined(CONFIG_WATCHDOG)
240 static int init_func_watchdog_init(void)
241 {
242 puts(" Watchdog enabled\n");
243 WATCHDOG_RESET();
244 return 0;
245 }
246
247 #define INIT_FUNC_WATCHDOG_INIT init_func_watchdog_init,
248
249 static int init_func_watchdog_reset(void)
250 {
251 WATCHDOG_RESET();
252 return 0;
253 }
254
255 #define INIT_FUNC_WATCHDOG_RESET init_func_watchdog_reset,
256 #else
257 #define INIT_FUNC_WATCHDOG_INIT /* undef */
258 #define INIT_FUNC_WATCHDOG_RESET /* undef */
259 #endif /* CONFIG_WATCHDOG */
260
261 /*
262 * Initialization sequence
263 */
264
265 static init_fnc_t *init_sequence[] = {
266 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
267 probecpu,
268 #endif
269 #if defined(CONFIG_BOARD_EARLY_INIT_F)
270 board_early_init_f,
271 #endif
272 #if !defined(CONFIG_8xx_CPUCLK_DEFAULT)
273 get_clocks, /* get CPU and bus clocks (etc.) */
274 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
275 && !defined(CONFIG_TQM885D)
276 adjust_sdram_tbs_8xx,
277 #endif
278 init_timebase,
279 #endif
280 #ifdef CONFIG_SYS_ALLOC_DPRAM
281 #if !defined(CONFIG_CPM2)
282 dpram_init,
283 #endif
284 #endif
285 #if defined(CONFIG_BOARD_POSTCLK_INIT)
286 board_postclk_init,
287 #endif
288 env_init,
289 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
290 /* get CPU and bus clocks according to the environment variable */
291 get_clocks_866,
292 /* adjust sdram refresh rate according to the new clock */
293 sdram_adjust_866,
294 init_timebase,
295 #endif
296 init_baudrate,
297 serial_init,
298 console_init_f,
299 display_options,
300 #if defined(CONFIG_8260)
301 prt_8260_rsr,
302 prt_8260_clks,
303 #endif /* CONFIG_8260 */
304 #if defined(CONFIG_MPC83xx)
305 prt_83xx_rsr,
306 #endif
307 checkcpu,
308 #if defined(CONFIG_MPC5xxx)
309 prt_mpc5xxx_clks,
310 #endif /* CONFIG_MPC5xxx */
311 #if defined(CONFIG_MPC8220)
312 prt_mpc8220_clks,
313 #endif
314 checkboard,
315 INIT_FUNC_WATCHDOG_INIT
316 #if defined(CONFIG_MISC_INIT_F)
317 misc_init_f,
318 #endif
319 INIT_FUNC_WATCHDOG_RESET
320 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
321 init_func_i2c,
322 #endif
323 #if defined(CONFIG_HARD_SPI)
324 init_func_spi,
325 #endif
326 #ifdef CONFIG_POST
327 post_init_f,
328 #endif
329 INIT_FUNC_WATCHDOG_RESET init_func_ram,
330 #if defined(CONFIG_SYS_DRAM_TEST)
331 testdram,
332 #endif /* CONFIG_SYS_DRAM_TEST */
333 INIT_FUNC_WATCHDOG_RESET
334 NULL, /* Terminate this list */
335 };
336
337 ulong get_effective_memsize(void)
338 {
339 #ifndef CONFIG_VERY_BIG_RAM
340 return gd->ram_size;
341 #else
342 /* limit stack to what we can reasonable map */
343 return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ?
344 CONFIG_MAX_MEM_MAPPED : gd->ram_size);
345 #endif
346 }
347
348 static int __fixup_cpu(void)
349 {
350 return 0;
351 }
352
353 int fixup_cpu(void) __attribute__((weak, alias("__fixup_cpu")));
354
355 /*
356 * This is the first part of the initialization sequence that is
357 * implemented in C, but still running from ROM.
358 *
359 * The main purpose is to provide a (serial) console interface as
360 * soon as possible (so we can see any error messages), and to
361 * initialize the RAM so that we can relocate the monitor code to
362 * RAM.
363 *
364 * Be aware of the restrictions: global data is read-only, BSS is not
365 * initialized, and stack space is limited to a few kB.
366 */
367
368 #ifdef CONFIG_LOGBUFFER
369 unsigned long logbuffer_base(void)
370 {
371 return CONFIG_SYS_SDRAM_BASE + get_effective_memsize() - LOGBUFF_LEN;
372 }
373 #endif
374
375 void board_init_f(ulong bootflag)
376 {
377 bd_t *bd;
378 ulong len, addr, addr_sp;
379 ulong *s;
380 gd_t *id;
381 init_fnc_t **init_fnc_ptr;
382
383 #ifdef CONFIG_PRAM
384 ulong reg;
385 #endif
386
387 /* Pointer is writable since we allocated a register for it */
388 gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
389 /* compiler optimization barrier needed for GCC >= 3.4 */
390 __asm__ __volatile__("":::"memory");
391
392 #if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \
393 !defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \
394 !defined(CONFIG_MPC86xx)
395 /* Clear initial global data */
396 memset((void *) gd, 0, sizeof(gd_t));
397 #endif
398
399 for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr)
400 if ((*init_fnc_ptr) () != 0)
401 hang();
402
403 #ifdef CONFIG_POST
404 post_bootmode_init();
405 post_run(NULL, POST_ROM | post_bootmode_get(NULL));
406 #endif
407
408 WATCHDOG_RESET();
409
410 /*
411 * Now that we have DRAM mapped and working, we can
412 * relocate the code and continue running from DRAM.
413 *
414 * Reserve memory at end of RAM for (top down in that order):
415 * - area that won't get touched by U-Boot and Linux (optional)
416 * - kernel log buffer
417 * - protected RAM
418 * - LCD framebuffer
419 * - monitor code
420 * - board info struct
421 */
422 len = (ulong)&__bss_end__ - CONFIG_SYS_MONITOR_BASE;
423
424 /*
425 * Subtract specified amount of memory to hide so that it won't
426 * get "touched" at all by U-Boot. By fixing up gd->ram_size
427 * the Linux kernel should now get passed the now "corrected"
428 * memory size and won't touch it either. This should work
429 * for arch/ppc and arch/powerpc. Only Linux board ports in
430 * arch/powerpc with bootwrapper support, that recalculate the
431 * memory size from the SDRAM controller setup will have to
432 * get fixed.
433 */
434 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
435
436 addr = CONFIG_SYS_SDRAM_BASE + get_effective_memsize();
437
438 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
439 /*
440 * We need to make sure the location we intend to put secondary core
441 * boot code is reserved and not used by any part of u-boot
442 */
443 if (addr > determine_mp_bootpg(NULL)) {
444 addr = determine_mp_bootpg(NULL);
445 debug("Reserving MP boot page to %08lx\n", addr);
446 }
447 #endif
448
449 #ifdef CONFIG_LOGBUFFER
450 #ifndef CONFIG_ALT_LB_ADDR
451 /* reserve kernel log buffer */
452 addr -= (LOGBUFF_RESERVE);
453 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
454 addr);
455 #endif
456 #endif
457
458 #ifdef CONFIG_PRAM
459 /*
460 * reserve protected RAM
461 */
462 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
463 addr -= (reg << 10); /* size is in kB */
464 debug("Reserving %ldk for protected RAM at %08lx\n", reg, addr);
465 #endif /* CONFIG_PRAM */
466
467 /* round down to next 4 kB limit */
468 addr &= ~(4096 - 1);
469 debug("Top of RAM usable for U-Boot at: %08lx\n", addr);
470
471 #ifdef CONFIG_LCD
472 #ifdef CONFIG_FB_ADDR
473 gd->fb_base = CONFIG_FB_ADDR;
474 #else
475 /* reserve memory for LCD display (always full pages) */
476 addr = lcd_setmem(addr);
477 gd->fb_base = addr;
478 #endif /* CONFIG_FB_ADDR */
479 #endif /* CONFIG_LCD */
480
481 #if defined(CONFIG_VIDEO) && defined(CONFIG_8xx)
482 /* reserve memory for video display (always full pages) */
483 addr = video_setmem(addr);
484 gd->fb_base = addr;
485 #endif /* CONFIG_VIDEO */
486
487 /*
488 * reserve memory for U-Boot code, data & bss
489 * round down to next 4 kB limit
490 */
491 addr -= len;
492 addr &= ~(4096 - 1);
493 #ifdef CONFIG_E500
494 /* round down to next 64 kB limit so that IVPR stays aligned */
495 addr &= ~(65536 - 1);
496 #endif
497
498 debug("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr);
499
500 /*
501 * reserve memory for malloc() arena
502 */
503 addr_sp = addr - TOTAL_MALLOC_LEN;
504 debug("Reserving %dk for malloc() at: %08lx\n",
505 TOTAL_MALLOC_LEN >> 10, addr_sp);
506
507 /*
508 * (permanently) allocate a Board Info struct
509 * and a permanent copy of the "global" data
510 */
511 addr_sp -= sizeof(bd_t);
512 bd = (bd_t *) addr_sp;
513 memset(bd, 0, sizeof(bd_t));
514 gd->bd = bd;
515 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
516 sizeof(bd_t), addr_sp);
517 addr_sp -= sizeof(gd_t);
518 id = (gd_t *) addr_sp;
519 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
520 sizeof(gd_t), addr_sp);
521
522 /*
523 * Finally, we set up a new (bigger) stack.
524 *
525 * Leave some safety gap for SP, force alignment on 16 byte boundary
526 * Clear initial stack frame
527 */
528 addr_sp -= 16;
529 addr_sp &= ~0xF;
530 s = (ulong *) addr_sp;
531 *s = 0; /* Terminate back chain */
532 *++s = 0; /* NULL return address */
533 debug("Stack Pointer at: %08lx\n", addr_sp);
534
535 /*
536 * Save local variables to board info struct
537 */
538
539 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
540 bd->bi_memsize = gd->ram_size; /* size in bytes */
541
542 #ifdef CONFIG_SYS_SRAM_BASE
543 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
544 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
545 #endif
546
547 #if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
548 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
549 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
550 #endif
551 #if defined(CONFIG_MPC5xxx)
552 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
553 #endif
554 #if defined(CONFIG_MPC83xx)
555 bd->bi_immrbar = CONFIG_SYS_IMMR;
556 #endif
557 #if defined(CONFIG_MPC8220)
558 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
559 bd->bi_inpfreq = gd->inp_clk;
560 bd->bi_pcifreq = gd->pci_clk;
561 bd->bi_vcofreq = gd->vco_clk;
562 bd->bi_pevfreq = gd->pev_clk;
563 bd->bi_flbfreq = gd->flb_clk;
564
565 /* store bootparam to sram (backward compatible), here? */
566 {
567 u32 *sram = (u32 *) CONFIG_SYS_SRAM_BASE;
568
569 *sram++ = gd->ram_size;
570 *sram++ = gd->bus_clk;
571 *sram++ = gd->inp_clk;
572 *sram++ = gd->cpu_clk;
573 *sram++ = gd->vco_clk;
574 *sram++ = gd->flb_clk;
575 *sram++ = 0xb8c3ba11; /* boot signature */
576 }
577 #endif
578
579 WATCHDOG_RESET();
580 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
581 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
582 #if defined(CONFIG_CPM2)
583 bd->bi_cpmfreq = gd->arch.cpm_clk;
584 bd->bi_brgfreq = gd->arch.brg_clk;
585 bd->bi_sccfreq = gd->arch.scc_clk;
586 bd->bi_vco = gd->arch.vco_out;
587 #endif /* CONFIG_CPM2 */
588 #if defined(CONFIG_MPC512X)
589 bd->bi_ipsfreq = gd->ips_clk;
590 #endif /* CONFIG_MPC512X */
591 #if defined(CONFIG_MPC5xxx)
592 bd->bi_ipbfreq = gd->ipb_clk;
593 bd->bi_pcifreq = gd->pci_clk;
594 #endif /* CONFIG_MPC5xxx */
595 bd->bi_baudrate = gd->baudrate; /* Console Baudrate */
596
597 #ifdef CONFIG_SYS_EXTBDINFO
598 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
599 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
600 sizeof(bd->bi_r_version));
601
602 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
603 bd->bi_plb_busfreq = gd->bus_clk;
604 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
605 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
606 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
607 bd->bi_pci_busfreq = get_PCI_freq();
608 bd->bi_opbfreq = get_OPB_freq();
609 #elif defined(CONFIG_XILINX_405)
610 bd->bi_pci_busfreq = get_PCI_freq();
611 #endif
612 #endif
613
614 debug("New Stack Pointer is: %08lx\n", addr_sp);
615
616 WATCHDOG_RESET();
617
618 gd->relocaddr = addr; /* Store relocation addr, useful for debug */
619
620 memcpy(id, (void *) gd, sizeof(gd_t));
621
622 relocate_code(addr_sp, id, addr);
623
624 /* NOTREACHED - relocate_code() does not return */
625 }
626
627 /*
628 * This is the next part if the initialization sequence: we are now
629 * running from RAM and have a "normal" C environment, i. e. global
630 * data can be written, BSS has been cleared, the stack size in not
631 * that critical any more, etc.
632 */
633 void board_init_r(gd_t *id, ulong dest_addr)
634 {
635 bd_t *bd;
636 ulong malloc_start;
637
638 #ifndef CONFIG_SYS_NO_FLASH
639 ulong flash_size;
640 #endif
641
642 gd = id; /* initialize RAM version of global data */
643 bd = gd->bd;
644
645 gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
646
647 /* The Malloc area is immediately below the monitor copy in DRAM */
648 malloc_start = dest_addr - TOTAL_MALLOC_LEN;
649
650 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
651 /*
652 * The gd->arch.cpu pointer is set to an address in flash before
653 * relocation. We need to update it to point to the same CPU entry
654 * in RAM.
655 */
656 gd->arch.cpu += dest_addr - CONFIG_SYS_MONITOR_BASE;
657
658 /*
659 * If we didn't know the cpu mask & # cores, we can save them of
660 * now rather than 'computing' them constantly
661 */
662 fixup_cpu();
663 #endif
664
665 #ifdef CONFIG_SYS_EXTRA_ENV_RELOC
666 /*
667 * Some systems need to relocate the env_addr pointer early because the
668 * location it points to will get invalidated before env_relocate is
669 * called. One example is on systems that might use a L2 or L3 cache
670 * in SRAM mode and initialize that cache from SRAM mode back to being
671 * a cache in cpu_init_r.
672 */
673 gd->env_addr += dest_addr - CONFIG_SYS_MONITOR_BASE;
674 #endif
675
676 serial_initialize();
677
678 debug("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
679
680 WATCHDOG_RESET();
681
682 /*
683 * Setup trap handlers
684 */
685 trap_init(dest_addr);
686
687 #ifdef CONFIG_ADDR_MAP
688 init_addr_map();
689 #endif
690
691 #if defined(CONFIG_BOARD_EARLY_INIT_R)
692 board_early_init_r();
693 #endif
694
695 monitor_flash_len = (ulong)&__init_end - dest_addr;
696
697 WATCHDOG_RESET();
698
699 #ifdef CONFIG_LOGBUFFER
700 logbuff_init_ptrs();
701 #endif
702 #ifdef CONFIG_POST
703 post_output_backlog();
704 #endif
705
706 WATCHDOG_RESET();
707
708 #if defined(CONFIG_SYS_DELAYED_ICACHE)
709 icache_enable(); /* it's time to enable the instruction cache */
710 #endif
711
712 #if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500)
713 unlock_ram_in_cache(); /* it's time to unlock D-cache in e500 */
714 #endif
715
716 #if defined(CONFIG_PCI) && defined(CONFIG_SYS_EARLY_PCI_INIT)
717 /*
718 * Do early PCI configuration _before_ the flash gets initialised,
719 * because PCU ressources are crucial for flash access on some boards.
720 */
721 pci_init();
722 #endif
723 #if defined(CONFIG_WINBOND_83C553)
724 /*
725 * Initialise the ISA bridge
726 */
727 initialise_w83c553f();
728 #endif
729
730 asm("sync ; isync");
731
732 mem_malloc_init(malloc_start, TOTAL_MALLOC_LEN);
733
734 #if !defined(CONFIG_SYS_NO_FLASH)
735 puts("Flash: ");
736
737 if (board_flash_wp_on()) {
738 printf("Uninitialized - Write Protect On\n");
739 /* Since WP is on, we can't find real size. Set to 0 */
740 flash_size = 0;
741 } else if ((flash_size = flash_init()) > 0) {
742 #ifdef CONFIG_SYS_FLASH_CHECKSUM
743 print_size(flash_size, "");
744 /*
745 * Compute and print flash CRC if flashchecksum is set to 'y'
746 *
747 * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
748 */
749 if (getenv_yesno("flashchecksum") == 1) {
750 printf(" CRC: %08X",
751 crc32(0,
752 (const unsigned char *)
753 CONFIG_SYS_FLASH_BASE, flash_size)
754 );
755 }
756 putc('\n');
757 #else /* !CONFIG_SYS_FLASH_CHECKSUM */
758 print_size(flash_size, "\n");
759 #endif /* CONFIG_SYS_FLASH_CHECKSUM */
760 } else {
761 puts(failed);
762 hang();
763 }
764
765 /* update start of FLASH memory */
766 bd->bi_flashstart = CONFIG_SYS_FLASH_BASE;
767 /* size of FLASH memory (final value) */
768 bd->bi_flashsize = flash_size;
769
770 #if defined(CONFIG_SYS_UPDATE_FLASH_SIZE)
771 /* Make a update of the Memctrl. */
772 update_flash_size(flash_size);
773 #endif
774
775
776 #if defined(CONFIG_OXC) || defined(CONFIG_RMU)
777 /* flash mapped at end of memory map */
778 bd->bi_flashoffset = CONFIG_SYS_TEXT_BASE + flash_size;
779 #elif CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE
780 bd->bi_flashoffset = monitor_flash_len; /* reserved area for monitor */
781 #endif
782 #endif /* !CONFIG_SYS_NO_FLASH */
783
784 WATCHDOG_RESET();
785
786 /* initialize higher level parts of CPU like time base and timers */
787 cpu_init_r();
788
789 WATCHDOG_RESET();
790
791 #ifdef CONFIG_SPI
792 #if !defined(CONFIG_ENV_IS_IN_EEPROM)
793 spi_init_f();
794 #endif
795 spi_init_r();
796 #endif
797
798 #if defined(CONFIG_CMD_NAND)
799 WATCHDOG_RESET();
800 puts("NAND: ");
801 nand_init(); /* go init the NAND */
802 #endif
803
804 #ifdef CONFIG_GENERIC_MMC
805 /*
806 * MMC initialization is called before relocating env.
807 * Thus It is required that operations like pin multiplexer
808 * be put in board_init.
809 */
810 WATCHDOG_RESET();
811 puts("MMC: ");
812 mmc_initialize(bd);
813 #endif
814
815 /* relocate environment function pointers etc. */
816 env_relocate();
817
818 /*
819 * after non-volatile devices & environment is setup and cpu code have
820 * another round to deal with any initialization that might require
821 * full access to the environment or loading of some image (firmware)
822 * from a non-volatile device
823 */
824 cpu_secondary_init_r();
825
826 /*
827 * Fill in missing fields of bd_info.
828 * We do this here, where we have "normal" access to the
829 * environment; we used to do this still running from ROM,
830 * where had to use getenv_f(), which can be pretty slow when
831 * the environment is in EEPROM.
832 */
833
834 #if defined(CONFIG_SYS_EXTBDINFO)
835 #if defined(CONFIG_405GP) || defined(CONFIG_405EP)
836 #if defined(CONFIG_I2CFAST)
837 /*
838 * set bi_iic_fast for linux taking environment variable
839 * "i2cfast" into account
840 */
841 {
842 if (getenv_yesno("i2cfast") == 1) {
843 bd->bi_iic_fast[0] = 1;
844 bd->bi_iic_fast[1] = 1;
845 }
846 }
847 #endif /* CONFIG_I2CFAST */
848 #endif /* CONFIG_405GP, CONFIG_405EP */
849 #endif /* CONFIG_SYS_EXTBDINFO */
850
851 #if defined(CONFIG_SC3)
852 sc3_read_eeprom();
853 #endif
854
855 #if defined(CONFIG_ID_EEPROM) || defined(CONFIG_SYS_I2C_MAC_OFFSET)
856 mac_read_from_eeprom();
857 #endif
858
859 #ifdef CONFIG_HERMES
860 if ((gd->board_type >> 16) == 2)
861 bd->bi_ethspeed = gd->board_type & 0xFFFF;
862 else
863 bd->bi_ethspeed = 0xFFFF;
864 #endif
865
866 #ifdef CONFIG_CMD_NET
867 /* kept around for legacy kernels only ... ignore the next section */
868 eth_getenv_enetaddr("ethaddr", bd->bi_enetaddr);
869 #ifdef CONFIG_HAS_ETH1
870 eth_getenv_enetaddr("eth1addr", bd->bi_enet1addr);
871 #endif
872 #ifdef CONFIG_HAS_ETH2
873 eth_getenv_enetaddr("eth2addr", bd->bi_enet2addr);
874 #endif
875 #ifdef CONFIG_HAS_ETH3
876 eth_getenv_enetaddr("eth3addr", bd->bi_enet3addr);
877 #endif
878 #ifdef CONFIG_HAS_ETH4
879 eth_getenv_enetaddr("eth4addr", bd->bi_enet4addr);
880 #endif
881 #ifdef CONFIG_HAS_ETH5
882 eth_getenv_enetaddr("eth5addr", bd->bi_enet5addr);
883 #endif
884 #endif /* CONFIG_CMD_NET */
885
886 WATCHDOG_RESET();
887
888 #if defined(CONFIG_PCI) && !defined(CONFIG_SYS_EARLY_PCI_INIT)
889 /*
890 * Do pci configuration
891 */
892 pci_init();
893 #endif
894
895 /** leave this here (after malloc(), environment and PCI are working) **/
896 /* Initialize stdio devices */
897 stdio_init();
898
899 /* Initialize the jump table for applications */
900 jumptable_init();
901
902 #if defined(CONFIG_API)
903 /* Initialize API */
904 api_init();
905 #endif
906
907 /* Initialize the console (after the relocation and devices init) */
908 console_init_r();
909
910 #if defined(CONFIG_MISC_INIT_R)
911 /* miscellaneous platform dependent initialisations */
912 misc_init_r();
913 #endif
914
915 #ifdef CONFIG_HERMES
916 if (bd->bi_ethspeed != 0xFFFF)
917 hermes_start_lxt980((int) bd->bi_ethspeed);
918 #endif
919
920 #if defined(CONFIG_CMD_KGDB)
921 WATCHDOG_RESET();
922 puts("KGDB: ");
923 kgdb_init();
924 #endif
925
926 debug("U-Boot relocated to %08lx\n", dest_addr);
927
928 /*
929 * Enable Interrupts
930 */
931 interrupt_init();
932
933 #if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)
934 status_led_set(STATUS_LED_BOOT, STATUS_LED_BLINKING);
935 #endif
936
937 udelay(20);
938
939 /* Initialize from environment */
940 load_addr = getenv_ulong("loadaddr", 16, load_addr);
941
942 WATCHDOG_RESET();
943
944 #if defined(CONFIG_CMD_SCSI)
945 WATCHDOG_RESET();
946 puts("SCSI: ");
947 scsi_init();
948 #endif
949
950 #if defined(CONFIG_CMD_DOC)
951 WATCHDOG_RESET();
952 puts("DOC: ");
953 doc_init();
954 #endif
955
956 #ifdef CONFIG_BITBANGMII
957 bb_miiphy_init();
958 #endif
959 #if defined(CONFIG_CMD_NET)
960 WATCHDOG_RESET();
961 puts("Net: ");
962 eth_initialize(bd);
963 #endif
964
965 #if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
966 WATCHDOG_RESET();
967 debug("Reset Ethernet PHY\n");
968 reset_phy();
969 #endif
970
971 #ifdef CONFIG_POST
972 post_run(NULL, POST_RAM | post_bootmode_get(0));
973 #endif
974
975 #if defined(CONFIG_CMD_PCMCIA) \
976 && !defined(CONFIG_CMD_IDE)
977 WATCHDOG_RESET();
978 puts("PCMCIA:");
979 pcmcia_init();
980 #endif
981
982 #if defined(CONFIG_CMD_IDE)
983 WATCHDOG_RESET();
984 #ifdef CONFIG_IDE_8xx_PCCARD
985 puts("PCMCIA:");
986 #else
987 puts("IDE: ");
988 #endif
989 #if defined(CONFIG_START_IDE)
990 if (board_start_ide())
991 ide_init();
992 #else
993 ide_init();
994 #endif
995 #endif
996
997 #ifdef CONFIG_LAST_STAGE_INIT
998 WATCHDOG_RESET();
999 /*
1000 * Some parts can be only initialized if all others (like
1001 * Interrupts) are up and running (i.e. the PC-style ISA
1002 * keyboard).
1003 */
1004 last_stage_init();
1005 #endif
1006
1007 #if defined(CONFIG_CMD_BEDBUG)
1008 WATCHDOG_RESET();
1009 bedbug_init();
1010 #endif
1011
1012 #if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER)
1013 /*
1014 * Export available size of memory for Linux,
1015 * taking into account the protected RAM at top of memory
1016 */
1017 {
1018 ulong pram = 0;
1019 char memsz[32];
1020
1021 #ifdef CONFIG_PRAM
1022 pram = getenv_ulong("pram", 10, CONFIG_PRAM);
1023 #endif
1024 #ifdef CONFIG_LOGBUFFER
1025 #ifndef CONFIG_ALT_LB_ADDR
1026 /* Also take the logbuffer into account (pram is in kB) */
1027 pram += (LOGBUFF_LEN + LOGBUFF_OVERHEAD) / 1024;
1028 #endif
1029 #endif
1030 sprintf(memsz, "%ldk", (bd->bi_memsize / 1024) - pram);
1031 setenv("mem", memsz);
1032 }
1033 #endif
1034
1035 #ifdef CONFIG_PS2KBD
1036 puts("PS/2: ");
1037 kbd_init();
1038 #endif
1039
1040 #ifdef CONFIG_MODEM_SUPPORT
1041 {
1042 extern int do_mdm_init;
1043
1044 do_mdm_init = gd->do_mdm_init;
1045 }
1046 #endif
1047
1048 /* Initialization complete - start the monitor */
1049
1050 /* main_loop() can return to retry autoboot, if so just run it again. */
1051 for (;;) {
1052 WATCHDOG_RESET();
1053 main_loop();
1054 }
1055
1056 /* NOTREACHED - no way out of command loop except booting */
1057 }
1058
1059 void hang(void)
1060 {
1061 puts("### ERROR ### Please RESET the board ###\n");
1062 bootstage_error(BOOTSTAGE_ID_NEED_RESET);
1063 for (;;)
1064 ;
1065 }
1066
1067
1068 #if 0 /* We could use plain global data, but the resulting code is bigger */
1069 /*
1070 * Pointer to initial global data area
1071 *
1072 * Here we initialize it.
1073 */
1074 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
1075 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
1076 DECLARE_GLOBAL_DATA_PTR =
1077 (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
1078 #endif /* 0 */
1079
1080 /************************************************************************/
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