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powerpc/64s: Enable barrier_nospec based on firmware settings
[thirdparty/kernel/stable.git] / arch / powerpc / platforms / pseries / setup.c
1 /*
2 * 64-bit pSeries and RS/6000 setup code.
3 *
4 * Copyright (C) 1995 Linus Torvalds
5 * Adapted from 'alpha' version by Gary Thomas
6 * Modified by Cort Dougan (cort@cs.nmt.edu)
7 * Modified by PPC64 Team, IBM Corp
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15 /*
16 * bootup setup stuff..
17 */
18
19 #include <linux/cpu.h>
20 #include <linux/errno.h>
21 #include <linux/sched.h>
22 #include <linux/kernel.h>
23 #include <linux/mm.h>
24 #include <linux/stddef.h>
25 #include <linux/unistd.h>
26 #include <linux/user.h>
27 #include <linux/tty.h>
28 #include <linux/major.h>
29 #include <linux/interrupt.h>
30 #include <linux/reboot.h>
31 #include <linux/init.h>
32 #include <linux/ioport.h>
33 #include <linux/console.h>
34 #include <linux/pci.h>
35 #include <linux/utsname.h>
36 #include <linux/adb.h>
37 #include <linux/export.h>
38 #include <linux/delay.h>
39 #include <linux/irq.h>
40 #include <linux/seq_file.h>
41 #include <linux/root_dev.h>
42 #include <linux/of.h>
43 #include <linux/of_pci.h>
44
45 #include <asm/mmu.h>
46 #include <asm/processor.h>
47 #include <asm/io.h>
48 #include <asm/pgtable.h>
49 #include <asm/prom.h>
50 #include <asm/rtas.h>
51 #include <asm/pci-bridge.h>
52 #include <asm/iommu.h>
53 #include <asm/dma.h>
54 #include <asm/machdep.h>
55 #include <asm/irq.h>
56 #include <asm/time.h>
57 #include <asm/nvram.h>
58 #include <asm/pmc.h>
59 #include <asm/xics.h>
60 #include <asm/xive.h>
61 #include <asm/ppc-pci.h>
62 #include <asm/i8259.h>
63 #include <asm/udbg.h>
64 #include <asm/smp.h>
65 #include <asm/firmware.h>
66 #include <asm/eeh.h>
67 #include <asm/reg.h>
68 #include <asm/plpar_wrappers.h>
69 #include <asm/kexec.h>
70 #include <asm/isa-bridge.h>
71 #include <asm/security_features.h>
72
73 #include "pseries.h"
74
75 int CMO_PrPSP = -1;
76 int CMO_SecPSP = -1;
77 unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K);
78 EXPORT_SYMBOL(CMO_PageSize);
79
80 int fwnmi_active; /* TRUE if an FWNMI handler is present */
81
82 static void pSeries_show_cpuinfo(struct seq_file *m)
83 {
84 struct device_node *root;
85 const char *model = "";
86
87 root = of_find_node_by_path("/");
88 if (root)
89 model = of_get_property(root, "model", NULL);
90 seq_printf(m, "machine\t\t: CHRP %s\n", model);
91 of_node_put(root);
92 if (radix_enabled())
93 seq_printf(m, "MMU\t\t: Radix\n");
94 else
95 seq_printf(m, "MMU\t\t: Hash\n");
96 }
97
98 /* Initialize firmware assisted non-maskable interrupts if
99 * the firmware supports this feature.
100 */
101 static void __init fwnmi_init(void)
102 {
103 unsigned long system_reset_addr, machine_check_addr;
104
105 int ibm_nmi_register = rtas_token("ibm,nmi-register");
106 if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
107 return;
108
109 /* If the kernel's not linked at zero we point the firmware at low
110 * addresses anyway, and use a trampoline to get to the real code. */
111 system_reset_addr = __pa(system_reset_fwnmi) - PHYSICAL_START;
112 machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START;
113
114 if (0 == rtas_call(ibm_nmi_register, 2, 1, NULL, system_reset_addr,
115 machine_check_addr))
116 fwnmi_active = 1;
117 }
118
119 static void pseries_8259_cascade(struct irq_desc *desc)
120 {
121 struct irq_chip *chip = irq_desc_get_chip(desc);
122 unsigned int cascade_irq = i8259_irq();
123
124 if (cascade_irq)
125 generic_handle_irq(cascade_irq);
126
127 chip->irq_eoi(&desc->irq_data);
128 }
129
130 static void __init pseries_setup_i8259_cascade(void)
131 {
132 struct device_node *np, *old, *found = NULL;
133 unsigned int cascade;
134 const u32 *addrp;
135 unsigned long intack = 0;
136 int naddr;
137
138 for_each_node_by_type(np, "interrupt-controller") {
139 if (of_device_is_compatible(np, "chrp,iic")) {
140 found = np;
141 break;
142 }
143 }
144
145 if (found == NULL) {
146 printk(KERN_DEBUG "pic: no ISA interrupt controller\n");
147 return;
148 }
149
150 cascade = irq_of_parse_and_map(found, 0);
151 if (!cascade) {
152 printk(KERN_ERR "pic: failed to map cascade interrupt");
153 return;
154 }
155 pr_debug("pic: cascade mapped to irq %d\n", cascade);
156
157 for (old = of_node_get(found); old != NULL ; old = np) {
158 np = of_get_parent(old);
159 of_node_put(old);
160 if (np == NULL)
161 break;
162 if (strcmp(np->name, "pci") != 0)
163 continue;
164 addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL);
165 if (addrp == NULL)
166 continue;
167 naddr = of_n_addr_cells(np);
168 intack = addrp[naddr-1];
169 if (naddr > 1)
170 intack |= ((unsigned long)addrp[naddr-2]) << 32;
171 }
172 if (intack)
173 printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack);
174 i8259_init(found, intack);
175 of_node_put(found);
176 irq_set_chained_handler(cascade, pseries_8259_cascade);
177 }
178
179 static void __init pseries_init_irq(void)
180 {
181 /* Try using a XIVE if available, otherwise use a XICS */
182 if (!xive_spapr_init()) {
183 xics_init();
184 pseries_setup_i8259_cascade();
185 }
186 }
187
188 static void pseries_lpar_enable_pmcs(void)
189 {
190 unsigned long set, reset;
191
192 set = 1UL << 63;
193 reset = 0;
194 plpar_hcall_norets(H_PERFMON, set, reset);
195 }
196
197 static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *data)
198 {
199 struct of_reconfig_data *rd = data;
200 struct device_node *parent, *np = rd->dn;
201 struct pci_dn *pdn;
202 int err = NOTIFY_OK;
203
204 switch (action) {
205 case OF_RECONFIG_ATTACH_NODE:
206 parent = of_get_parent(np);
207 pdn = parent ? PCI_DN(parent) : NULL;
208 if (pdn)
209 pci_add_device_node_info(pdn->phb, np);
210
211 of_node_put(parent);
212 break;
213 case OF_RECONFIG_DETACH_NODE:
214 pdn = PCI_DN(np);
215 if (pdn)
216 list_del(&pdn->list);
217 break;
218 default:
219 err = NOTIFY_DONE;
220 break;
221 }
222 return err;
223 }
224
225 static struct notifier_block pci_dn_reconfig_nb = {
226 .notifier_call = pci_dn_reconfig_notifier,
227 };
228
229 struct kmem_cache *dtl_cache;
230
231 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
232 /*
233 * Allocate space for the dispatch trace log for all possible cpus
234 * and register the buffers with the hypervisor. This is used for
235 * computing time stolen by the hypervisor.
236 */
237 static int alloc_dispatch_logs(void)
238 {
239 int cpu, ret;
240 struct paca_struct *pp;
241 struct dtl_entry *dtl;
242
243 if (!firmware_has_feature(FW_FEATURE_SPLPAR))
244 return 0;
245
246 if (!dtl_cache)
247 return 0;
248
249 for_each_possible_cpu(cpu) {
250 pp = &paca[cpu];
251 dtl = kmem_cache_alloc(dtl_cache, GFP_KERNEL);
252 if (!dtl) {
253 pr_warn("Failed to allocate dispatch trace log for cpu %d\n",
254 cpu);
255 pr_warn("Stolen time statistics will be unreliable\n");
256 break;
257 }
258
259 pp->dtl_ridx = 0;
260 pp->dispatch_log = dtl;
261 pp->dispatch_log_end = dtl + N_DISPATCH_LOG;
262 pp->dtl_curr = dtl;
263 }
264
265 /* Register the DTL for the current (boot) cpu */
266 dtl = get_paca()->dispatch_log;
267 get_paca()->dtl_ridx = 0;
268 get_paca()->dtl_curr = dtl;
269 get_paca()->lppaca_ptr->dtl_idx = 0;
270
271 /* hypervisor reads buffer length from this field */
272 dtl->enqueue_to_dispatch_time = cpu_to_be32(DISPATCH_LOG_BYTES);
273 ret = register_dtl(hard_smp_processor_id(), __pa(dtl));
274 if (ret)
275 pr_err("WARNING: DTL registration of cpu %d (hw %d) failed "
276 "with %d\n", smp_processor_id(),
277 hard_smp_processor_id(), ret);
278 get_paca()->lppaca_ptr->dtl_enable_mask = 2;
279
280 return 0;
281 }
282 #else /* !CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
283 static inline int alloc_dispatch_logs(void)
284 {
285 return 0;
286 }
287 #endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
288
289 static int alloc_dispatch_log_kmem_cache(void)
290 {
291 dtl_cache = kmem_cache_create("dtl", DISPATCH_LOG_BYTES,
292 DISPATCH_LOG_BYTES, 0, NULL);
293 if (!dtl_cache) {
294 pr_warn("Failed to create dispatch trace log buffer cache\n");
295 pr_warn("Stolen time statistics will be unreliable\n");
296 return 0;
297 }
298
299 return alloc_dispatch_logs();
300 }
301 machine_early_initcall(pseries, alloc_dispatch_log_kmem_cache);
302
303 static void pseries_lpar_idle(void)
304 {
305 /*
306 * Default handler to go into low thread priority and possibly
307 * low power mode by ceding processor to hypervisor
308 */
309
310 /* Indicate to hypervisor that we are idle. */
311 get_lppaca()->idle = 1;
312
313 /*
314 * Yield the processor to the hypervisor. We return if
315 * an external interrupt occurs (which are driven prior
316 * to returning here) or if a prod occurs from another
317 * processor. When returning here, external interrupts
318 * are enabled.
319 */
320 cede_processor();
321
322 get_lppaca()->idle = 0;
323 }
324
325 /*
326 * Enable relocation on during exceptions. This has partition wide scope and
327 * may take a while to complete, if it takes longer than one second we will
328 * just give up rather than wasting any more time on this - if that turns out
329 * to ever be a problem in practice we can move this into a kernel thread to
330 * finish off the process later in boot.
331 */
332 void pseries_enable_reloc_on_exc(void)
333 {
334 long rc;
335 unsigned int delay, total_delay = 0;
336
337 while (1) {
338 rc = enable_reloc_on_exceptions();
339 if (!H_IS_LONG_BUSY(rc)) {
340 if (rc == H_P2) {
341 pr_info("Relocation on exceptions not"
342 " supported\n");
343 } else if (rc != H_SUCCESS) {
344 pr_warn("Unable to enable relocation"
345 " on exceptions: %ld\n", rc);
346 }
347 break;
348 }
349
350 delay = get_longbusy_msecs(rc);
351 total_delay += delay;
352 if (total_delay > 1000) {
353 pr_warn("Warning: Giving up waiting to enable "
354 "relocation on exceptions (%u msec)!\n",
355 total_delay);
356 return;
357 }
358
359 mdelay(delay);
360 }
361 }
362 EXPORT_SYMBOL(pseries_enable_reloc_on_exc);
363
364 void pseries_disable_reloc_on_exc(void)
365 {
366 long rc;
367
368 while (1) {
369 rc = disable_reloc_on_exceptions();
370 if (!H_IS_LONG_BUSY(rc))
371 break;
372 mdelay(get_longbusy_msecs(rc));
373 }
374 if (rc != H_SUCCESS)
375 pr_warning("Warning: Failed to disable relocation on "
376 "exceptions: %ld\n", rc);
377 }
378 EXPORT_SYMBOL(pseries_disable_reloc_on_exc);
379
380 #ifdef CONFIG_KEXEC_CORE
381 static void pSeries_machine_kexec(struct kimage *image)
382 {
383 if (firmware_has_feature(FW_FEATURE_SET_MODE))
384 pseries_disable_reloc_on_exc();
385
386 default_machine_kexec(image);
387 }
388 #endif
389
390 #ifdef __LITTLE_ENDIAN__
391 void pseries_big_endian_exceptions(void)
392 {
393 long rc;
394
395 while (1) {
396 rc = enable_big_endian_exceptions();
397 if (!H_IS_LONG_BUSY(rc))
398 break;
399 mdelay(get_longbusy_msecs(rc));
400 }
401
402 /*
403 * At this point it is unlikely panic() will get anything
404 * out to the user, since this is called very late in kexec
405 * but at least this will stop us from continuing on further
406 * and creating an even more difficult to debug situation.
407 *
408 * There is a known problem when kdump'ing, if cpus are offline
409 * the above call will fail. Rather than panicking again, keep
410 * going and hope the kdump kernel is also little endian, which
411 * it usually is.
412 */
413 if (rc && !kdump_in_progress())
414 panic("Could not enable big endian exceptions");
415 }
416
417 void pseries_little_endian_exceptions(void)
418 {
419 long rc;
420
421 while (1) {
422 rc = enable_little_endian_exceptions();
423 if (!H_IS_LONG_BUSY(rc))
424 break;
425 mdelay(get_longbusy_msecs(rc));
426 }
427 if (rc) {
428 ppc_md.progress("H_SET_MODE LE exception fail", 0);
429 panic("Could not enable little endian exceptions");
430 }
431 }
432 #endif
433
434 static void __init find_and_init_phbs(void)
435 {
436 struct device_node *node;
437 struct pci_controller *phb;
438 struct device_node *root = of_find_node_by_path("/");
439
440 for_each_child_of_node(root, node) {
441 if (node->type == NULL || (strcmp(node->type, "pci") != 0 &&
442 strcmp(node->type, "pciex") != 0))
443 continue;
444
445 phb = pcibios_alloc_controller(node);
446 if (!phb)
447 continue;
448 rtas_setup_phb(phb);
449 pci_process_bridge_OF_ranges(phb, node, 0);
450 isa_bridge_find_early(phb);
451 phb->controller_ops = pseries_pci_controller_ops;
452 }
453
454 of_node_put(root);
455
456 /*
457 * PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties
458 * in chosen.
459 */
460 of_pci_check_probe_only();
461 }
462
463 static void init_cpu_char_feature_flags(struct h_cpu_char_result *result)
464 {
465 /*
466 * The features below are disabled by default, so we instead look to see
467 * if firmware has *enabled* them, and set them if so.
468 */
469 if (result->character & H_CPU_CHAR_SPEC_BAR_ORI31)
470 security_ftr_set(SEC_FTR_SPEC_BAR_ORI31);
471
472 if (result->character & H_CPU_CHAR_BCCTRL_SERIALISED)
473 security_ftr_set(SEC_FTR_BCCTRL_SERIALISED);
474
475 if (result->character & H_CPU_CHAR_L1D_FLUSH_ORI30)
476 security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30);
477
478 if (result->character & H_CPU_CHAR_L1D_FLUSH_TRIG2)
479 security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2);
480
481 if (result->character & H_CPU_CHAR_L1D_THREAD_PRIV)
482 security_ftr_set(SEC_FTR_L1D_THREAD_PRIV);
483
484 if (result->character & H_CPU_CHAR_COUNT_CACHE_DISABLED)
485 security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED);
486
487 /*
488 * The features below are enabled by default, so we instead look to see
489 * if firmware has *disabled* them, and clear them if so.
490 */
491 if (!(result->behaviour & H_CPU_BEHAV_FAVOUR_SECURITY))
492 security_ftr_clear(SEC_FTR_FAVOUR_SECURITY);
493
494 if (!(result->behaviour & H_CPU_BEHAV_L1D_FLUSH_PR))
495 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR);
496
497 if (!(result->behaviour & H_CPU_BEHAV_BNDS_CHK_SPEC_BAR))
498 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR);
499 }
500
501 void pseries_setup_rfi_flush(void)
502 {
503 struct h_cpu_char_result result;
504 enum l1d_flush_type types;
505 bool enable;
506 long rc;
507
508 /*
509 * Set features to the defaults assumed by init_cpu_char_feature_flags()
510 * so it can set/clear again any features that might have changed after
511 * migration, and in case the hypercall fails and it is not even called.
512 */
513 powerpc_security_features = SEC_FTR_DEFAULT;
514
515 rc = plpar_get_cpu_characteristics(&result);
516 if (rc == H_SUCCESS)
517 init_cpu_char_feature_flags(&result);
518
519 /*
520 * We're the guest so this doesn't apply to us, clear it to simplify
521 * handling of it elsewhere.
522 */
523 security_ftr_clear(SEC_FTR_L1D_FLUSH_HV);
524
525 types = L1D_FLUSH_FALLBACK;
526
527 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2))
528 types |= L1D_FLUSH_MTTRIG;
529
530 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30))
531 types |= L1D_FLUSH_ORI;
532
533 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \
534 security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR);
535
536 setup_rfi_flush(types, enable);
537 setup_barrier_nospec();
538 }
539
540 static void __init pSeries_setup_arch(void)
541 {
542 set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
543
544 /* Discover PIC type and setup ppc_md accordingly */
545 smp_init_pseries();
546
547
548 /* openpic global configuration register (64-bit format). */
549 /* openpic Interrupt Source Unit pointer (64-bit format). */
550 /* python0 facility area (mmio) (64-bit format) REAL address. */
551
552 /* init to some ~sane value until calibrate_delay() runs */
553 loops_per_jiffy = 50000000;
554
555 fwnmi_init();
556
557 pseries_setup_rfi_flush();
558 setup_stf_barrier();
559
560 /* By default, only probe PCI (can be overridden by rtas_pci) */
561 pci_add_flags(PCI_PROBE_ONLY);
562
563 /* Find and initialize PCI host bridges */
564 init_pci_config_tokens();
565 find_and_init_phbs();
566 of_reconfig_notifier_register(&pci_dn_reconfig_nb);
567
568 pSeries_nvram_init();
569
570 if (firmware_has_feature(FW_FEATURE_LPAR)) {
571 vpa_init(boot_cpuid);
572 ppc_md.power_save = pseries_lpar_idle;
573 ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
574 } else {
575 /* No special idle routine */
576 ppc_md.enable_pmcs = power4_enable_pmcs;
577 }
578
579 ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare;
580 }
581
582 static int __init pSeries_init_panel(void)
583 {
584 /* Manually leave the kernel version on the panel. */
585 #ifdef __BIG_ENDIAN__
586 ppc_md.progress("Linux ppc64\n", 0);
587 #else
588 ppc_md.progress("Linux ppc64le\n", 0);
589 #endif
590 ppc_md.progress(init_utsname()->version, 0);
591
592 return 0;
593 }
594 machine_arch_initcall(pseries, pSeries_init_panel);
595
596 static int pseries_set_dabr(unsigned long dabr, unsigned long dabrx)
597 {
598 return plpar_hcall_norets(H_SET_DABR, dabr);
599 }
600
601 static int pseries_set_xdabr(unsigned long dabr, unsigned long dabrx)
602 {
603 /* Have to set at least one bit in the DABRX according to PAPR */
604 if (dabrx == 0 && dabr == 0)
605 dabrx = DABRX_USER;
606 /* PAPR says we can only set kernel and user bits */
607 dabrx &= DABRX_KERNEL | DABRX_USER;
608
609 return plpar_hcall_norets(H_SET_XDABR, dabr, dabrx);
610 }
611
612 static int pseries_set_dawr(unsigned long dawr, unsigned long dawrx)
613 {
614 /* PAPR says we can't set HYP */
615 dawrx &= ~DAWRX_HYP;
616
617 return plapr_set_watchpoint0(dawr, dawrx);
618 }
619
620 #define CMO_CHARACTERISTICS_TOKEN 44
621 #define CMO_MAXLENGTH 1026
622
623 void pSeries_coalesce_init(void)
624 {
625 struct hvcall_mpp_x_data mpp_x_data;
626
627 if (firmware_has_feature(FW_FEATURE_CMO) && !h_get_mpp_x(&mpp_x_data))
628 powerpc_firmware_features |= FW_FEATURE_XCMO;
629 else
630 powerpc_firmware_features &= ~FW_FEATURE_XCMO;
631 }
632
633 /**
634 * fw_cmo_feature_init - FW_FEATURE_CMO is not stored in ibm,hypertas-functions,
635 * handle that here. (Stolen from parse_system_parameter_string)
636 */
637 static void pSeries_cmo_feature_init(void)
638 {
639 char *ptr, *key, *value, *end;
640 int call_status;
641 int page_order = IOMMU_PAGE_SHIFT_4K;
642
643 pr_debug(" -> fw_cmo_feature_init()\n");
644 spin_lock(&rtas_data_buf_lock);
645 memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE);
646 call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1,
647 NULL,
648 CMO_CHARACTERISTICS_TOKEN,
649 __pa(rtas_data_buf),
650 RTAS_DATA_BUF_SIZE);
651
652 if (call_status != 0) {
653 spin_unlock(&rtas_data_buf_lock);
654 pr_debug("CMO not available\n");
655 pr_debug(" <- fw_cmo_feature_init()\n");
656 return;
657 }
658
659 end = rtas_data_buf + CMO_MAXLENGTH - 2;
660 ptr = rtas_data_buf + 2; /* step over strlen value */
661 key = value = ptr;
662
663 while (*ptr && (ptr <= end)) {
664 /* Separate the key and value by replacing '=' with '\0' and
665 * point the value at the string after the '='
666 */
667 if (ptr[0] == '=') {
668 ptr[0] = '\0';
669 value = ptr + 1;
670 } else if (ptr[0] == '\0' || ptr[0] == ',') {
671 /* Terminate the string containing the key/value pair */
672 ptr[0] = '\0';
673
674 if (key == value) {
675 pr_debug("Malformed key/value pair\n");
676 /* Never found a '=', end processing */
677 break;
678 }
679
680 if (0 == strcmp(key, "CMOPageSize"))
681 page_order = simple_strtol(value, NULL, 10);
682 else if (0 == strcmp(key, "PrPSP"))
683 CMO_PrPSP = simple_strtol(value, NULL, 10);
684 else if (0 == strcmp(key, "SecPSP"))
685 CMO_SecPSP = simple_strtol(value, NULL, 10);
686 value = key = ptr + 1;
687 }
688 ptr++;
689 }
690
691 /* Page size is returned as the power of 2 of the page size,
692 * convert to the page size in bytes before returning
693 */
694 CMO_PageSize = 1 << page_order;
695 pr_debug("CMO_PageSize = %lu\n", CMO_PageSize);
696
697 if (CMO_PrPSP != -1 || CMO_SecPSP != -1) {
698 pr_info("CMO enabled\n");
699 pr_debug("CMO enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
700 CMO_SecPSP);
701 powerpc_firmware_features |= FW_FEATURE_CMO;
702 pSeries_coalesce_init();
703 } else
704 pr_debug("CMO not enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
705 CMO_SecPSP);
706 spin_unlock(&rtas_data_buf_lock);
707 pr_debug(" <- fw_cmo_feature_init()\n");
708 }
709
710 /*
711 * Early initialization. Relocation is on but do not reference unbolted pages
712 */
713 static void __init pseries_init(void)
714 {
715 pr_debug(" -> pseries_init()\n");
716
717 #ifdef CONFIG_HVC_CONSOLE
718 if (firmware_has_feature(FW_FEATURE_LPAR))
719 hvc_vio_init_early();
720 #endif
721 if (firmware_has_feature(FW_FEATURE_XDABR))
722 ppc_md.set_dabr = pseries_set_xdabr;
723 else if (firmware_has_feature(FW_FEATURE_DABR))
724 ppc_md.set_dabr = pseries_set_dabr;
725
726 if (firmware_has_feature(FW_FEATURE_SET_MODE))
727 ppc_md.set_dawr = pseries_set_dawr;
728
729 pSeries_cmo_feature_init();
730 iommu_init_early_pSeries();
731
732 pr_debug(" <- pseries_init()\n");
733 }
734
735 /**
736 * pseries_power_off - tell firmware about how to power off the system.
737 *
738 * This function calls either the power-off rtas token in normal cases
739 * or the ibm,power-off-ups token (if present & requested) in case of
740 * a power failure. If power-off token is used, power on will only be
741 * possible with power button press. If ibm,power-off-ups token is used
742 * it will allow auto poweron after power is restored.
743 */
744 static void pseries_power_off(void)
745 {
746 int rc;
747 int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups");
748
749 if (rtas_flash_term_hook)
750 rtas_flash_term_hook(SYS_POWER_OFF);
751
752 if (rtas_poweron_auto == 0 ||
753 rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) {
754 rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1);
755 printk(KERN_INFO "RTAS power-off returned %d\n", rc);
756 } else {
757 rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL);
758 printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc);
759 }
760 for (;;);
761 }
762
763 static int __init pSeries_probe(void)
764 {
765 const char *dtype = of_get_property(of_root, "device_type", NULL);
766
767 if (dtype == NULL)
768 return 0;
769 if (strcmp(dtype, "chrp"))
770 return 0;
771
772 /* Cell blades firmware claims to be chrp while it's not. Until this
773 * is fixed, we need to avoid those here.
774 */
775 if (of_machine_is_compatible("IBM,CPBW-1.0") ||
776 of_machine_is_compatible("IBM,CBEA"))
777 return 0;
778
779 pm_power_off = pseries_power_off;
780
781 pr_debug("Machine is%s LPAR !\n",
782 (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not");
783
784 pseries_init();
785
786 return 1;
787 }
788
789 static int pSeries_pci_probe_mode(struct pci_bus *bus)
790 {
791 if (firmware_has_feature(FW_FEATURE_LPAR))
792 return PCI_PROBE_DEVTREE;
793 return PCI_PROBE_NORMAL;
794 }
795
796 struct pci_controller_ops pseries_pci_controller_ops = {
797 .probe_mode = pSeries_pci_probe_mode,
798 };
799
800 define_machine(pseries) {
801 .name = "pSeries",
802 .probe = pSeries_probe,
803 .setup_arch = pSeries_setup_arch,
804 .init_IRQ = pseries_init_irq,
805 .show_cpuinfo = pSeries_show_cpuinfo,
806 .log_error = pSeries_log_error,
807 .pcibios_fixup = pSeries_final_fixup,
808 .restart = rtas_restart,
809 .halt = rtas_halt,
810 .panic = rtas_os_term,
811 .get_boot_time = rtas_get_boot_time,
812 .get_rtc_time = rtas_get_rtc_time,
813 .set_rtc_time = rtas_set_rtc_time,
814 .calibrate_decr = generic_calibrate_decr,
815 .progress = rtas_progress,
816 .system_reset_exception = pSeries_system_reset_exception,
817 .machine_check_exception = pSeries_machine_check_exception,
818 #ifdef CONFIG_KEXEC_CORE
819 .machine_kexec = pSeries_machine_kexec,
820 .kexec_cpu_down = pseries_kexec_cpu_down,
821 #endif
822 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
823 .memory_block_size = pseries_memory_block_size,
824 #endif
825 };