2 * (C) Copyright 2004, Freescale, Inc
3 * TsiChung Liew, Tsi-Chung.Liew@freescale.com.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 #include <asm/processor.h>
28 DECLARE_GLOBAL_DATA_PTR
;
30 typedef struct pllmultiplier
{
36 /* ------------------------------------------------------------------------- */
44 pllcfg_t bus2core
[] = {
47 {0x0C, 3, 8}, /* 1.5 */
52 {0x11, 5, 4}, /* 2.5 */
56 {0x0E, 7, 2}, /* 3.5 */
58 {0x07, 9, 2}, /* 4.5 */
59 {0x0B, 10, 2}, /* 5 */
60 {0x09, 11, 2}, /* 5.5 */
61 {0x0D, 12, 2}, /* 6 */
62 {0x12, 13, 2}, /* 6.5 */
63 {0x14, 14, 2}, /* 7 */
64 {0x16, 15, 2}, /* 7.5 */
70 #if !defined(CONFIG_SYS_MPC8220_CLKIN)
71 #error clock measuring not implemented yet - define CONFIG_SYS_MPC8220_CLKIN
74 gd
->inp_clk
= CONFIG_SYS_MPC8220_CLKIN
;
76 /* Read XLB to PCI(INP) clock multiplier */
77 pci2bus
= (*((volatile u32
*)PCI_REG_PCIGSCR
) &
78 PCI_REG_PCIGSCR_PCI2XLB_CLK_MASK
)>>PCI_REG_PCIGSCR_PCI2XLB_CLK_BIT
;
81 gd
->bus_clk
= CONFIG_SYS_MPC8220_CLKIN
* pci2bus
;
83 /* PCI clock is same as input clock */
84 gd
->pci_clk
= CONFIG_SYS_MPC8220_CLKIN
;
86 /* FlexBus is temporary set as the same as input clock */
87 /* will do dynamic in the future */
88 gd
->flb_clk
= CONFIG_SYS_MPC8220_CLKIN
;
90 /* CPU Clock - Read HID1 */
91 asm volatile ("mfspr %0, 1009":"=r" (hid1
):);
93 size
= sizeof (bus2core
) / sizeof (pllcfg_t
);
97 for (i
= 0; i
< size
; i
++)
98 if (hid1
== bus2core
[i
].hid1
) {
99 gd
->cpu_clk
= (bus2core
[i
].multi
* gd
->bus_clk
) >> 1;
100 gd
->vco_clk
= CONFIG_SYS_MPC8220_SYSPLL_VCO_MULTIPLIER
* (gd
->pci_clk
* bus2core
[i
].vco_div
)/2;
104 /* hardcoded 81MHz for now */
105 gd
->pev_clk
= 81000000;
110 int prt_mpc8220_clks (void)
112 char buf1
[32], buf2
[32], buf3
[32], buf4
[32];
114 printf (" Bus %s MHz, CPU %s MHz, PCI %s MHz, VCO %s MHz\n",
115 strmhz(buf1
, gd
->bus_clk
),
116 strmhz(buf2
, gd
->cpu_clk
),
117 strmhz(buf3
, gd
->pci_clk
),
118 strmhz(buf4
, gd
->vco_clk
)
123 /* ------------------------------------------------------------------------- */