arch/ppc/cpu/mpc8260/ether_scc.c

   1 /*
   2  * MPC8260 SCC Ethernet
   3  *
   4  * Copyright (c) 2000 MontaVista Software, Inc.   Dan Malek (dmalek@jlc.net)
   5  *
   6  * (C) Copyright 2000 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   7  * Marius Groeger <mgroeger@sysgo.de>
   8  *
   9  * (C) Copyright (c) 2001
  10  * Advent Networks, Inc. <http://www.adventnetworks.com>
  11  * Jay Monkman <jtm@smoothsmoothie.com>
  12  *
  13  * Modified so that it plays nicely when more than one ETHERNET interface
  14  * is in use a la ether_fcc.c.
  15  * (C) Copyright 2008
  16  * DENX Software Engineerin GmbH
  17  * Gary Jennejohn <garyj@denx.de>
  18  *
  19  * See file CREDITS for list of people who contributed to this
  20  * project.
  21  *
  22  * This program is free software; you can redistribute it and/or
  23  * modify it under the terms of the GNU General Public License as
  24  * published by the Free Software Foundation; either version 2 of
  25  * the License, or (at your option) any later version.
  26  *
  27  * This program is distributed in the hope that it will be useful,
  28  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  29  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  30  * GNU General Public License for more details.
  31  *
  32  * You should have received a copy of the GNU General Public License
  33  * along with this program; if not, write to the Free Software
  34  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  35  * MA 02111-1307 USA
  36  */
  37
  38 #include <common.h>
  39 #include <asm/cpm_8260.h>
  40 #include <mpc8260.h>
  41 #include <malloc.h>
  42 #include <net.h>
  43 #include <command.h>
  44 #include <config.h>
  45
  46 #ifndef CONFIG_NET_MULTI
  47 #error "CONFIG_NET_MULTI must be defined."
  48 #endif
  49
  50 #if (CONFIG_ETHER_INDEX == 1)
  51 #  define PROFF_ENET            PROFF_SCC1
  52 #  define CPM_CR_ENET_PAGE      CPM_CR_SCC1_PAGE
  53 #  define CPM_CR_ENET_SBLOCK    CPM_CR_SCC1_SBLOCK
  54 #  define CMXSCR_MASK          (CMXSCR_SC1          |\
  55                                 CMXSCR_RS1CS_MSK    |\
  56                                 CMXSCR_TS1CS_MSK)
  57
  58 #elif (CONFIG_ETHER_INDEX == 2)
  59 #  define PROFF_ENET            PROFF_SCC2
  60 #  define CPM_CR_ENET_PAGE      CPM_CR_SCC2_PAGE
  61 #  define CPM_CR_ENET_SBLOCK    CPM_CR_SCC2_SBLOCK
  62 #  define CMXSCR_MASK          (CMXSCR_SC2          |\
  63                                 CMXSCR_RS2CS_MSK    |\
  64                                 CMXSCR_TS2CS_MSK)
  65
  66 #elif (CONFIG_ETHER_INDEX == 3)
  67 #  define PROFF_ENET            PROFF_SCC3
  68 #  define CPM_CR_ENET_PAGE      CPM_CR_SCC3_PAGE
  69 #  define CPM_CR_ENET_SBLOCK    CPM_CR_SCC3_SBLOCK
  70 #  define CMXSCR_MASK          (CMXSCR_SC3          |\
  71                                 CMXSCR_RS3CS_MSK    |\
  72                                 CMXSCR_TS3CS_MSK)
  73 #elif (CONFIG_ETHER_INDEX == 4)
  74 #  define PROFF_ENET            PROFF_SCC4
  75 #  define CPM_CR_ENET_PAGE      CPM_CR_SCC4_PAGE
  76 #  define CPM_CR_ENET_SBLOCK    CPM_CR_SCC4_SBLOCK
  77 #  define CMXSCR_MASK          (CMXSCR_SC4          |\
  78                                 CMXSCR_RS4CS_MSK    |\
  79                                 CMXSCR_TS4CS_MSK)
  80
  81 #endif
  82
  83
  84 /* Ethernet Transmit and Receive Buffers */
  85 #define DBUF_LENGTH  1520
  86
  87 #define TX_BUF_CNT 2
  88
  89 #if !defined(CONFIG_SYS_SCC_TOUT_LOOP)
  90   #define CONFIG_SYS_SCC_TOUT_LOOP 1000000
  91 #endif
  92
  93 static char txbuf[TX_BUF_CNT][ DBUF_LENGTH ];
  94
  95 static uint rxIdx;      /* index of the current RX buffer */
  96 static uint txIdx;      /* index of the current TX buffer */
  97
  98 /*
  99  * SCC Ethernet Tx and Rx buffer descriptors allocated at the
 100  *  immr->udata_bd address on Dual-Port RAM
 101  * Provide for Double Buffering
 102  */
 103
 104 typedef volatile struct CommonBufferDescriptor {
 105     cbd_t rxbd[PKTBUFSRX];         /* Rx BD */
 106     cbd_t txbd[TX_BUF_CNT];        /* Tx BD */
 107 } RTXBD;
 108
 109 static RTXBD *rtx;
 110
 111
 112 static int sec_send(struct eth_device *dev, volatile void *packet, int length)
 113 {
 114     int i;
 115     int result = 0;
 116
 117     if (length <= 0) {
 118         printf("scc: bad packet size: %d\n", length);
 119         goto out;
 120     }
 121
 122     for(i=0; rtx->txbd[txIdx].cbd_sc & BD_ENET_TX_READY; i++) {
 123         if (i >= CONFIG_SYS_SCC_TOUT_LOOP) {
 124             puts ("scc: tx buffer not ready\n");
 125             goto out;
 126         }
 127     }
 128
 129     rtx->txbd[txIdx].cbd_bufaddr = (uint)packet;
 130     rtx->txbd[txIdx].cbd_datlen = length;
 131     rtx->txbd[txIdx].cbd_sc |= (BD_ENET_TX_READY | BD_ENET_TX_LAST |
 132                                 BD_ENET_TX_WRAP);
 133
 134     for(i=0; rtx->txbd[txIdx].cbd_sc & BD_ENET_TX_READY; i++) {
 135         if (i >= CONFIG_SYS_SCC_TOUT_LOOP) {
 136             puts ("scc: tx error\n");
 137             goto out;
 138         }
 139     }
 140
 141     /* return only status bits */
 142     result = rtx->txbd[txIdx].cbd_sc & BD_ENET_TX_STATS;
 143
 144  out:
 145     return result;
 146 }
 147
 148
 149 static int sec_rx(struct eth_device *dev)
 150 {
 151     int length;
 152
 153     for (;;)
 154     {
 155         if (rtx->rxbd[rxIdx].cbd_sc & BD_ENET_RX_EMPTY) {
 156             length = -1;
 157             break;     /* nothing received - leave for() loop */
 158         }
 159
 160         length = rtx->rxbd[rxIdx].cbd_datlen;
 161
 162         if (rtx->rxbd[rxIdx].cbd_sc & 0x003f)
 163         {
 164             printf("err: %x\n", rtx->rxbd[rxIdx].cbd_sc);
 165         }
 166         else
 167         {
 168             /* Pass the packet up to the protocol layers. */
 169             NetReceive(NetRxPackets[rxIdx], length - 4);
 170         }
 171
 172
 173         /* Give the buffer back to the SCC. */
 174         rtx->rxbd[rxIdx].cbd_datlen = 0;
 175
 176         /* wrap around buffer index when necessary */
 177         if ((rxIdx + 1) >= PKTBUFSRX) {
 178             rtx->rxbd[PKTBUFSRX - 1].cbd_sc = (BD_ENET_RX_WRAP |
 179                                                BD_ENET_RX_EMPTY);
 180             rxIdx = 0;
 181         }
 182         else {
 183             rtx->rxbd[rxIdx].cbd_sc = BD_ENET_RX_EMPTY;
 184             rxIdx++;
 185         }
 186     }
 187     return length;
 188 }
 189
 190 /**************************************************************
 191  *
 192  * SCC Ethernet Initialization Routine
 193  *
 194  *************************************************************/
 195
 196 static int sec_init(struct eth_device *dev, bd_t *bis)
 197 {
 198     int i;
 199     volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
 200     scc_enet_t *pram_ptr;
 201     uint dpaddr;
 202     uchar ea[6];
 203
 204     rxIdx = 0;
 205     txIdx = 0;
 206
 207     /*
 208      * Assign static pointer to BD area.
 209      * Avoid exhausting DPRAM, which would cause a panic.
 210      */
 211     if (rtx == NULL) {
 212             dpaddr = m8260_cpm_dpalloc(sizeof(RTXBD) + 2, 16);
 213             rtx = (RTXBD *)&immr->im_dprambase[dpaddr];
 214     }
 215
 216     /* 24.21 - (1-3): ioports have been set up already */
 217
 218     /* 24.21 - (4,5): connect SCC's tx and rx clocks, use NMSI for SCC */
 219     immr->im_cpmux.cmx_uar = 0;
 220     immr->im_cpmux.cmx_scr = ( (immr->im_cpmux.cmx_scr & ~CMXSCR_MASK) |
 221                                CONFIG_SYS_CMXSCR_VALUE);
 222
 223
 224     /* 24.21 (6) write RBASE and TBASE to parameter RAM */
 225     pram_ptr = (scc_enet_t *)&(immr->im_dprambase[PROFF_ENET]);
 226     pram_ptr->sen_genscc.scc_rbase = (unsigned int)(&rtx->rxbd[0]);
 227     pram_ptr->sen_genscc.scc_tbase = (unsigned int)(&rtx->txbd[0]);
 228
 229     pram_ptr->sen_genscc.scc_rfcr = 0x18;  /* Nrml Ops and Mot byte ordering */
 230     pram_ptr->sen_genscc.scc_tfcr = 0x18;  /* Mot byte ordering, Nrml access */
 231
 232     pram_ptr->sen_genscc.scc_mrblr = DBUF_LENGTH; /* max. package len 1520 */
 233
 234     pram_ptr->sen_cpres  = ~(0x0);        /* Preset CRC */
 235     pram_ptr->sen_cmask  = 0xdebb20e3;    /* Constant Mask for CRC */
 236
 237
 238     /* 24.21 - (7): Write INIT RX AND TX PARAMETERS to CPCR */
 239     while(immr->im_cpm.cp_cpcr & CPM_CR_FLG);
 240     immr->im_cpm.cp_cpcr = mk_cr_cmd(CPM_CR_ENET_PAGE,
 241                                      CPM_CR_ENET_SBLOCK,
 242                                      0x0c,
 243                                      CPM_CR_INIT_TRX) | CPM_CR_FLG;
 244
 245     /* 24.21 - (8-18): Set up parameter RAM */
 246     pram_ptr->sen_crcec  = 0x0;           /* Error Counter CRC (unused) */
 247     pram_ptr->sen_alec   = 0x0;           /* Align Error Counter (unused) */
 248     pram_ptr->sen_disfc  = 0x0;           /* Discard Frame Counter (unused) */
 249
 250     pram_ptr->sen_pads   = 0x8888;        /* Short Frame PAD Characters */
 251
 252     pram_ptr->sen_retlim = 15;            /* Retry Limit Threshold */
 253
 254     pram_ptr->sen_maxflr = 1518;  /* MAX Frame Length Register */
 255     pram_ptr->sen_minflr = 64;            /* MIN Frame Length Register */
 256
 257     pram_ptr->sen_maxd1  = DBUF_LENGTH;   /* MAX DMA1 Length Register */
 258     pram_ptr->sen_maxd2  = DBUF_LENGTH;   /* MAX DMA2 Length Register */
 259
 260     pram_ptr->sen_gaddr1 = 0x0;   /* Group Address Filter 1 (unused) */
 261     pram_ptr->sen_gaddr2 = 0x0;   /* Group Address Filter 2 (unused) */
 262     pram_ptr->sen_gaddr3 = 0x0;   /* Group Address Filter 3 (unused) */
 263     pram_ptr->sen_gaddr4 = 0x0;   /* Group Address Filter 4 (unused) */
 264
 265     eth_getenv_enetaddr("ethaddr", ea);
 266     pram_ptr->sen_paddrh = (ea[5] << 8) + ea[4];
 267     pram_ptr->sen_paddrm = (ea[3] << 8) + ea[2];
 268     pram_ptr->sen_paddrl = (ea[1] << 8) + ea[0];
 269
 270     pram_ptr->sen_pper   = 0x0;   /* Persistence (unused) */
 271
 272     pram_ptr->sen_iaddr1 = 0x0;   /* Individual Address Filter 1 (unused) */
 273     pram_ptr->sen_iaddr2 = 0x0;   /* Individual Address Filter 2 (unused) */
 274     pram_ptr->sen_iaddr3 = 0x0;   /* Individual Address Filter 3 (unused) */
 275     pram_ptr->sen_iaddr4 = 0x0;   /* Individual Address Filter 4 (unused) */
 276
 277     pram_ptr->sen_taddrh = 0x0;   /* Tmp Address (MSB) (unused) */
 278     pram_ptr->sen_taddrm = 0x0;   /* Tmp Address (unused) */
 279     pram_ptr->sen_taddrl = 0x0;   /* Tmp Address (LSB) (unused) */
 280
 281     /* 24.21 - (19): Initialize RxBD */
 282     for (i = 0; i < PKTBUFSRX; i++)
 283     {
 284         rtx->rxbd[i].cbd_sc = BD_ENET_RX_EMPTY;
 285         rtx->rxbd[i].cbd_datlen = 0;                  /* Reset */
 286         rtx->rxbd[i].cbd_bufaddr = (uint)NetRxPackets[i];
 287     }
 288
 289     rtx->rxbd[PKTBUFSRX - 1].cbd_sc |= BD_ENET_RX_WRAP;
 290
 291     /* 24.21 - (20): Initialize TxBD */
 292     for (i = 0; i < TX_BUF_CNT; i++)
 293     {
 294         rtx->txbd[i].cbd_sc = (BD_ENET_TX_PAD  |
 295                                BD_ENET_TX_LAST |
 296                                BD_ENET_TX_TC);
 297         rtx->txbd[i].cbd_datlen = 0;                  /* Reset */
 298         rtx->txbd[i].cbd_bufaddr = (uint)&txbuf[i][0];
 299     }
 300
 301     rtx->txbd[TX_BUF_CNT - 1].cbd_sc |= BD_ENET_TX_WRAP;
 302
 303     /* 24.21 - (21): Write 0xffff to SCCE */
 304     immr->im_scc[CONFIG_ETHER_INDEX-1].scc_scce = ~(0x0);
 305
 306     /* 24.21 - (22): Write to SCCM to enable TXE, RXF, TXB events */
 307     immr->im_scc[CONFIG_ETHER_INDEX-1].scc_sccm = (SCCE_ENET_TXE |
 308                                                    SCCE_ENET_RXF |
 309                                                    SCCE_ENET_TXB);
 310
 311     /* 24.21 - (23): we don't use ethernet interrupts */
 312
 313     /* 24.21 - (24): Clear GSMR_H to enable normal operations */
 314     immr->im_scc[CONFIG_ETHER_INDEX-1].scc_gsmrh = 0;
 315
 316     /* 24.21 - (25): Clear GSMR_L to enable normal operations */
 317     immr->im_scc[CONFIG_ETHER_INDEX-1].scc_gsmrl = (SCC_GSMRL_TCI        |
 318                                                     SCC_GSMRL_TPL_48     |
 319                                                     SCC_GSMRL_TPP_10     |
 320                                                     SCC_GSMRL_MODE_ENET);
 321
 322     /* 24.21 - (26): Initialize DSR */
 323     immr->im_scc[CONFIG_ETHER_INDEX-1].scc_dsr = 0xd555;
 324
 325     /* 24.21 - (27): Initialize PSMR2
 326      *
 327      * Settings:
 328      *  CRC = 32-Bit CCITT
 329      *  NIB = Begin searching for SFD 22 bits after RENA
 330      *  FDE = Full Duplex Enable
 331      *  BRO = Reject broadcast packets
 332      *  PROMISCOUS = Catch all packets regardless of dest. MAC adress
 333      */
 334     immr->im_scc[CONFIG_ETHER_INDEX-1].scc_psmr   =     SCC_PSMR_ENCRC  |
 335                                                         SCC_PSMR_NIB22  |
 336 #if defined(CONFIG_SCC_ENET_FULL_DUPLEX)
 337                                                         SCC_PSMR_FDE    |
 338 #endif
 339 #if defined(CONFIG_SCC_ENET_NO_BROADCAST)
 340                                                         SCC_PSMR_BRO    |
 341 #endif
 342 #if defined(CONFIG_SCC_ENET_PROMISCOUS)
 343                                                         SCC_PSMR_PRO    |
 344 #endif
 345                                                         0;
 346
 347     /* 24.21 - (28): Write to GSMR_L to enable SCC */
 348     immr->im_scc[CONFIG_ETHER_INDEX-1].scc_gsmrl |= (SCC_GSMRL_ENR |
 349                                                      SCC_GSMRL_ENT);
 350
 351     return 0;
 352 }
 353
 354
 355 static void sec_halt(struct eth_device *dev)
 356 {
 357     volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
 358     immr->im_scc[CONFIG_ETHER_INDEX-1].scc_gsmrl &= ~(SCC_GSMRL_ENR |
 359                                                       SCC_GSMRL_ENT);
 360 }
 361
 362 #if 0
 363 static void sec_restart(void)
 364 {
 365     volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
 366     immr->im_cpm.cp_scc[CONFIG_ETHER_INDEX-1].scc_gsmrl |= (SCC_GSMRL_ENR |
 367                                                             SCC_GSMRL_ENT);
 368 }
 369 #endif
 370
 371 int mpc82xx_scc_enet_initialize(bd_t *bis)
 372 {
 373         struct eth_device *dev;
 374
 375         dev = (struct eth_device *) malloc(sizeof *dev);
 376         memset(dev, 0, sizeof *dev);
 377
 378         sprintf(dev->name, "SCC ETHERNET");
 379         dev->init   = sec_init;
 380         dev->halt   = sec_halt;
 381         dev->send   = sec_send;
 382         dev->recv   = sec_rx;
 383
 384         eth_register(dev);
 385
 386         return 1;
 387 }