arch/ppc/platforms/gemini.h

   1 /*
   2  *  arch/ppc/platforms/gemini.h
   3  *
   4  *
   5  *  Onboard registers and descriptions for Synergy Microsystems'
   6  *  "Gemini" boards.
   7  *
   8  */
   9 #ifdef __KERNEL__
  10 #ifndef __PPC_GEMINI_H
  11 #define __PPC_GEMINI_H
  12
  13 /*  Registers  */
  14
  15 #define GEMINI_SERIAL_B     (0xffeffb00)
  16 #define GEMINI_SERIAL_A     (0xffeffb08)
  17 #define GEMINI_USWITCH      (0xffeffd00)
  18 #define GEMINI_BREV         (0xffeffe00)
  19 #define GEMINI_BECO         (0xffeffe08)
  20 #define GEMINI_FEAT         (0xffeffe10)
  21 #define GEMINI_BSTAT        (0xffeffe18)
  22 #define GEMINI_CPUSTAT      (0xffeffe20)
  23 #define GEMINI_L2CFG        (0xffeffe30)
  24 #define GEMINI_MEMCFG       (0xffeffe38)
  25 #define GEMINI_FLROM        (0xffeffe40)
  26 #define GEMINI_P0PCI        (0xffeffe48)
  27 #define GEMINI_FLWIN        (0xffeffe50)
  28 #define GEMINI_P0INTMASK    (0xffeffe60)
  29 #define GEMINI_P0INTAP      (0xffeffe68)
  30 #define GEMINI_PCIERR       (0xffeffe70)
  31 #define GEMINI_LEDBASE      (0xffeffe80)
  32 #define GEMINI_RTC          (0xffe9fff8)
  33 #define GEMINI_LEDS         8
  34 #define GEMINI_SWITCHES     8
  35
  36
  37 /* Flash ROM bit definitions */
  38 #define GEMINI_FLS_WEN      (1<<0)
  39 #define GEMINI_FLS_JMP      (1<<6)
  40 #define GEMINI_FLS_BOOT     (1<<7)
  41
  42 /* Memory bit definitions */
  43 #define GEMINI_MEM_TYPE_MASK 0xc0
  44 #define GEMINI_MEM_SIZE_MASK 0x38
  45 #define GEMINI_MEM_BANK_MASK 0x07
  46
  47 /* L2 cache bit definitions */
  48 #define GEMINI_L2_SIZE_MASK  0xc0
  49 #define GEMINI_L2_RATIO_MASK 0x03
  50
  51 /* Timebase register bit definitons */
  52 #define GEMINI_TIMEB0_EN     (1<<0)
  53 #define GEMINI_TIMEB1_EN     (1<<1)
  54 #define GEMINI_TIMEB2_EN     (1<<2)
  55 #define GEMINI_TIMEB3_EN     (1<<3)
  56
  57 /* CPU status bit definitions */
  58 #define GEMINI_CPU_ID_MASK   0x03
  59 #define GEMINI_CPU_COUNT_MASK 0x0c
  60 #define GEMINI_CPU0_HALTED   (1<<4)
  61 #define GEMINI_CPU1_HALTED   (1<<5)
  62 #define GEMINI_CPU2_HALTED   (1<<6)
  63 #define GEMINI_CPU3_HALTED   (1<<7)
  64
  65 /* Board status bit definitions */
  66 #define GEMINI_BRD_FAIL      (1<<0)   /* FAIL led is lit */
  67 #define GEMINI_BRD_BUS_MASK  0x0c     /* PowerPC bus speed */
  68
  69 /* Board family/feature bit descriptions */
  70 #define GEMINI_FEAT_HAS_FLASH (1<<0)
  71 #define GEMINI_FEAT_HAS_ETH   (1<<1)
  72 #define GEMINI_FEAT_HAS_SCSI  (1<<2)
  73 #define GEMINI_FEAT_HAS_P0    (1<<3)
  74 #define GEMINI_FEAT_FAM_MASK  0xf0
  75
  76 /* Mod/ECO bit definitions */
  77 #define GEMINI_ECO_LEVEL_MASK 0x0f
  78 #define GEMINI_MOD_MASK       0xf0
  79
  80 /* Type/revision bit definitions */
  81 #define GEMINI_REV_MASK       0x0f
  82 #define GEMINI_TYPE_MASK      0xf0
  83
  84 /* User switch definitions */
  85 #define GEMINI_SWITCH_VERBOSE    1     /* adds "debug" to boot cmd line */
  86 #define GEMINI_SWITCH_SINGLE_USER 7    /* boots into "single-user" mode */
  87
  88 #define SGS_RTC_CONTROL  0
  89 #define SGS_RTC_SECONDS  1
  90 #define SGS_RTC_MINUTES  2
  91 #define SGS_RTC_HOURS    3
  92 #define SGS_RTC_DAY      4
  93 #define SGS_RTC_DAY_OF_MONTH 5
  94 #define SGS_RTC_MONTH    6
  95 #define SGS_RTC_YEAR     7
  96
  97 #define SGS_RTC_SET  0x80
  98 #define SGS_RTC_IS_STOPPED 0x80
  99
 100 #define GRACKLE_CONFIG_ADDR_ADDR  (0xfec00000)
 101 #define GRACKLE_CONFIG_DATA_ADDR  (0xfee00000)
 102
 103 #define GEMINI_BOOT_INIT  (0xfff00100)
 104
 105 #ifndef __ASSEMBLY__
 106
 107 static inline void grackle_write( unsigned long addr, unsigned long data )
 108 {
 109   __asm__ __volatile__(
 110   " stwbrx %1, 0, %0\n \
 111     sync\n \
 112     stwbrx %3, 0, %2\n \
 113     sync "
 114   : /* no output */
 115   : "r" (GRACKLE_CONFIG_ADDR_ADDR), "r" (addr),
 116     "r" (GRACKLE_CONFIG_DATA_ADDR), "r" (data));
 117 }
 118
 119 static inline unsigned long grackle_read( unsigned long addr )
 120 {
 121   unsigned long val;
 122
 123   __asm__ __volatile__(
 124   " stwbrx %1, 0, %2\n \
 125     sync\n \
 126     lwbrx %0, 0, %3\n \
 127     sync "
 128   : "=r" (val)
 129   : "r" (addr), "r" (GRACKLE_CONFIG_ADDR_ADDR),
 130     "r" (GRACKLE_CONFIG_DATA_ADDR));
 131
 132   return val;
 133 }
 134
 135 static inline void gemini_led_on( int led )
 136 {
 137   if (led >= 0 && led < GEMINI_LEDS)
 138     *(unsigned char *)(GEMINI_LEDBASE + (led<<3)) = 1;
 139 }
 140
 141 static inline void gemini_led_off(int led)
 142 {
 143   if (led >= 0 && led < GEMINI_LEDS)
 144     *(unsigned char *)(GEMINI_LEDBASE + (led<<3)) = 0;
 145 }
 146
 147 static inline int gemini_led_val(int led)
 148 {
 149   int val = 0;
 150   if (led >= 0 && led < GEMINI_LEDS)
 151     val = *(unsigned char *)(GEMINI_LEDBASE + (led<<3));
 152   return (val & 0x1);
 153 }
 154
 155 /* returns processor id from the board */
 156 static inline int gemini_processor(void)
 157 {
 158   unsigned char cpu = *(unsigned char *)(GEMINI_CPUSTAT);
 159   return (int) ((cpu == 0) ? 4 : (cpu & GEMINI_CPU_ID_MASK));
 160 }
 161
 162
 163 extern void _gemini_reboot(void);
 164 extern void gemini_prom_init(void);
 165 extern void gemini_init_l2(void);
 166 #endif /* __ASSEMBLY__ */
 167 #endif
 168 #endif /* __KERNEL__ */