arch/ppc/platforms/k2.h

   1 /*
   2  * arch/ppc/platforms/k2.h
   3  *
   4  * Definitions for SBS K2 board support
   5  *
   6  * Author: Matt Porter <mporter@mvista.com>
   7  *
   8  * 2001 (c) MontaVista, Software, Inc.  This file is licensed under
   9  * the terms of the GNU General Public License version 2.  This program
  10  * is licensed "as is" without any warranty of any kind, whether express
  11  * or implied.
  12  */
  13
  14 #ifndef __PPC_PLATFORMS_K2_H
  15 #define __PPC_PLATFORMS_K2_H
  16
  17 /*
  18  * SBS K2 definitions
  19  */
  20
  21 #define K2_PCI64_BAR            0xff400000
  22 #define K2_PCI32_BAR            0xff500000
  23
  24 #define K2_PCI64_CONFIG_ADDR    (K2_PCI64_BAR + 0x000f8000)
  25 #define K2_PCI64_CONFIG_DATA    (K2_PCI64_BAR + 0x000f8010)
  26
  27 #define K2_PCI32_CONFIG_ADDR    (K2_PCI32_BAR + 0x000f8000)
  28 #define K2_PCI32_CONFIG_DATA    (K2_PCI32_BAR + 0x000f8010)
  29
  30 #define K2_PCI64_MEM_BASE       0xd0000000
  31 #define K2_PCI64_IO_BASE        0x80100000
  32
  33 #define K2_PCI32_MEM_BASE       0xc0000000
  34 #define K2_PCI32_IO_BASE        0x80000000
  35
  36 #define K2_PCI32_SYS_MEM_BASE   0x80000000
  37 #define K2_PCI64_SYS_MEM_BASE   K2_PCI32_SYS_MEM_BASE
  38
  39 #define K2_PCI32_LOWER_MEM      0x00000000
  40 #define K2_PCI32_UPPER_MEM      0x0fffffff
  41 #define K2_PCI32_LOWER_IO       0x00000000
  42 #define K2_PCI32_UPPER_IO       0x000fffff
  43
  44 #define K2_PCI64_LOWER_MEM      0x10000000
  45 #define K2_PCI64_UPPER_MEM      0x1fffffff
  46 #define K2_PCI64_LOWER_IO       0x00100000
  47 #define K2_PCI64_UPPER_IO       0x001fffff
  48
  49 #define K2_ISA_IO_BASE          K2_PCI32_IO_BASE
  50 #define K2_ISA_MEM_BASE         K2_PCI32_MEM_BASE
  51
  52 #define K2_BOARD_ID_REG         (K2_ISA_IO_BASE + 0x800)
  53 #define K2_MISC_REG             (K2_ISA_IO_BASE + 0x804)
  54 #define K2_MSIZ_GEO_REG         (K2_ISA_IO_BASE + 0x808)
  55 #define K2_HOT_SWAP_REG         (K2_ISA_IO_BASE + 0x80c)
  56 #define K2_PLD2_REG             (K2_ISA_IO_BASE + 0x80e)
  57 #define K2_PLD3_REG             (K2_ISA_IO_BASE + 0x80f)
  58
  59 #define K2_BUS_SPD(board_id)    (board_id >> 2) & 3
  60
  61 #define K2_RTC_BASE_OFFSET      0x90000
  62 #define K2_RTC_BASE_ADDRESS     (K2_PCI32_MEM_BASE + K2_RTC_BASE_OFFSET)
  63 #define K2_RTC_SIZE             0x8000
  64
  65 #define K2_MEM_SIZE_MASK        0xe0
  66 #define K2_MEM_SIZE(size_reg)   (size_reg & K2_MEM_SIZE_MASK) >> 5
  67 #define K2_MEM_SIZE_1GB         0x40000000
  68 #define K2_MEM_SIZE_512MB       0x20000000
  69 #define K2_MEM_SIZE_256MB       0x10000000
  70 #define K2_MEM_SIZE_128MB       0x08000000
  71
  72 #define K2_L2CACHE_MASK         0x03    /* Mask for 2 L2 Cache bits */
  73 #define K2_L2CACHE_512KB        0x00    /* 512KB */
  74 #define K2_L2CACHE_256KB        0x01    /* 256KB */
  75 #define K2_L2CACHE_1MB          0x02    /* 1MB */
  76 #define K2_L2CACHE_NONE         0x03    /* None */
  77
  78 #define K2_GEO_ADR_MASK         0x1f
  79
  80 #define K2_SYS_SLOT_MASK        0x08
  81
  82 #endif /* __PPC_PLATFORMS_K2_H */