arch/riscv/dts/k210.dtsi

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
   4  */
   5
   6 #include <dt-bindings/clock/k210-sysctl.h>
   7 #include <dt-bindings/mfd/k210-sysctl.h>
   8 #include <dt-bindings/pinctrl/k210-pinctrl.h>
   9 #include <dt-bindings/reset/k210-sysctl.h>
  10
  11 / {
  12         /*
  13          * Although the K210 is a 64-bit CPU, the address bus is only 32-bits
  14          * wide, and the upper half of all addresses is ignored.
  15          */
  16         #address-cells = <1>;
  17         #size-cells = <1>;
  18         compatible = "canaan,kendryte-k210";
  19
  20         aliases {
  21                 cpu0 = &cpu0;
  22                 cpu1 = &cpu1;
  23                 dma0 = &dmac0;
  24                 gpio0 = &gpio0;
  25                 gpio1 = &gpio1_0;
  26                 i2c0 = &i2c0;
  27                 i2c1 = &i2c1;
  28                 i2c2 = &i2c2;
  29                 pinctrl0 = &fpioa;
  30                 serial0 = &uarths0;
  31                 serial1 = &uart1;
  32                 serial2 = &uart2;
  33                 serial3 = &uart3;
  34                 spi0 = &spi0;
  35                 spi1 = &spi1;
  36                 spi2 = &spi2;
  37                 spi3 = &spi3;
  38                 timer0 = &timer0;
  39                 timer1 = &timer1;
  40                 timer2 = &timer2;
  41         };
  42
  43         cpus {
  44                 #address-cells = <1>;
  45                 #size-cells = <0>;
  46                 timebase-frequency = <7800000>;
  47                 cpu0: cpu@0 {
  48                         device_type = "cpu";
  49                         compatible = "canaan,k210", "sifive,rocket0", "riscv";
  50                         reg = <0>;
  51                         riscv,isa = "rv64imafdgc";
  52                         mmu-type = "sv39";
  53                         i-cache-block-size = <64>;
  54                         i-cache-size = <0x8000>;
  55                         d-cache-block-size = <64>;
  56                         d-cache-size = <0x8000>;
  57                         clocks = <&sysclk K210_CLK_CPU>;
  58                         cpu0_intc: interrupt-controller {
  59                                 #interrupt-cells = <1>;
  60                                 interrupt-controller;
  61                                 compatible = "riscv,cpu-intc";
  62                         };
  63                 };
  64                 cpu1: cpu@1 {
  65                         device_type = "cpu";
  66                         compatible = "canaan,k210", "sifive,rocket0", "riscv";
  67                         reg = <1>;
  68                         riscv,isa = "rv64imafdgc";
  69                         mmu-type = "sv39";
  70                         i-cache-block-size = <64>;
  71                         i-cache-size = <0x8000>;
  72                         d-cache-block-size = <64>;
  73                         d-cache-size = <0x8000>;
  74                         clocks = <&sysclk K210_CLK_CPU>;
  75                         cpu1_intc: interrupt-controller {
  76                                 #interrupt-cells = <1>;
  77                                 interrupt-controller;
  78                                 compatible = "riscv,cpu-intc";
  79                         };
  80                 };
  81         };
  82
  83         sram: memory@80000000 {
  84                 device_type = "memory";
  85                 compatible = "canaan,k210-sram";
  86                 reg = <0x80000000 0x400000>,
  87                       <0x80400000 0x200000>,
  88                       <0x80600000 0x200000>;
  89                 reg-names = "sram0", "sram1", "aisram";
  90                 clocks = <&sysclk K210_CLK_SRAM0>,
  91                          <&sysclk K210_CLK_SRAM1>,
  92                          <&sysclk K210_CLK_AI>;
  93                 clock-names = "sram0", "sram1", "aisram";
  94                 u-boot,dm-pre-reloc;
  95         };
  96
  97         clocks {
  98                 in0: osc {
  99                         compatible = "fixed-clock";
 100                         #clock-cells = <0>;
 101                         clock-frequency = <26000000>;
 102                         u-boot,dm-pre-reloc;
 103                 };
 104         };
 105
 106         soc {
 107                 #address-cells = <1>;
 108                 #size-cells = <1>;
 109                 compatible = "canaan,k210-soc", "simple-bus";
 110                 ranges;
 111                 interrupt-parent = <&plic0>;
 112
 113                 debug0: debug@0 {
 114                         compatible = "canaan,k210-debug", "riscv,debug";
 115                         reg = <0x0 0x1000>;
 116                 };
 117
 118                 rom0: nvmem@1000 {
 119                         reg = <0x1000 0x1000>;
 120                         read-only;
 121                 };
 122
 123                 clint0: clint@2000000 {
 124                         #interrupt-cells = <1>;
 125                         compatible = "canaan,k210-clint", "sifive,clint0", "riscv,clint0";
 126                         reg = <0x2000000 0xC000>;
 127                         interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>,
 128                                               <&cpu1_intc 3>, <&cpu1_intc 7>;
 129                         clocks = <&sysclk K210_CLK_CLINT>;
 130                 };
 131
 132                 plic0: interrupt-controller@C000000 {
 133                         #interrupt-cells = <1>;
 134                         compatible = "canaan,k210-plic", "sifive,plic-1.0.0", "riscv,plic0";
 135                         reg = <0xC000000 0x4000000>;
 136                         interrupt-controller;
 137                         interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>,
 138                                               <&cpu1_intc 11>, <&cpu1_intc 9>;
 139                         riscv,ndev = <65>;
 140                         riscv,max-priority = <7>;
 141                 };
 142
 143                 uarths0: serial@38000000 {
 144                         compatible = "canaan,k210-uarths", "sifive,uart0";
 145                         reg = <0x38000000 0x1000>;
 146                         interrupts = <33>;
 147                         clocks = <&sysclk K210_CLK_CPU>;
 148                         status = "disabled";
 149                 };
 150
 151                 gpio0: gpio-controller@38001000 {
 152                         #interrupt-cells = <2>;
 153                         #gpio-cells = <2>;
 154                         compatible = "canaan,k210-gpiohs", "sifive,gpio0";
 155                         reg = <0x38001000 0x1000>;
 156                         interrupt-controller;
 157                         interrupts = <34 35 36 37 38 39 40 41
 158                                       42 43 44 45 46 47 48 49
 159                                       50 51 52 53 54 55 56 57
 160                                       58 59 60 61 62 63 64 65>;
 161                         gpio-controller;
 162                         ngpios = <32>;
 163                         status = "disabled";
 164                 };
 165
 166                 kpu0: kpu@40800000 {
 167                         compatible = "canaan,k210-kpu";
 168                         reg = <0x40800000 0xc00000>;
 169                         interrupts = <25>;
 170                         clocks = <&sysclk K210_CLK_AI>;
 171                         status = "disabled";
 172                 };
 173
 174                 fft0: fft@42000000 {
 175                         compatible = "canaan,k210-fft";
 176                         reg = <0x42000000 0x400000>;
 177                         interrupts = <26>;
 178                         clocks = <&sysclk K210_CLK_FFT>;
 179                         resets = <&sysrst K210_RST_FFT>;
 180                         status = "disabled";
 181                 };
 182
 183                 dmac0: dma-controller@50000000 {
 184                         compatible = "canaan,k210-dmac", "snps,axi-dma-1.01a";
 185                         reg = <0x50000000 0x1000>;
 186                         interrupts = <27 28 29 30 31 32>;
 187                         clocks = <&sysclk K210_CLK_DMA>, <&sysclk K210_CLK_DMA>;
 188                         clock-names = "core-clk", "cfgr-clk";
 189                         resets = <&sysrst K210_RST_DMA>;
 190                         dma-channels = <6>;
 191                         snps,dma-masters = <2>;
 192                         snps,data-width = <5>;
 193                         snps,block-size = <0x200000 0x200000 0x200000
 194                                            0x200000 0x200000 0x200000>;
 195                         snps,axi-max-burst-len = <256>;
 196                         status = "disabled";
 197                 };
 198
 199                 apb0: bus@50200000 {
 200                         #address-cells = <1>;
 201                         #size-cells = <1>;
 202                         compatible = "canaan,k210-apb", "simple-pm-bus";
 203                         ranges;
 204                         clocks = <&sysclk K210_CLK_APB0>;
 205
 206                         gpio1: gpio-controller@50200000 {
 207                                 #address-cells = <1>;
 208                                 #size-cells = <0>;
 209                                 compatible = "canaan,k210-gpio",
 210                                              "snps,dw-apb-gpio";
 211                                 reg = <0x50200000 0x80>;
 212                                 clocks = <&sysclk K210_CLK_APB0>,
 213                                          <&sysclk K210_CLK_GPIO>;
 214                                 clock-names = "bus", "db";
 215                                 resets = <&sysrst K210_RST_GPIO>;
 216                                 status = "disabled";
 217
 218                                 gpio1_0: gpio1@0 {
 219                                         #gpio-cells = <2>;
 220                                         #interrupt-cells = <2>;
 221                                         compatible = "snps,dw-apb-gpio-port";
 222                                         reg = <0>;
 223                                         interrupt-controller;
 224                                         interrupts = <23>;
 225                                         gpio-controller;
 226                                         snps,nr-gpios = <8>;
 227                                 };
 228                         };
 229
 230                         uart1: serial@50210000 {
 231                                 compatible = "canaan,k210-uart",
 232                                              "snps,dw-apb-uart";
 233                                 reg = <0x50210000 0x100>;
 234                                 interrupts = <11>;
 235                                 clocks = <&sysclk K210_CLK_UART1>,
 236                                          <&sysclk K210_CLK_APB0>;
 237                                 clock-names = "baudclk", "apb_pclk";
 238                                 resets = <&sysrst K210_RST_UART1>;
 239                                 reg-io-width = <4>;
 240                                 reg-shift = <2>;
 241                                 dcd-override;
 242                                 dsr-override;
 243                                 cts-override;
 244                                 ri-override;
 245                                 status = "disabled";
 246                         };
 247
 248                         uart2: serial@50220000 {
 249                                 compatible = "canaan,k210-uart",
 250                                              "snps,dw-apb-uart";
 251                                 reg = <0x50220000 0x100>;
 252                                 interrupts = <12>;
 253                                 clocks = <&sysclk K210_CLK_UART2>,
 254                                          <&sysclk K210_CLK_APB0>;
 255                                 clock-names = "baudclk", "apb_pclk";
 256                                 resets = <&sysrst K210_RST_UART2>;
 257                                 reg-io-width = <4>;
 258                                 reg-shift = <2>;
 259                                 dcd-override;
 260                                 dsr-override;
 261                                 cts-override;
 262                                 ri-override;
 263                                 status = "disabled";
 264                         };
 265
 266                         uart3: serial@50230000 {
 267                                 compatible = "canaan,k210-uart",
 268                                              "snps,dw-apb-uart";
 269                                 reg = <0x50230000 0x100>;
 270                                 interrupts = <13>;
 271                                 clocks = <&sysclk K210_CLK_UART3>,
 272                                          <&sysclk K210_CLK_APB0>;
 273                                 clock-names = "baudclk", "apb_pclk";
 274                                 resets = <&sysrst K210_RST_UART3>;
 275                                 reg-io-width = <4>;
 276                                 reg-shift = <2>;
 277                                 dcd-override;
 278                                 dsr-override;
 279                                 cts-override;
 280                                 ri-override;
 281                                 status = "disabled";
 282                         };
 283
 284                         spi2: spi@50240000 {
 285                                 compatible = "canaan,k210-spi",
 286                                              "snps,dw-apb-ssi-4.01",
 287                                              "snps,dw-apb-ssi";
 288                                 spi-slave;
 289                                 reg = <0x50240000 0x100>;
 290                                 interrupts = <2>;
 291                                 clocks = <&sysclk K210_CLK_SPI2>,
 292                                          <&sysclk K210_CLK_APB0>;
 293                                 clock-names = "ssi_clk", "pclk";
 294                                 resets = <&sysrst K210_RST_SPI2>;
 295                                 spi-max-frequency = <25000000>;
 296                                 status = "disabled";
 297                         };
 298
 299                         i2s0: i2s@50250000 {
 300                                 compatible = "canaan,k210-i2s",
 301                                              "snps,designware-i2s";
 302                                 reg = <0x50250000 0x200>;
 303                                 interrupts = <5>;
 304                                 clocks = <&sysclk K210_CLK_I2S0>;
 305                                 clock-names = "i2sclk";
 306                                 resets = <&sysrst K210_RST_I2S0>;
 307                                 status = "disabled";
 308                         };
 309
 310                         apu0: sound@520250200 {
 311                                 compatible = "canaan,k210-apu";
 312                                 reg = <0x50250200 0x200>;
 313                                 status = "disabled";
 314                         };
 315
 316                         i2s1: i2s@50260000 {
 317                                 compatible = "canaan,k210-i2s",
 318                                              "snps,designware-i2s";
 319                                 reg = <0x50260000 0x200>;
 320                                 interrupts = <6>;
 321                                 clocks = <&sysclk K210_CLK_I2S1>;
 322                                 clock-names = "i2sclk";
 323                                 resets = <&sysrst K210_RST_I2S1>;
 324                                 status = "disabled";
 325                         };
 326
 327                         i2s2: i2s@50270000 {
 328                                 compatible = "canaan,k210-i2s",
 329                                              "snps,designware-i2s";
 330                                 reg = <0x50270000 0x200>;
 331                                 interrupts = <7>;
 332                                 clocks = <&sysclk K210_CLK_I2S2>;
 333                                 clock-names = "i2sclk";
 334                                 resets = <&sysrst K210_RST_I2S2>;
 335                                 status = "disabled";
 336                         };
 337
 338                         i2c0: i2c@50280000 {
 339                                 compatible = "canaan,k210-i2c",
 340                                              "snps,designware-i2c";
 341                                 reg = <0x50280000 0x100>;
 342                                 interrupts = <8>;
 343                                 clocks = <&sysclk K210_CLK_I2C0>,
 344                                          <&sysclk K210_CLK_APB0>;
 345                                 clock-names = "ref", "pclk";
 346                                 resets = <&sysrst K210_RST_I2C0>;
 347                                 status = "disabled";
 348                         };
 349
 350                         i2c1: i2c@50290000 {
 351                                 compatible = "canaan,k210-i2c",
 352                                              "snps,designware-i2c";
 353                                 reg = <0x50290000 0x100>;
 354                                 interrupts = <9>;
 355                                 clocks = <&sysclk K210_CLK_I2C1>,
 356                                          <&sysclk K210_CLK_APB0>;
 357                                 clock-names = "ref", "pclk";
 358                                 resets = <&sysrst K210_RST_I2C1>;
 359                                 status = "disabled";
 360                         };
 361
 362                         i2c2: i2c@502A0000 {
 363                                 compatible = "canaan,k210-i2c",
 364                                              "snps,designware-i2c";
 365                                 reg = <0x502A0000 0x100>;
 366                                 interrupts = <10>;
 367                                 clocks = <&sysclk K210_CLK_I2C2>,
 368                                          <&sysclk K210_CLK_APB0>;
 369                                 clock-names = "ref", "pclk";
 370                                 resets = <&sysrst K210_RST_I2C2>;
 371                                 status = "disabled";
 372                         };
 373
 374                         fpioa: pinmux@502B0000 {
 375                                 compatible = "canaan,k210-fpioa";
 376                                 reg = <0x502B0000 0x100>;
 377                                 clocks = <&sysclk K210_CLK_FPIOA>,
 378                                          <&sysclk K210_CLK_APB0>;
 379                                 clock-names = "ref", "pclk";
 380                                 resets = <&sysrst K210_RST_FPIOA>;
 381                                 canaan,k210-sysctl-power = <&sysctl K210_SYSCTL_POWER_SEL>;
 382                                 pinctrl-0 = <&fpioa_jtag>;
 383                                 pinctrl-names = "default";
 384                                 status = "disabled";
 385
 386                                 fpioa_jtag: jtag {
 387                                         pinmux = <K210_FPIOA(0, K210_PCF_JTAG_TCLK)>,
 388                                                  <K210_FPIOA(1, K210_PCF_JTAG_TDI)>,
 389                                                  <K210_FPIOA(2, K210_PCF_JTAG_TMS)>,
 390                                                  <K210_FPIOA(3, K210_PCF_JTAG_TDO)>;
 391                                 };
 392                         };
 393
 394                         sha256: sha256@502C0000 {
 395                                 compatible = "canaan,k210-sha256";
 396                                 reg = <0x502C0000 0x100>;
 397                                 clocks = <&sysclk K210_CLK_SHA>;
 398                                 resets = <&sysrst K210_RST_SHA>;
 399                                 status = "disabled";
 400                         };
 401
 402                         timer0: timer@502D0000 {
 403                                 compatible = "canaan,k210-timer",
 404                                              "snps,dw-apb-timer";
 405                                 reg = <0x502D0000 0x100>;
 406                                 interrupts = <14 15>;
 407                                 clocks = <&sysclk K210_CLK_TIMER0>,
 408                                          <&sysclk K210_CLK_APB0>;
 409                                 clock-names = "timer", "pclk";
 410                                 resets = <&sysrst K210_RST_TIMER0>;
 411                                 status = "disabled";
 412                         };
 413
 414                         timer1: timer@502E0000 {
 415                                 compatible = "canaan,k210-timer",
 416                                              "snps,dw-apb-timer";
 417                                 reg = <0x502E0000 0x100>;
 418                                 interrupts = <16 17>;
 419                                 clocks = <&sysclk K210_CLK_TIMER1>,
 420                                          <&sysclk K210_CLK_APB0>;
 421                                 clock-names = "timer", "pclk";
 422                                 resets = <&sysrst K210_RST_TIMER1>;
 423                                 status = "disabled";
 424                         };
 425
 426                         timer2: timer@502F0000 {
 427                                 compatible = "canaan,k210-timer",
 428                                              "snps,dw-apb-timer";
 429                                 reg = <0x502F0000 0x100>;
 430                                 interrupts = <18 19>;
 431                                 clocks = <&sysclk K210_CLK_TIMER2>,
 432                                          <&sysclk K210_CLK_APB0>;
 433                                 clock-names = "timer", "pclk";
 434                                 resets = <&sysrst K210_RST_TIMER2>;
 435                                 status = "disabled";
 436                         };
 437                 };
 438
 439                 apb1: bus@50400000 {
 440                         #address-cells = <1>;
 441                         #size-cells = <1>;
 442                         compatible = "canaan,k210-apb", "simple-pm-bus";
 443                         ranges;
 444                         clocks = <&sysclk K210_CLK_APB1>;
 445
 446                         wdt0: watchdog@50400000 {
 447                                 compatible = "canaan,k210-wdt", "snps,dw-wdt";
 448                                 reg = <0x50400000 0x100>;
 449                                 interrupts = <21>;
 450                                 clocks = <&sysclk K210_CLK_WDT0>,
 451                                          <&sysclk K210_CLK_APB1>;
 452                                 clock-names = "tclk", "pclk";
 453                                 resets = <&sysrst K210_RST_WDT0>;
 454                         };
 455
 456                         wdt1: watchdog@50410000 {
 457                                 compatible = "canaan,k210-wdt", "snps,dw-wdt";
 458                                 reg = <0x50410000 0x100>;
 459                                 interrupts = <22>;
 460                                 clocks = <&sysclk K210_CLK_WDT1>,
 461                                          <&sysclk K210_CLK_APB1>;
 462                                 clock-names = "tclk", "pclk";
 463                                 resets = <&sysrst K210_RST_WDT1>;
 464                                 status = "disabled";
 465                         };
 466
 467                         otp0: nvmem@50420000 {
 468                                 #address-cells = <1>;
 469                                 #size-cells = <1>;
 470                                 compatible = "canaan,k210-otp";
 471                                 reg = <0x50420000 0x100>,
 472                                       <0x88000000 0x20000>;
 473                                 reg-names = "reg", "mem";
 474                                 clocks = <&sysclk K210_CLK_ROM>;
 475                                 resets = <&sysrst K210_RST_ROM>;
 476                                 read-only;
 477                                 status = "disabled";
 478
 479                                 /* Bootloader */
 480                                 firmware@00000 {
 481                                         reg = <0x00000 0xC200>;
 482                                 };
 483
 484                                 /*
 485                                  * config string as described in RISC-V
 486                                  * privileged spec 1.9
 487                                  */
 488                                 config-1-9@1c000 {
 489                                         reg = <0x1C000 0x1000>;
 490                                 };
 491
 492                                 /*
 493                                  * Device tree containing only registers,
 494                                  * interrupts, and cpus
 495                                  */
 496                                 fdt@1d000 {
 497                                         reg = <0x1D000 0x2000>;
 498                                 };
 499
 500                                 /* CPU/ROM credits */
 501                                 credits@1f000 {
 502                                         reg = <0x1F000 0x1000>;
 503                                 };
 504                         };
 505
 506                         dvp0: camera@50430000 {
 507                                 compatible = "canaan,k210-dvp";
 508                                 reg = <0x50430000 0x100>;
 509                                 interrupts = <24>;
 510                                 clocks = <&sysclk K210_CLK_DVP>;
 511                                 resets = <&sysrst K210_RST_DVP>;
 512                                 canaan,k210-sysctl = <&sysctl>;
 513                                 canaan,k210-misc-offset = <K210_SYSCTL_MISC>;
 514                                 status = "disabled";
 515                         };
 516
 517                         sysctl: syscon@50440000 {
 518                                 compatible = "canaan,k210-sysctl",
 519                                              "syscon", "simple-mfd";
 520                                 reg = <0x50440000 0x100>;
 521                                 clocks = <&sysclk K210_CLK_APB1>;
 522                                 clock-names = "pclk";
 523                                 reg-io-width = <4>;
 524                                 u-boot,dm-pre-reloc;
 525
 526                                 sysclk: clock-controller {
 527                                         #clock-cells = <1>;
 528                                         compatible = "canaan,k210-clk";
 529                                         clocks = <&in0>;
 530                                         assigned-clocks = <&sysclk K210_CLK_PLL1>;
 531                                         assigned-clock-rates = <390000000>;
 532                                         u-boot,dm-pre-reloc;
 533                                 };
 534
 535                                 sysrst: reset-controller {
 536                                         compatible = "canaan,k210-rst",
 537                                                      "syscon-reset";
 538                                         #reset-cells = <1>;
 539                                         regmap = <&sysctl>;
 540                                         offset = <K210_SYSCTL_PERI_RESET>;
 541                                         mask = <0x27FFFFFF>;
 542                                         assert-high = <1>;
 543                                 };
 544
 545                                 reboot {
 546                                         compatible = "syscon-reboot";
 547                                         regmap = <&sysctl>;
 548                                         offset = <K210_SYSCTL_SOFT_RESET>;
 549                                         mask = <1>;
 550                                         value = <1>;
 551                                 };
 552                         };
 553
 554                         aes0: aes@50450000 {
 555                                 compatible = "canaan,k210-aes";
 556                                 reg = <0x50450000 0x100>;
 557                                 clocks = <&sysclk K210_CLK_AES>;
 558                                 resets = <&sysrst K210_RST_AES>;
 559                                 status = "disabled";
 560                         };
 561
 562                         rtc: rtc@50460000 {
 563                                 compatible = "canaan,k210-rtc";
 564                                 reg = <0x50460000 0x100>;
 565                                 clocks = <&in0>;
 566                                 resets = <&sysrst K210_RST_RTC>;
 567                                 interrupts = <20>;
 568                                 status = "disabled";
 569                         };
 570                 };
 571
 572                 apb2: bus@52000000 {
 573                         #address-cells = <1>;
 574                         #size-cells = <1>;
 575                         compatible = "canaan,k210-apb", "simple-pm-bus";
 576                         ranges;
 577                         clocks = <&sysclk K210_CLK_APB2>;
 578
 579                         spi0: spi@52000000 {
 580                                 #address-cells = <1>;
 581                                 #size-cells = <0>;
 582                                 compatible = "canaan,k210-spi",
 583                                              "snps,dw-apb-ssi-4.01",
 584                                              "snps,dw-apb-ssi";
 585                                 reg = <0x52000000 0x100>;
 586                                 interrupts = <1>;
 587                                 clocks = <&sysclk K210_CLK_SPI0>,
 588                                          <&sysclk K210_CLK_APB2>;
 589                                 clock-names = "ssi_clk", "pclk";
 590                                 resets = <&sysrst K210_RST_SPI0>;
 591                                 spi-max-frequency = <25000000>;
 592                                 num-cs = <4>;
 593                                 reg-io-width = <4>;
 594                                 status = "disabled";
 595                         };
 596
 597                         spi1: spi@53000000 {
 598                                 #address-cells = <1>;
 599                                 #size-cells = <0>;
 600                                 compatible = "canaan,k210-spi",
 601                                              "snps,dw-apb-ssi-4.01",
 602                                              "snps,dw-apb-ssi";
 603                                 reg = <0x53000000 0x100>;
 604                                 interrupts = <2>;
 605                                 clocks = <&sysclk K210_CLK_SPI1>,
 606                                          <&sysclk K210_CLK_APB2>;
 607                                 clock-names = "ssi_clk", "pclk";
 608                                 resets = <&sysrst K210_RST_SPI1>;
 609                                 spi-max-frequency = <25000000>;
 610                                 num-cs = <4>;
 611                                 reg-io-width = <4>;
 612                                 status = "disabled";
 613                         };
 614
 615                         spi3: spi@54000000 {
 616                                 #address-cells = <1>;
 617                                 #size-cells = <0>;
 618                                 compatible = "canaan,k210-ssi",
 619                                              "snps,dwc-ssi-1.01a";
 620                                 reg = <0x54000000 0x200>;
 621                                 interrupts = <4>;
 622                                 clocks = <&sysclk K210_CLK_SPI3>,
 623                                          <&sysclk K210_CLK_APB2>;
 624                                 clock-names = "ssi_clk", "pclk";
 625                                 resets = <&sysrst K210_RST_SPI3>;
 626                                 /* Could possibly go up to 200 MHz */
 627                                 spi-max-frequency = <100000000>;
 628                                 num-cs = <4>;
 629                                 reg-io-width = <4>;
 630                                 status = "disabled";
 631                         };
 632                 };
 633         };
 634 };