arch/sparc/cpu/leon3/cpu_init.c

   1 /* Initializes CPU and basic hardware such as memory
   2  * controllers, IRQ controller and system timer 0.
   3  *
   4  * (C) Copyright 2007, 2015
   5  * Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #include <common.h>
  11 #include <asm/asi.h>
  12 #include <asm/leon.h>
  13 #include <ambapp.h>
  14 #include <grlib/irqmp.h>
  15 #include <grlib/gptimer.h>
  16
  17 #include <config.h>
  18
  19 /* Default Plug&Play I/O area */
  20 #ifndef CONFIG_AMBAPP_IOAREA
  21 #define CONFIG_AMBAPP_IOAREA AMBA_DEFAULT_IOAREA
  22 #endif
  23
  24 #define TIMER_BASE_CLK 1000000
  25 #define US_PER_TICK (1000000 / CONFIG_SYS_HZ)
  26
  27 DECLARE_GLOBAL_DATA_PTR;
  28
  29 /* reset CPU (jump to 0, without reset) */
  30 void start(void);
  31
  32 ambapp_dev_irqmp *irqmp = NULL;
  33 ambapp_dev_gptimer *gptimer = NULL;
  34 unsigned int gptimer_irq = 0;
  35 int leon3_snooping_avail = 0;
  36
  37 struct {
  38         gd_t gd_area;
  39         bd_t bd;
  40 } global_data;
  41
  42 /*
  43  * Breath some life into the CPU...
  44  *
  45  * Run from FLASH/PROM:
  46  *  - until memory controller is set up, only registers available
  47  *  - memory controller has already been setup up, stack can be used
  48  *  - no global variables available for writing
  49  *  - constants available
  50  */
  51 void cpu_init_f(void)
  52 {
  53
  54 }
  55
  56 /* Routine called from start.S,
  57  *
  58  * Run from FLASH/PROM:
  59  *  - memory controller has already been setup up, stack can be used
  60  *  - global variables available for read/writing
  61  *  - constants avaiable
  62          */
  63 void cpu_init_f2(void)
  64 {
  65         /* Initialize the AMBA Plug & Play bus structure, the bus
  66          * structure represents the AMBA bus that the CPU is located at.
  67          */
  68         ambapp_bus_init(CONFIG_AMBAPP_IOAREA, CONFIG_SYS_CLK_FREQ, &ambapp_plb);
  69 }
  70
  71 /*
  72  * initialize higher level parts of CPU like time base and timers
  73  */
  74 int cpu_init_r(void)
  75 {
  76         ambapp_apbdev apbdev;
  77         int index, cpu;
  78         ambapp_dev_gptimer *timer = NULL;
  79         unsigned int bus_freq;
  80
  81         /*
  82          * Find AMBA APB IRQMP Controller,
  83          */
  84         if (ambapp_apb_find(&ambapp_plb, VENDOR_GAISLER,
  85                 GAISLER_IRQMP, 0, &apbdev) != 1) {
  86                 panic("%s: IRQ controller not found\n", __func__);
  87                 return -1;
  88         }
  89         irqmp = (ambapp_dev_irqmp *)apbdev.address;
  90
  91         /* initialize the IRQMP */
  92         irqmp->ilevel = 0xf;    /* all IRQ off */
  93         irqmp->iforce = 0;
  94         irqmp->ipend = 0;
  95         irqmp->iclear = 0xfffe; /* clear all old pending interrupts */
  96         for (cpu = 0; cpu < 16; cpu++) {
  97                 /* mask and clear force for all IRQs on CPU[N] */
  98                 irqmp->cpu_mask[cpu] = 0;
  99                 irqmp->cpu_force[cpu] = 0;
 100         }
 101
 102         /* timer */
 103         index = 0;
 104         while (ambapp_apb_find(&ambapp_plb, VENDOR_GAISLER, GAISLER_GPTIMER,
 105                 index, &apbdev) == 1) {
 106                 timer = (ambapp_dev_gptimer *)apbdev.address;
 107                 if (gptimer == NULL) {
 108                         gptimer = timer;
 109                         gptimer_irq = apbdev.irq;
 110                 }
 111
 112                 /* Different buses may have different frequency, the
 113                  * frequency of the bus tell in which frequency the timer
 114                  * prescaler operates.
 115                  */
 116                 bus_freq = ambapp_bus_freq(&ambapp_plb, apbdev.ahb_bus_index);
 117
 118                 /* initialize prescaler common to all timers to 1MHz */
 119                 timer->scalar = timer->scalar_reload =
 120                     (((bus_freq / 1000) + 500) / 1000) - 1;
 121
 122                 index++;
 123         }
 124         if (!gptimer) {
 125                 printf("%s: gptimer not found!\n", __func__);
 126                 return 1;
 127         }
 128         return 0;
 129 }
 130
 131 /* Uses Timer 0 to get accurate
 132  * pauses. Max 2 raised to 32 ticks
 133  *
 134  */
 135 void cpu_wait_ticks(unsigned long ticks)
 136 {
 137         unsigned long start = get_timer(0);
 138         while (get_timer(start) < ticks) ;
 139 }
 140
 141 /* initiate and setup timer0 interrupt to configured HZ. Base clock is 1MHz.
 142  * Return irq number for timer int or a negative number for
 143  * dealing with self
 144  */
 145 int timer_interrupt_init_cpu(void)
 146 {
 147         /* SYS_HZ ticks per second */
 148         gptimer->e[0].val = 0;
 149         gptimer->e[0].rld = (TIMER_BASE_CLK / CONFIG_SYS_HZ) - 1;
 150         gptimer->e[0].ctrl =
 151             (GPTIMER_CTRL_EN | GPTIMER_CTRL_RS |
 152              GPTIMER_CTRL_LD | GPTIMER_CTRL_IE);
 153
 154         return gptimer_irq;
 155 }
 156
 157 ulong get_tbclk(void)
 158 {
 159         return TIMER_BASE_CLK;
 160 }
 161
 162 /*
 163  * This function is intended for SHORT delays only.
 164  */
 165 unsigned long cpu_usec2ticks(unsigned long usec)
 166 {
 167         if (usec < US_PER_TICK)
 168                 return 1;
 169         return usec / US_PER_TICK;
 170 }
 171
 172 unsigned long cpu_ticks2usec(unsigned long ticks)
 173 {
 174         return ticks * US_PER_TICK;
 175 }