arch/x86/cpu/ivybridge/bd82x6x.c

   1 /*
   2  * Copyright (C) 2014 Google, Inc
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <dm.h>
   9 #include <errno.h>
  10 #include <fdtdec.h>
  11 #include <malloc.h>
  12 #include <asm/lapic.h>
  13 #include <asm/pci.h>
  14 #include <asm/arch/bd82x6x.h>
  15 #include <asm/arch/model_206ax.h>
  16 #include <asm/arch/pch.h>
  17 #include <asm/arch/sandybridge.h>
  18
  19 void bd82x6x_pci_init(pci_dev_t dev)
  20 {
  21         u16 reg16;
  22         u8 reg8;
  23
  24         debug("bd82x6x PCI init.\n");
  25         /* Enable Bus Master */
  26         reg16 = x86_pci_read_config16(dev, PCI_COMMAND);
  27         reg16 |= PCI_COMMAND_MASTER;
  28         x86_pci_write_config16(dev, PCI_COMMAND, reg16);
  29
  30         /* This device has no interrupt */
  31         x86_pci_write_config8(dev, INTR, 0xff);
  32
  33         /* disable parity error response and SERR */
  34         reg16 = x86_pci_read_config16(dev, BCTRL);
  35         reg16 &= ~(1 << 0);
  36         reg16 &= ~(1 << 1);
  37         x86_pci_write_config16(dev, BCTRL, reg16);
  38
  39         /* Master Latency Count must be set to 0x04! */
  40         reg8 = x86_pci_read_config8(dev, SMLT);
  41         reg8 &= 0x07;
  42         reg8 |= (0x04 << 3);
  43         x86_pci_write_config8(dev, SMLT, reg8);
  44
  45         /* Will this improve throughput of bus masters? */
  46         x86_pci_write_config8(dev, PCI_MIN_GNT, 0x06);
  47
  48         /* Clear errors in status registers */
  49         reg16 = x86_pci_read_config16(dev, PSTS);
  50         /* reg16 |= 0xf900; */
  51         x86_pci_write_config16(dev, PSTS, reg16);
  52
  53         reg16 = x86_pci_read_config16(dev, SECSTS);
  54         /* reg16 |= 0xf900; */
  55         x86_pci_write_config16(dev, SECSTS, reg16);
  56 }
  57
  58 static int bd82x6x_probe(struct udevice *dev)
  59 {
  60         const void *blob = gd->fdt_blob;
  61         struct pci_controller *hose;
  62         struct x86_cpu_priv *cpu;
  63         int sata_node, gma_node;
  64         int ret;
  65
  66         hose = pci_bus_to_hose(0);
  67         lpc_enable(PCH_LPC_DEV);
  68         lpc_init(hose, PCH_LPC_DEV);
  69         sata_node = fdtdec_next_compatible(blob, 0,
  70                                            COMPAT_INTEL_PANTHERPOINT_AHCI);
  71         if (sata_node < 0) {
  72                 debug("%s: Cannot find SATA node\n", __func__);
  73                 return -EINVAL;
  74         }
  75         bd82x6x_sata_init(PCH_SATA_DEV, blob, sata_node);
  76         bd82x6x_usb_ehci_init(PCH_EHCI1_DEV);
  77         bd82x6x_usb_ehci_init(PCH_EHCI2_DEV);
  78
  79         cpu = calloc(1, sizeof(*cpu));
  80         if (!cpu)
  81                 return -ENOMEM;
  82         model_206ax_init(cpu);
  83
  84         gma_node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_GMA);
  85         if (gma_node < 0) {
  86                 debug("%s: Cannot find GMA node\n", __func__);
  87                 return -EINVAL;
  88         }
  89         ret = gma_func0_init(PCH_VIDEO_DEV, pci_bus_to_hose(0), blob,
  90                              gma_node);
  91         if (ret)
  92                 return ret;
  93
  94         return 0;
  95 }
  96
  97 int bd82x6x_init(void)
  98 {
  99         const void *blob = gd->fdt_blob;
 100         int sata_node;
 101
 102         sata_node = fdtdec_next_compatible(blob, 0,
 103                                            COMPAT_INTEL_PANTHERPOINT_AHCI);
 104         if (sata_node < 0) {
 105                 debug("%s: Cannot find SATA node\n", __func__);
 106                 return -EINVAL;
 107         }
 108
 109         bd82x6x_pci_init(PCH_DEV);
 110         bd82x6x_sata_enable(PCH_SATA_DEV, blob, sata_node);
 111         northbridge_enable(PCH_DEV);
 112         northbridge_init(PCH_DEV);
 113
 114         return 0;
 115 }
 116
 117 static const struct udevice_id bd82x6x_ids[] = {
 118         { .compatible = "intel,bd82x6x" },
 119         { }
 120 };
 121
 122 U_BOOT_DRIVER(bd82x6x_drv) = {
 123         .name           = "bd82x6x",
 124         .id             = UCLASS_PCH,
 125         .of_match       = bd82x6x_ids,
 126         .probe          = bd82x6x_probe,
 127 };