arch/x86/cpu/qemu/pci.c

   1 /*
   2  * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <pci.h>
   9 #include <pci_rom.h>
  10 #include <asm/pci.h>
  11 #include <asm/arch/device.h>
  12 #include <asm/arch/qemu.h>
  13
  14 DECLARE_GLOBAL_DATA_PTR;
  15
  16 void board_pci_setup_hose(struct pci_controller *hose)
  17 {
  18         hose->first_busno = 0;
  19         hose->last_busno = 0;
  20
  21         /* PCI memory space */
  22         pci_set_region(hose->regions + 0,
  23                        CONFIG_PCI_MEM_BUS,
  24                        CONFIG_PCI_MEM_PHYS,
  25                        CONFIG_PCI_MEM_SIZE,
  26                        PCI_REGION_MEM);
  27
  28         /* PCI IO space */
  29         pci_set_region(hose->regions + 1,
  30                        CONFIG_PCI_IO_BUS,
  31                        CONFIG_PCI_IO_PHYS,
  32                        CONFIG_PCI_IO_SIZE,
  33                        PCI_REGION_IO);
  34
  35         pci_set_region(hose->regions + 2,
  36                        CONFIG_PCI_PREF_BUS,
  37                        CONFIG_PCI_PREF_PHYS,
  38                        CONFIG_PCI_PREF_SIZE,
  39                        PCI_REGION_PREFETCH);
  40
  41         pci_set_region(hose->regions + 3,
  42                        0,
  43                        0,
  44                        gd->ram_size,
  45                        PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
  46
  47         hose->region_count = 4;
  48 }
  49
  50 int board_pci_post_scan(struct pci_controller *hose)
  51 {
  52         int ret = 0;
  53         u16 device, xbcs;
  54         int pam, i;
  55         pci_dev_t vga;
  56         ulong start;
  57
  58         /*
  59          * i440FX and Q35 chipset have different PAM register offset, but with
  60          * the same bitfield layout. Here we determine the offset based on its
  61          * PCI device ID.
  62          */
  63         device = x86_pci_read_config16(PCI_BDF(0, 0, 0), PCI_DEVICE_ID);
  64         pam = (device == PCI_DEVICE_ID_INTEL_82441) ? I440FX_PAM : Q35_PAM;
  65
  66         /*
  67          * Initialize Programmable Attribute Map (PAM) Registers
  68          *
  69          * Configure legacy segments C/D/E/F to system RAM
  70          */
  71         for (i = 0; i < PAM_NUM; i++)
  72                 x86_pci_write_config8(PCI_BDF(0, 0, 0), pam + i, PAM_RW);
  73
  74         if (device == PCI_DEVICE_ID_INTEL_82441) {
  75                 /*
  76                  * Enable legacy IDE I/O ports decode
  77                  *
  78                  * Note: QEMU always decode legacy IDE I/O port on PIIX chipset.
  79                  * However Linux ata_piix driver does sanity check on these two
  80                  * registers to see whether legacy ports decode is turned on.
  81                  * This is to make Linux ata_piix driver happy.
  82                  */
  83                 x86_pci_write_config16(PIIX_IDE, IDE0_TIM, IDE_DECODE_EN);
  84                 x86_pci_write_config16(PIIX_IDE, IDE1_TIM, IDE_DECODE_EN);
  85
  86                 /* Enable I/O APIC */
  87                 xbcs = x86_pci_read_config16(PIIX_ISA, XBCS);
  88                 xbcs |= APIC_EN;
  89                 x86_pci_write_config16(PIIX_ISA, XBCS, xbcs);
  90         }
  91
  92         /*
  93          * QEMU emulated graphic card shows in the PCI configuration space with
  94          * PCI vendor id and device id as an artificial pair 0x1234:0x1111.
  95          * It is on PCI bus 0, function 0, but device number is not consistent
  96          * for the two x86 targets it supports. For i440FX and PIIX chipset
  97          * board, it shows as device 2, while for Q35 and ICH9 chipset board,
  98          * it shows as device 1.
  99          */
 100         vga = (device == PCI_DEVICE_ID_INTEL_82441) ? I440FX_VGA : Q35_VGA;
 101         start = get_timer(0);
 102         ret = pci_run_vga_bios(vga, NULL, PCI_ROM_USE_NATIVE);
 103         debug("BIOS ran in %lums\n", get_timer(start));
 104
 105         return ret;
 106 }