arch/x86/cpu/sc520/sc520_ssi.c

   1 /*
   2  * (C) Copyright 2002
   3  * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #include <common.h>
  25 #include <asm/io.h>
  26 #include <asm/ic/ssi.h>
  27 #include <asm/ic/sc520.h>
  28
  29 int ssi_set_interface(int freq, int lsb_first, int inv_clock, int inv_phase)
  30 {
  31         u8 temp=0;
  32
  33         if (freq >= 8192) {
  34                 temp |= CTL_CLK_SEL_4;
  35         } else if (freq >= 4096) {
  36                 temp |= CTL_CLK_SEL_8;
  37         } else if (freq >= 2048) {
  38                 temp |= CTL_CLK_SEL_16;
  39         } else if (freq >= 1024) {
  40                 temp |= CTL_CLK_SEL_32;
  41         } else if (freq >= 512) {
  42                 temp |= CTL_CLK_SEL_64;
  43         } else if (freq >= 256) {
  44                 temp |= CTL_CLK_SEL_128;
  45         } else if (freq >= 128) {
  46                 temp |= CTL_CLK_SEL_256;
  47         } else {
  48                 temp |= CTL_CLK_SEL_512;
  49         }
  50
  51         if (!lsb_first) {
  52                 temp |= MSBF_ENB;
  53         }
  54
  55         if (inv_clock) {
  56                 temp |= CLK_INV_ENB;
  57         }
  58
  59         if (inv_phase) {
  60                 temp |= PHS_INV_ENB;
  61         }
  62
  63         writeb(temp, &sc520_mmcr->ssictl);
  64
  65         return 0;
  66 }
  67
  68 u8 ssi_txrx_byte(u8 data)
  69 {
  70         writeb(data, &sc520_mmcr->ssixmit);
  71         while (readb(&sc520_mmcr->ssista) & SSISTA_BSY);
  72         writeb(SSICMD_CMD_SEL_XMITRCV, &sc520_mmcr->ssicmd);
  73         while (readb(&sc520_mmcr->ssista) & SSISTA_BSY);
  74
  75         return readb(&sc520_mmcr->ssircv);
  76 }
  77
  78 void ssi_tx_byte(u8 data)
  79 {
  80         writeb(data, &sc520_mmcr->ssixmit);
  81         while (readb(&sc520_mmcr->ssista) & SSISTA_BSY);
  82         writeb(SSICMD_CMD_SEL_XMIT, &sc520_mmcr->ssicmd);
  83 }
  84
  85 u8 ssi_rx_byte(void)
  86 {
  87         while (readb(&sc520_mmcr->ssista) & SSISTA_BSY);
  88         writeb(SSICMD_CMD_SEL_RCV, &sc520_mmcr->ssicmd);
  89         while (readb(&sc520_mmcr->ssista) & SSISTA_BSY);
  90
  91         return readb(&sc520_mmcr->ssircv);
  92 }