arch/x86/dts/minnowmax.dts

   1 /*
   2  * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 /dts-v1/;
   8
   9 /include/ "skeleton.dtsi"
  10 /include/ "serial.dtsi"
  11
  12 / {
  13         model = "Intel Minnowboard Max";
  14         compatible = "intel,minnowmax", "intel,baytrail";
  15
  16         aliases {
  17                 serial0 = &serial;
  18                 spi0 = "/spi";
  19         };
  20
  21         config {
  22                 silent_console = <0>;
  23         };
  24
  25         gpioa {
  26                 compatible = "intel,ich6-gpio";
  27                 u-boot,dm-pre-reloc;
  28                 reg = <0 0x20>;
  29                 bank-name = "A";
  30         };
  31
  32         gpiob {
  33                 compatible = "intel,ich6-gpio";
  34                 u-boot,dm-pre-reloc;
  35                 reg = <0x20 0x20>;
  36                 bank-name = "B";
  37         };
  38
  39         gpioc {
  40                 compatible = "intel,ich6-gpio";
  41                 u-boot,dm-pre-reloc;
  42                 reg = <0x40 0x20>;
  43                 bank-name = "C";
  44         };
  45
  46         gpiod {
  47                 compatible = "intel,ich6-gpio";
  48                 u-boot,dm-pre-reloc;
  49                 reg = <0x60 0x20>;
  50                 bank-name = "D";
  51         };
  52
  53         gpioe {
  54                 compatible = "intel,ich6-gpio";
  55                 u-boot,dm-pre-reloc;
  56                 reg = <0x80 0x20>;
  57                 bank-name = "E";
  58         };
  59
  60         gpiof {
  61                 compatible = "intel,ich6-gpio";
  62                 u-boot,dm-pre-reloc;
  63                 reg = <0xA0 0x20>;
  64                 bank-name = "F";
  65         };
  66
  67         chosen {
  68                 stdout-path = "/serial";
  69         };
  70
  71         cpus {
  72                 #address-cells = <1>;
  73                 #size-cells = <0>;
  74
  75                 cpu@0 {
  76                         device_type = "cpu";
  77                         compatible = "intel,baytrail-cpu";
  78                         reg = <0>;
  79                         intel,apic-id = <0>;
  80                 };
  81
  82                 cpu@1 {
  83                         device_type = "cpu";
  84                         compatible = "intel,baytrail-cpu";
  85                         reg = <1>;
  86                         intel,apic-id = <4>;
  87                 };
  88
  89         };
  90
  91         spi {
  92                 #address-cells = <1>;
  93                 #size-cells = <0>;
  94                 compatible = "intel,ich-spi";
  95                 spi-flash@0 {
  96                         reg = <0>;
  97                         compatible = "stmicro,n25q064a", "spi-flash";
  98                         memory-map = <0xff800000 0x00800000>;
  99                 };
 100         };
 101
 102         microcode {
 103                 update@0 {
 104 #include "microcode/m0130673322.dtsi"
 105                 };
 106         };
 107
 108 };